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This commit is contained in:
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94bdb71820
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c4c414ebd3
57 changed files with 49795 additions and 3 deletions
107
peripherals/cc48x6/bootloader/Src/boot.c
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107
peripherals/cc48x6/bootloader/Src/boot.c
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@ -0,0 +1,107 @@
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/**
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******************************************************************************
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* @file : main.c
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* @brief : Main program body
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2023 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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#include "main.h"
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static void Init(void);
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/**
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* @brief The application entry point.
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* @retval int
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*/
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int boot(void) {
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/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
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LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_SYSCFG);
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LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
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Init();
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LL_GPIO_ResetOutputPin(GPIOA, LL_GPIO_PIN_3);
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LL_mDelay(100);
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LL_GPIO_SetOutputPin(GPIOA, LL_GPIO_PIN_3);
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/* Infinite loop */
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while (1) {
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}
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}
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static void Init(void) {
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LL_FLASH_SetLatency(LL_FLASH_LATENCY_1);
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while (LL_FLASH_GetLatency() != LL_FLASH_LATENCY_1) {
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}
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LL_RCC_HSI_Enable();
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/* Wait till HSI is ready */
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while (LL_RCC_HSI_IsReady() != 1) {
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}
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LL_RCC_HSI_SetCalibTrimming(16);
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LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSI_DIV_2, LL_RCC_PLL_MUL_12);
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LL_RCC_PLL_Enable();
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/* Wait till PLL is ready */
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while (LL_RCC_PLL_IsReady() != 1) {
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}
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LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
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LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
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LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
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/* Wait till System clock is ready */
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while (LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) {
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}
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LL_Init1msTick(48000000);
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LL_SetSystemCoreClock(48000000);
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LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
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/* GPIO Ports Clock Enable */
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LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA);
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/**/
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LL_GPIO_ResetOutputPin(GPIOA, LL_GPIO_PIN_3);
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/**/
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GPIO_InitStruct.Pin = LL_GPIO_PIN_3;
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GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
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GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
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GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
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GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
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LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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}
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void Error_Handler(void) {
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/* User can add his own implementation to report the HAL error return state */
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__disable_irq();
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while (1) {
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}
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}
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208
peripherals/cc48x6/bootloader/Src/main.c
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208
peripherals/cc48x6/bootloader/Src/main.c
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/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file : main.c
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* @brief : Main program body
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2023 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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/* Private includes ----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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/* USER CODE END Includes */
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/* Private typedef -----------------------------------------------------------*/
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/* USER CODE BEGIN PTD */
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/* USER CODE END PTD */
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/* Private define ------------------------------------------------------------*/
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/* USER CODE BEGIN PD */
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/* USER CODE END PD */
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/* Private macro -------------------------------------------------------------*/
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/* USER CODE BEGIN PM */
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/* USER CODE END PM */
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/* Private variables ---------------------------------------------------------*/
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/* USER CODE BEGIN PV */
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/* USER CODE END PV */
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/* Private function prototypes -----------------------------------------------*/
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void SystemClock_Config(void);
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static void MX_GPIO_Init(void);
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/* USER CODE BEGIN PFP */
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/* USER CODE END PFP */
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/* Private user code ---------------------------------------------------------*/
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/* USER CODE BEGIN 0 */
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/* USER CODE END 0 */
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/**
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* @brief The application entry point.
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* @retval int
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*/
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int main(void)
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{
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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/* MCU Configuration--------------------------------------------------------*/
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/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
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LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_SYSCFG);
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LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
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/* System interrupt init*/
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/* SysTick_IRQn interrupt configuration */
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NVIC_SetPriority(SysTick_IRQn, 3);
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/* USER CODE BEGIN Init */
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/* USER CODE END Init */
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/* Configure the system clock */
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SystemClock_Config();
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/* USER CODE BEGIN SysInit */
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/* USER CODE END SysInit */
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/* Initialize all configured peripherals */
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MX_GPIO_Init();
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/* USER CODE BEGIN 2 */
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/* USER CODE END 2 */
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/* Infinite loop */
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/* USER CODE BEGIN WHILE */
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while (1)
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{
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/* USER CODE END WHILE */
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LL_GPIO_TogglePin(SIGNAL_LED_GPIO_Port, SIGNAL_LED_Pin);
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LL_mDelay(50);
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/* USER CODE BEGIN 3 */
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}
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/* USER CODE END 3 */
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}
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/**
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* @brief System Clock Configuration
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* @retval None
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*/
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void SystemClock_Config(void)
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{
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LL_FLASH_SetLatency(LL_FLASH_LATENCY_1);
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while(LL_FLASH_GetLatency() != LL_FLASH_LATENCY_1)
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{
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}
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LL_RCC_HSI_Enable();
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/* Wait till HSI is ready */
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while(LL_RCC_HSI_IsReady() != 1)
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{
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}
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LL_RCC_HSI_SetCalibTrimming(16);
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LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSI_DIV_2, LL_RCC_PLL_MUL_12);
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LL_RCC_PLL_Enable();
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/* Wait till PLL is ready */
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while(LL_RCC_PLL_IsReady() != 1)
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{
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}
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LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
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LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);
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LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
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/* Wait till System clock is ready */
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while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
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{
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}
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LL_Init1msTick(48000000);
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LL_SetSystemCoreClock(48000000);
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}
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/**
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* @brief GPIO Initialization Function
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* @param None
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* @retval None
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*/
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static void MX_GPIO_Init(void)
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{
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LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
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/* GPIO Ports Clock Enable */
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LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA);
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/**/
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LL_GPIO_ResetOutputPin(GPIOA, LL_GPIO_PIN_3);
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/**/
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GPIO_InitStruct.Pin = LL_GPIO_PIN_3;
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GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
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GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
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GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
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GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
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LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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}
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/* USER CODE BEGIN 4 */
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/* USER CODE END 4 */
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/**
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* @brief This function is executed in case of error occurrence.
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* @retval None
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*/
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void Error_Handler(void)
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{
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/* USER CODE BEGIN Error_Handler_Debug */
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/* User can add his own implementation to report the HAL error return state */
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__disable_irq();
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while (1)
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{
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}
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/* USER CODE END Error_Handler_Debug */
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}
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#ifdef USE_FULL_ASSERT
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/**
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* @brief Reports the name of the source file and the source line number
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* where the assert_param error has occurred.
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* @param file: pointer to the source file name
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* @param line: assert_param error line source number
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* @retval None
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*/
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void assert_failed(uint8_t *file, uint32_t line)
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{
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/* USER CODE BEGIN 6 */
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/* User can add his own implementation to report the file name and line number,
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ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
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/* USER CODE END 6 */
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}
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#endif /* USE_FULL_ASSERT */
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146
peripherals/cc48x6/bootloader/Src/stm32f0xx_it.c
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146
peripherals/cc48x6/bootloader/Src/stm32f0xx_it.c
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/**
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******************************************************************************
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* @file stm32f0xx_it.c
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* @brief Interrupt Service Routines.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2023 STMicroelectronics.
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* All rights reserved.
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||||
*
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||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
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||||
******************************************************************************
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||||
*/
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#include "main.h"
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#include "stm32f0xx_it.h"
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/******************************************************************************/
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/* Cortex-M0 Processor Interruption and Exception Handlers */
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/******************************************************************************/
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/**
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* @brief This function handles Non maskable interrupt.
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*/
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void NMI_Handler(void)
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{
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while (1)
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{
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}
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||||
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}
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/**
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||||
* @brief This function handles Hard fault interrupt.
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||||
*/
|
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void HardFault_Handler(void)
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{
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||||
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while (1)
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{
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||||
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|
||||
}
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}
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|
||||
/**
|
||||
* @brief This function handles System service call via SWI instruction.
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||||
*/
|
||||
void SVC_Handler(void)
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{
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||||
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||||
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||||
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||||
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||||
}
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||||
/**
|
||||
* @brief This function handles Pendable request for system service.
|
||||
*/
|
||||
void PendSV_Handler(void)
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||||
{
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||||
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||||
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||||
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||||
|
||||
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||||
|
||||
}
|
||||
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||||
/**
|
||||
* @brief This function handles System tick timer.
|
||||
*/
|
||||
void SysTick_Handler(void)
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||||
{
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||||
|
||||
|
||||
|
||||
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||||
|
||||
|
||||
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/* STM32F0xx Peripheral Interrupt Handlers */
|
||||
/* Add here the Interrupt Handlers for the used peripherals. */
|
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/* For the available peripheral interrupt handler names, */
|
||||
/* please refer to the startup file (startup_stm32f0xx.s). */
|
||||
/******************************************************************************/
|
||||
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||||
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||||
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||||
|
||||
|
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247
peripherals/cc48x6/bootloader/Src/system_stm32f0xx.c
Normal file
247
peripherals/cc48x6/bootloader/Src/system_stm32f0xx.c
Normal file
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/**
|
||||
******************************************************************************
|
||||
* @file system_stm32f0xx.c
|
||||
* @author MCD Application Team
|
||||
* @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Source File.
|
||||
*
|
||||
* 1. This file provides two functions and one global variable to be called from
|
||||
* user application:
|
||||
* - SystemInit(): This function is called at startup just after reset and
|
||||
* before branch to main program. This call is made inside
|
||||
* the "startup_stm32f0xx.s" file.
|
||||
*
|
||||
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
|
||||
* by the user application to setup the SysTick
|
||||
* timer or configure other parameters.
|
||||
*
|
||||
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
|
||||
* be called whenever the core clock is changed
|
||||
* during program execution.
|
||||
*
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2016 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32f0xx_system
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F0xx_System_Private_Includes
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "stm32f0xx.h"
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F0xx_System_Private_TypesDefinitions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F0xx_System_Private_Defines
|
||||
* @{
|
||||
*/
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz.
|
||||
This value can be provided and adapted by the user application. */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE ((uint32_t)8000000) /*!< Default value of the Internal oscillator in Hz.
|
||||
This value can be provided and adapted by the user application. */
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
#if !defined (HSI48_VALUE)
|
||||
#define HSI48_VALUE ((uint32_t)48000000) /*!< Default value of the HSI48 Internal oscillator in Hz.
|
||||
This value can be provided and adapted by the user application. */
|
||||
#endif /* HSI48_VALUE */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F0xx_System_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F0xx_System_Private_Variables
|
||||
* @{
|
||||
*/
|
||||
/* This variable is updated in three ways:
|
||||
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
|
||||
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||
Note: If you use this function to configure the system clock; then there
|
||||
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||
variable is updated automatically.
|
||||
*/
|
||||
uint32_t SystemCoreClock = 8000000;
|
||||
|
||||
const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
|
||||
const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F0xx_System_Private_FunctionPrototypes
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F0xx_System_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Setup the microcontroller system
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemInit(void)
|
||||
{
|
||||
/* NOTE :SystemInit(): This function is called at startup just after reset and
|
||||
before branch to main program. This call is made inside
|
||||
the "startup_stm32f0xx.s" file.
|
||||
User can setups the default system clock (System clock source, PLL Multiplier
|
||||
and Divider factors, AHB/APBx prescalers and Flash settings).
|
||||
*/
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Update SystemCoreClock variable according to Clock Register Values.
|
||||
* The SystemCoreClock variable contains the core clock (HCLK), it can
|
||||
* be used by the user application to setup the SysTick timer or configure
|
||||
* other parameters.
|
||||
*
|
||||
* @note Each time the core clock (HCLK) changes, this function must be called
|
||||
* to update SystemCoreClock variable value. Otherwise, any configuration
|
||||
* based on this variable will be incorrect.
|
||||
*
|
||||
* @note - The system frequency computed by this function is not the real
|
||||
* frequency in the chip. It is calculated based on the predefined
|
||||
* constant and the selected clock source:
|
||||
*
|
||||
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
|
||||
*
|
||||
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
|
||||
*
|
||||
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
|
||||
* or HSI_VALUE(*) multiplied/divided by the PLL factors.
|
||||
*
|
||||
* (*) HSI_VALUE is a constant defined in stm32f0xx_hal_conf.h file (default value
|
||||
* 8 MHz) but the real value may vary depending on the variations
|
||||
* in voltage and temperature.
|
||||
*
|
||||
* (**) HSE_VALUE is a constant defined in stm32f0xx_hal_conf.h file (its value
|
||||
* depends on the application requirements), user has to ensure that HSE_VALUE
|
||||
* is same as the real frequency of the crystal used. Otherwise, this function
|
||||
* may have wrong result.
|
||||
*
|
||||
* - The result of this function could be not correct when using fractional
|
||||
* value for HSE crystal.
|
||||
*
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
uint32_t tmp = 0, pllmull = 0, pllsource = 0, predivfactor = 0;
|
||||
|
||||
|
||||
tmp = RCC->CFGR & RCC_CFGR_SWS;
|
||||
|
||||
switch (tmp)
|
||||
{
|
||||
case RCC_CFGR_SWS_HSI: /* HSI used as system clock */
|
||||
SystemCoreClock = HSI_VALUE;
|
||||
break;
|
||||
case RCC_CFGR_SWS_HSE: /* HSE used as system clock */
|
||||
SystemCoreClock = HSE_VALUE;
|
||||
break;
|
||||
case RCC_CFGR_SWS_PLL: /* PLL used as system clock */
|
||||
|
||||
pllmull = RCC->CFGR & RCC_CFGR_PLLMUL;
|
||||
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
|
||||
pllmull = ( pllmull >> 18) + 2;
|
||||
predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1;
|
||||
|
||||
if (pllsource == RCC_CFGR_PLLSRC_HSE_PREDIV)
|
||||
{
|
||||
/* HSE used as PLL clock source : SystemCoreClock = HSE/PREDIV * PLLMUL */
|
||||
SystemCoreClock = (HSE_VALUE/predivfactor) * pllmull;
|
||||
}
|
||||
#if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F091xC) || defined(STM32F098xx)
|
||||
else if (pllsource == RCC_CFGR_PLLSRC_HSI48_PREDIV)
|
||||
{
|
||||
/* HSI48 used as PLL clock source : SystemCoreClock = HSI48/PREDIV * PLLMUL */
|
||||
SystemCoreClock = (HSI48_VALUE/predivfactor) * pllmull;
|
||||
}
|
||||
#endif /* STM32F042x6 || STM32F048xx || STM32F072xB || STM32F078xx || STM32F091xC || STM32F098xx */
|
||||
else
|
||||
{
|
||||
#if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F070x6) \
|
||||
|| defined(STM32F078xx) || defined(STM32F071xB) || defined(STM32F072xB) \
|
||||
|| defined(STM32F070xB) || defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC)
|
||||
/* HSI used as PLL clock source : SystemCoreClock = HSI/PREDIV * PLLMUL */
|
||||
SystemCoreClock = (HSI_VALUE/predivfactor) * pllmull;
|
||||
#else
|
||||
/* HSI used as PLL clock source : SystemCoreClock = HSI/2 * PLLMUL */
|
||||
SystemCoreClock = (HSI_VALUE >> 1) * pllmull;
|
||||
#endif /* STM32F042x6 || STM32F048xx || STM32F070x6 ||
|
||||
STM32F071xB || STM32F072xB || STM32F078xx || STM32F070xB ||
|
||||
STM32F091xC || STM32F098xx || STM32F030xC */
|
||||
}
|
||||
break;
|
||||
default: /* HSI used as system clock */
|
||||
SystemCoreClock = HSI_VALUE;
|
||||
break;
|
||||
}
|
||||
/* Compute HCLK clock frequency ----------------*/
|
||||
/* Get HCLK prescaler */
|
||||
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
|
||||
/* HCLK clock frequency */
|
||||
SystemCoreClock >>= tmp;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
||||
Loading…
Add table
Add a link
Reference in a new issue