diff --git a/.build.yml b/.build.yml
index f740b9a..a7a24fd 100644
--- a/.build.yml
+++ b/.build.yml
@@ -24,6 +24,7 @@ steps:
   - apt update
   - apt install -y make zip
   - make pcb -j$(nproc) BOARD=fiatlux
+  - make pcb -j$(nproc) BOARD=fiatlux_cc48
 
 - name: case
   image: debian:sid
@@ -59,6 +60,7 @@ steps:
       - firmware/firmware/fiatlux.bin
       - firmware/otaflash.py
       - pcb/fiatlux_pcb.zip
+      - pcb/fiatlux_cc48_pcb.zip
     checksum:
       - sha512
       - md5
diff --git a/pcb/fiatlux_cc48.kicad_pcb b/pcb/fiatlux_cc48.kicad_pcb
new file mode 100644
index 0000000..9fc2d8a
--- /dev/null
+++ b/pcb/fiatlux_cc48.kicad_pcb
@@ -0,0 +1,27743 @@
+(kicad_pcb (version 20211014) (generator pcbnew)
+
+  (general
+    (thickness 1.6)
+  )
+
+  (paper "A4")
+  (layers
+    (0 "F.Cu" signal)
+    (31 "B.Cu" signal)
+    (32 "B.Adhes" user "B.Adhesive")
+    (33 "F.Adhes" user "F.Adhesive")
+    (34 "B.Paste" user)
+    (35 "F.Paste" user)
+    (36 "B.SilkS" user "B.Silkscreen")
+    (37 "F.SilkS" user "F.Silkscreen")
+    (38 "B.Mask" user)
+    (39 "F.Mask" user)
+    (40 "Dwgs.User" user "User.Drawings")
+    (41 "Cmts.User" user "User.Comments")
+    (42 "Eco1.User" user "User.Eco1")
+    (43 "Eco2.User" user "User.Eco2")
+    (44 "Edge.Cuts" user)
+    (45 "Margin" user)
+    (46 "B.CrtYd" user "B.Courtyard")
+    (47 "F.CrtYd" user "F.Courtyard")
+    (48 "B.Fab" user)
+    (49 "F.Fab" user)
+    (50 "User.1" user "Nutzer.1")
+    (51 "User.2" user "Nutzer.2")
+    (52 "User.3" user "Nutzer.3")
+    (53 "User.4" user "Nutzer.4")
+    (54 "User.5" user "Nutzer.5")
+    (55 "User.6" user "Nutzer.6")
+    (56 "User.7" user "Nutzer.7")
+    (57 "User.8" user "Nutzer.8")
+    (58 "User.9" user "Nutzer.9")
+  )
+
+  (setup
+    (stackup
+      (layer "F.SilkS" (type "Top Silk Screen"))
+      (layer "F.Paste" (type "Top Solder Paste"))
+      (layer "F.Mask" (type "Top Solder Mask") (thickness 0.01))
+      (layer "F.Cu" (type "copper") (thickness 0.035))
+      (layer "dielectric 1" (type "core") (thickness 1.51) (material "FR4") (epsilon_r 4.5) (loss_tangent 0.02))
+      (layer "B.Cu" (type "copper") (thickness 0.035))
+      (layer "B.Mask" (type "Bottom Solder Mask") (thickness 0.01))
+      (layer "B.Paste" (type "Bottom Solder Paste"))
+      (layer "B.SilkS" (type "Bottom Silk Screen"))
+      (copper_finish "None")
+      (dielectric_constraints no)
+    )
+    (pad_to_mask_clearance 0)
+    (grid_origin 167.894 27.686)
+    (pcbplotparams
+      (layerselection 0x00010fc_ffffffff)
+      (disableapertmacros false)
+      (usegerberextensions false)
+      (usegerberattributes true)
+      (usegerberadvancedattributes true)
+      (creategerberjobfile true)
+      (svguseinch false)
+      (svgprecision 6)
+      (excludeedgelayer true)
+      (plotframeref false)
+      (viasonmask false)
+      (mode 1)
+      (useauxorigin false)
+      (hpglpennumber 1)
+      (hpglpenspeed 20)
+      (hpglpendiameter 15.000000)
+      (dxfpolygonmode true)
+      (dxfimperialunits true)
+      (dxfusepcbnewfont true)
+      (psnegative false)
+      (psa4output false)
+      (plotreference true)
+      (plotvalue true)
+      (plotinvisibletext false)
+      (sketchpadsonfab false)
+      (subtractmaskfromsilk false)
+      (outputformat 1)
+      (mirror false)
+      (drillshape 1)
+      (scaleselection 1)
+      (outputdirectory "")
+    )
+  )
+
+  (net 0 "")
+  (net 1 "+3V3")
+  (net 2 "GND")
+  (net 3 "~{BUSRST}")
+  (net 4 "Net-(C5-Pad1)")
+  (net 5 "Net-(C7-Pad1)")
+  (net 6 "/fiatlux_cc48_channel_driver2/DRI_DIM")
+  (net 7 "+48V")
+  (net 8 "/fiatlux_cc48_channel_driver2/DRI_48V")
+  (net 9 "/fiatlux_cc48_channel_driver2/DRI_VCC")
+  (net 10 "/fiatlux_cc48_channel_driver2/DRI_COM")
+  (net 11 "/fiatlux_cc48_channel_driver2/OUT+")
+  (net 12 "/fiatlux_cc48_channel_driver2/OUT-")
+  (net 13 "/fiatlux_cc48_channel_driver1/DRI_DIM")
+  (net 14 "/fiatlux_cc48_channel_driver1/DRI_48V")
+  (net 15 "/fiatlux_cc48_channel_driver1/DRI_VCC")
+  (net 16 "/fiatlux_cc48_channel_driver1/DRI_COM")
+  (net 17 "/fiatlux_cc48_channel_driver1/OUT+")
+  (net 18 "/fiatlux_cc48_channel_driver1/OUT-")
+  (net 19 "/fiatlux_cc48_channel_driver3/DRI_DIM")
+  (net 20 "/fiatlux_cc48_channel_driver3/DRI_48V")
+  (net 21 "/fiatlux_cc48_channel_driver3/DRI_VCC")
+  (net 22 "/fiatlux_cc48_channel_driver3/DRI_COM")
+  (net 23 "/fiatlux_cc48_channel_driver3/OUT+")
+  (net 24 "/fiatlux_cc48_channel_driver3/OUT-")
+  (net 25 "/fiatlux_cc48_channel_driver5/DRI_DIM")
+  (net 26 "/fiatlux_cc48_channel_driver5/DRI_48V")
+  (net 27 "/fiatlux_cc48_channel_driver5/DRI_VCC")
+  (net 28 "/fiatlux_cc48_channel_driver5/DRI_COM")
+  (net 29 "/fiatlux_cc48_channel_driver5/OUT+")
+  (net 30 "/fiatlux_cc48_channel_driver5/OUT-")
+  (net 31 "Net-(D2-Pad2)")
+  (net 32 "ACT_LED")
+  (net 33 "Net-(D3-Pad2)")
+  (net 34 "/fiatlux_cc48_channel_driver4/DRI_DIM")
+  (net 35 "/fiatlux_cc48_channel_driver4/DRI_48V")
+  (net 36 "/fiatlux_cc48_channel_driver4/DRI_VCC")
+  (net 37 "/fiatlux_cc48_channel_driver4/DRI_COM")
+  (net 38 "/fiatlux_cc48_channel_driver4/OUT+")
+  (net 39 "/fiatlux_cc48_channel_driver4/OUT-")
+  (net 40 "SWIM")
+  (net 41 "/fiatlux_cc48_channel_driver6/DRI_DIM")
+  (net 42 "/fiatlux_cc48_channel_driver6/DRI_48V")
+  (net 43 "/fiatlux_cc48_channel_driver6/DRI_VCC")
+  (net 44 "/fiatlux_cc48_channel_driver6/DRI_COM")
+  (net 45 "/fiatlux_cc48_channel_driver6/OUT+")
+  (net 46 "/fiatlux_cc48_channel_driver6/OUT-")
+  (net 47 "/fiatlux_cc48_channel_driver2/DRI_SOURCE")
+  (net 48 "/fiatlux_cc48_channel_driver1/DRI_SOURCE")
+  (net 49 "/fiatlux_cc48_channel_driver3/DRI_SOURCE")
+  (net 50 "DAC_SYNC")
+  (net 51 "Net-(R2-Pad2)")
+  (net 52 "SCLK")
+  (net 53 "Net-(R3-Pad2)")
+  (net 54 "MOSI")
+  (net 55 "Net-(R4-Pad2)")
+  (net 56 "MISO")
+  (net 57 "Net-(R5-Pad2)")
+  (net 58 "CH2_DIM")
+  (net 59 "Net-(R9-Pad1)")
+  (net 60 "CH1_DIM")
+  (net 61 "Net-(R12-Pad1)")
+  (net 62 "CH3_DIM")
+  (net 63 "Net-(R15-Pad1)")
+  (net 64 "CH5_DIM")
+  (net 65 "Net-(R18-Pad1)")
+  (net 66 "CH4_DIM")
+  (net 67 "Net-(R21-Pad1)")
+  (net 68 "CH6_DIM")
+  (net 69 "Net-(R24-Pad1)")
+  (net 70 "unconnected-(U1-Pad1)")
+  (net 71 "unconnected-(U2-Pad11)")
+  (net 72 "unconnected-(U2-Pad12)")
+  (net 73 "INIT_{IN}")
+  (net 74 "~{INT}")
+  (net 75 "INIT_{OUT}")
+  (net 76 "unconnected-(U3-Pad9)")
+  (net 77 "SW_SCLK")
+  (net 78 "SW_MOSI")
+  (net 79 "SW_MISO")
+  (net 80 "unconnected-(U3-Pad17)")
+  (net 81 "CH1_PWM")
+  (net 82 "CH2_PWM")
+  (net 83 "CH3_PWM")
+  (net 84 "CH4_PWM")
+  (net 85 "unconnected-(U3-Pad25)")
+  (net 86 "unconnected-(U3-Pad27)")
+  (net 87 "CH6_PWM")
+  (net 88 "CH5_PWM")
+  (net 89 "unconnected-(U3-Pad32)")
+  (net 90 "/fiatlux_cc48_channel_driver5/DRI_SOURCE")
+  (net 91 "/fiatlux_cc48_channel_driver4/DRI_SOURCE")
+  (net 92 "/fiatlux_cc48_channel_driver6/DRI_SOURCE")
+  (net 93 "/fiatlux_cc48_channel_driver2/DRI_GATE")
+  (net 94 "/fiatlux_cc48_channel_driver1/DRI_GATE")
+  (net 95 "/fiatlux_cc48_channel_driver3/DRI_GATE")
+  (net 96 "/fiatlux_cc48_channel_driver5/DRI_GATE")
+  (net 97 "/fiatlux_cc48_channel_driver4/DRI_GATE")
+  (net 98 "/fiatlux_cc48_channel_driver6/DRI_GATE")
+  (net 99 "unconnected-(U3-Pad30)")
+  (net 100 "unconnected-(U3-Pad31)")
+  (net 101 "unconnected-(U3-Pad14)")
+  (net 102 "unconnected-(U3-Pad15)")
+  (net 103 "unconnected-(U3-Pad7)")
+
+  (footprint "Inductor_SMD:L_12x12mm_H8mm" (layer "F.Cu")
+    (tedit 6206BD08) (tstamp 009ec14e-e28f-414d-b4d6-f22082f5a9e3)
+    (at 213.36 73.66 180)
+    (descr "Choke, SMD, 12x12mm 8mm height")
+    (tags "Choke SMD")
+    (property "Sheetfile" "fiatlux_cc48_channel_driver.kicad_sch")
+    (property "Sheetname" "fiatlux_cc48_channel_driver3")
+    (path "/0f2c710f-e0cf-4531-985d-317b699b8a1b/c4a8317f-0ec5-42b5-bb36-e799c3b9465f")
+    (attr smd)
+    (fp_text reference "L3" (at -8.128 -5.08) (layer "F.SilkS")
+      (effects (font (size 1 1) (thickness 0.15)))
+      (tstamp 77384558-2192-48e5-931d-d52032917acd)
+    )
+    (fp_text value "L_Ferrite" (at 0 7.6) (layer "F.Fab")
+      (effects (font (size 1 1) (thickness 0.15)))
+      (tstamp 29fddfd4-c16a-4edc-9105-e98d554e54d3)
+    )
+    (fp_text user "${REFERENCE}" (at 0 0) (layer "F.Fab")
+      (effects (font (size 1 1) (thickness 0.15)))
+      (tstamp 5f83fb07-4900-4575-b461-e754d65ec30c)
+    )
+    (fp_circle (center 0 0) (end 0.15 0.15) (layer "F.Adhes") (width 0.38) (fill none) (tstamp 245cf617-007c-44cc-82b1-c0d91efa4497))
+    (fp_circle (center 0 0) (end 0.55 0) (layer "F.Adhes") (width 0.38) (fill none) (tstamp 337d0c40-ac33-462e-80cd-853a541561a9))
+    (fp_circle (center 0 0) (end 0.9 0) (layer "F.Adhes") (width 0.38) (fill none) (tstamp b7803b1f-2d9e-454e-a1b6-fe774b1aa856))
+    (fp_line (start 6.3 -6.3) (end 6.3 -3.3) (layer "F.SilkS") (width 0.12) (tstamp 04ccdb5b-5e5d-4480-87bb-3dff3f42984b))
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