add cc48 schematic
This commit is contained in:
parent
7d35c34766
commit
18c30b1ec0
3 changed files with 6132 additions and 0 deletions
460
pcb/fiatlux_cc48.kicad_pro
Normal file
460
pcb/fiatlux_cc48.kicad_pro
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{
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"board": {
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"design_settings": {
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"defaults": {
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"board_outline_line_width": 0.09999999999999999,
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"copper_line_width": 0.19999999999999998,
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"copper_text_italic": false,
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"copper_text_size_h": 1.5,
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"copper_text_size_v": 1.5,
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"copper_text_thickness": 0.3,
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"copper_text_upright": false,
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"courtyard_line_width": 0.049999999999999996,
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"dimension_precision": 4,
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"dimension_units": 3,
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"dimensions": {
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"arrow_length": 1270000,
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"extension_offset": 500000,
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"keep_text_aligned": true,
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"suppress_zeroes": false,
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"text_position": 0,
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"units_format": 1
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},
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"fab_line_width": 0.09999999999999999,
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"fab_text_italic": false,
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"fab_text_size_h": 1.0,
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"fab_text_size_v": 1.0,
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"fab_text_thickness": 0.15,
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"fab_text_upright": false,
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"other_line_width": 0.15,
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"other_text_italic": false,
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"other_text_size_h": 1.0,
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"other_text_size_v": 1.0,
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"other_text_thickness": 0.15,
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"other_text_upright": false,
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"pads": {
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"drill": 1.52,
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"height": 3.0,
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"width": 3.0
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},
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"silk_line_width": 0.15,
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"silk_text_italic": false,
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"silk_text_size_h": 1.0,
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"silk_text_size_v": 1.0,
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"silk_text_thickness": 0.15,
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"silk_text_upright": false,
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"zones": {
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"45_degree_only": false,
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"min_clearance": 0.508
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}
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},
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"diff_pair_dimensions": [
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{
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"gap": 0.0,
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"via_gap": 0.0,
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"width": 0.0
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}
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],
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"drc_exclusions": [],
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"meta": {
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"version": 2
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},
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"rule_severities": {
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"annular_width": "error",
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"clearance": "error",
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"copper_edge_clearance": "error",
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"courtyards_overlap": "error",
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"diff_pair_gap_out_of_range": "error",
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"diff_pair_uncoupled_length_too_long": "error",
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"drill_out_of_range": "error",
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"duplicate_footprints": "warning",
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"extra_footprint": "warning",
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"footprint_type_mismatch": "error",
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"hole_clearance": "error",
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"hole_near_hole": "error",
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"invalid_outline": "error",
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"item_on_disabled_layer": "error",
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"items_not_allowed": "error",
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"length_out_of_range": "error",
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"malformed_courtyard": "error",
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"microvia_drill_out_of_range": "error",
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"missing_courtyard": "ignore",
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"missing_footprint": "warning",
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"net_conflict": "warning",
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"npth_inside_courtyard": "ignore",
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"padstack": "error",
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"pth_inside_courtyard": "ignore",
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"shorting_items": "error",
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"silk_over_copper": "warning",
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"silk_overlap": "warning",
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"skew_out_of_range": "error",
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"through_hole_pad_without_hole": "error",
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"too_many_vias": "error",
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"track_dangling": "warning",
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"track_width": "error",
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"tracks_crossing": "error",
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"unconnected_items": "error",
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"unresolved_variable": "error",
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"via_dangling": "warning",
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"zone_has_empty_net": "error",
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"zones_intersect": "error"
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},
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"rules": {
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"allow_blind_buried_vias": false,
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"allow_microvias": false,
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"max_error": 0.005,
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"min_clearance": 0.0,
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"min_copper_edge_clearance": 0.0,
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"min_hole_clearance": 0.25,
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"min_hole_to_hole": 0.25,
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"min_microvia_diameter": 0.19999999999999998,
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"min_microvia_drill": 0.09999999999999999,
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"min_silk_clearance": 0.0,
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"min_through_hole_diameter": 0.3,
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"min_track_width": 0.19999999999999998,
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"min_via_annular_width": 0.049999999999999996,
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"min_via_diameter": 0.39999999999999997,
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"solder_mask_clearance": 0.0,
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"solder_mask_min_width": 0.0,
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"use_height_for_length_calcs": true
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},
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"track_widths": [
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0.0,
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0.25,
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1.0,
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2.0
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],
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"via_dimensions": [
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{
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"diameter": 0.0,
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"drill": 0.0
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}
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],
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"zones_allow_external_fillets": false,
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"zones_use_no_outline": true
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},
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"layer_presets": []
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},
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"boards": [],
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"cvpcb": {
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"equivalence_files": []
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},
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"erc": {
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"erc_exclusions": [],
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"meta": {
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"version": 0
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},
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"pin_map": [
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],
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"rule_severities": {
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"bus_definition_conflict": "error",
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"bus_entry_needed": "error",
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"bus_label_syntax": "error",
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"bus_to_bus_conflict": "error",
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"bus_to_net_conflict": "error",
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"different_unit_footprint": "error",
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"different_unit_net": "error",
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"duplicate_reference": "error",
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"duplicate_sheet_names": "error",
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"extra_units": "error",
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"global_label_dangling": "warning",
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"hier_label_mismatch": "error",
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"label_dangling": "error",
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"lib_symbol_issues": "warning",
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"multiple_net_names": "warning",
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"net_not_bus_member": "warning",
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"no_connect_connected": "warning",
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"no_connect_dangling": "warning",
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"pin_not_connected": "error",
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"pin_not_driven": "error",
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"pin_to_pin": "warning",
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"power_pin_not_driven": "error",
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"similar_labels": "warning",
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"unannotated": "error",
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"unit_value_mismatch": "error",
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"unresolved_variable": "error",
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"wire_dangling": "error"
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}
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},
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"libraries": {
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"pinned_footprint_libs": [],
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"pinned_symbol_libs": []
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},
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"meta": {
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"filename": "fiatlux_cc48.kicad_pro",
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"version": 1
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},
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"net_settings": {
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"classes": [
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{
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"bus_width": 12.0,
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"clearance": 0.2,
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"diff_pair_gap": 0.25,
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"diff_pair_via_gap": 0.25,
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"diff_pair_width": 0.2,
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"line_style": 0,
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"microvia_diameter": 0.3,
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"microvia_drill": 0.1,
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"name": "Default",
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"pcb_color": "rgba(0, 0, 0, 0.000)",
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"schematic_color": "rgba(0, 0, 0, 0.000)",
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"track_width": 0.25,
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"via_diameter": 0.8,
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"via_drill": 0.4,
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"wire_width": 6.0
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}
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],
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"meta": {
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"version": 2
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},
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"net_colors": null
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},
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"pcbnew": {
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"last_paths": {
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"gencad": "",
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"idf": "",
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"netlist": "",
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"specctra_dsn": "",
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"step": "",
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"vrml": ""
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},
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"page_layout_descr_file": ""
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},
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"schematic": {
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"annotate_start_num": 0,
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"drawing": {
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"default_line_thickness": 6.0,
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"default_text_size": 50.0,
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"field_names": [],
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"intersheets_ref_own_page": false,
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"intersheets_ref_prefix": "",
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"intersheets_ref_short": false,
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"intersheets_ref_show": false,
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"intersheets_ref_suffix": "",
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"junction_size_choice": 3,
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"label_size_ratio": 0.375,
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"pin_symbol_size": 25.0,
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"text_offset_ratio": 0.15
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},
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"legacy_lib_dir": "",
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"legacy_lib_list": [],
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"meta": {
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"version": 1
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},
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"net_format_name": "",
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"ngspice": {
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"fix_include_paths": true,
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"fix_passive_vals": false,
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"meta": {
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"version": 0
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},
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"model_mode": 0,
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"workbook_filename": ""
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},
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"page_layout_descr_file": "",
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"plot_directory": "",
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"spice_adjust_passive_values": false,
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"spice_external_command": "spice \"%I\"",
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"subpart_first_id": 65,
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"subpart_id_separator": 0
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},
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"sheets": [
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[
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"9538e4ed-27e6-4c37-b989-9859dc0d49e8",
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""
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],
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[
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"d33c1df4-7e91-4c8a-86ff-6749f0933357",
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"fiatlux_cc48_channel_driver2"
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],
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[
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"ec392c76-0785-4274-a56a-aeb995601b34",
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"fiatlux_cc48_channel_driver1"
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],
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[
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"0f2c710f-e0cf-4531-985d-317b699b8a1b",
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"fiatlux_cc48_channel_driver3"
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],
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[
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"a672b323-13f7-4347-a8ce-0a3f96c45d44",
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"fiatlux_cc48_channel_driver5"
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],
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[
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"a5f417c9-09b7-4103-a9bc-767ebcf97650",
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"fiatlux_cc48_channel_driver4"
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],
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[
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"41c6dc95-230a-4992-8ca4-7f36f4bdcf94",
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"fiatlux_cc48_channel_driver6"
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]
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],
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"text_variables": {}
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}
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4014
pcb/fiatlux_cc48.kicad_sch
Normal file
4014
pcb/fiatlux_cc48.kicad_sch
Normal file
File diff suppressed because it is too large
Load diff
1658
pcb/fiatlux_cc48_channel_driver.kicad_sch
Normal file
1658
pcb/fiatlux_cc48_channel_driver.kicad_sch
Normal file
File diff suppressed because it is too large
Load diff
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