135 lines
4.6 KiB
C
135 lines
4.6 KiB
C
/* esp/i2s_regs.h
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*
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* ESP8266 I2S register definitions
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*
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* Not compatible with ESP SDK register access code.
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*/
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#ifndef _ESP_I2S_REGS_H
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#define _ESP_I2S_REGS_H
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#include "esp/types.h"
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#include "common_macros.h"
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#define I2S_BASE 0x60000e00
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#define I2S (*(struct I2S_REGS *)I2S_BASE)
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struct I2S_REGS {
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uint32_t volatile TXFIFO; // 0x00
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uint32_t volatile RXFIFO; // 0x04
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uint32_t volatile CONF; // 0x08
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uint32_t volatile INT_RAW; // 0x0c
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uint32_t volatile INT_STATUS; // 0x10
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uint32_t volatile INT_ENABLE; // 0x14
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uint32_t volatile INT_CLEAR; // 0x18
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uint32_t volatile TIMING; // 0x1c
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uint32_t volatile FIFO_CONF; // 0x20
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uint32_t volatile RX_EOF_NUM; // 0x24
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uint32_t volatile CONF_SINGLE_DATA; // 0x28
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uint32_t volatile CONF_CHANNELS; // 0x2c
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};
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/* Details for CONF register */
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#define I2S_CONF_BCK_DIV_M 0x0000003f
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#define I2S_CONF_BCK_DIV_S 22
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#define I2S_CONF_CLKM_DIV_M 0x0000003f
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#define I2S_CONF_CLKM_DIV_S 16
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#define I2S_CONF_BITS_MOD_M 0x0000000f
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#define I2S_CONF_BITS_MOD_S 12
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#define I2S_CONF_RX_MSB_SHIFT BIT(11)
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#define I2S_CONF_TX_MSB_SHIFT BIT(10)
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#define I2S_CONF_RX_START BIT(9)
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#define I2S_CONF_TX_START BIT(8)
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#define I2S_CONF_MSB_RIGHT BIT(7)
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#define I2S_CONF_RIGHT_FIRST BIT(6)
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#define I2S_CONF_RX_SLAVE_MOD BIT(5)
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#define I2S_CONF_TX_SLAVE_MOD BIT(4)
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#define I2S_CONF_RX_FIFO_RESET BIT(3)
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#define I2S_CONF_TX_FIFO_RESET BIT(2)
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#define I2S_CONF_RX_RESET BIT(1)
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#define I2S_CONF_TX_RESET BIT(0)
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#define I2S_CONF_RESET_MASK 0xf
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/* Details for INT_RAW register */
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#define I2S_INT_RAW_TX_REMPTY BIT(5)
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#define I2S_INT_RAW_TX_WFULL BIT(4)
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#define I2S_INT_RAW_RX_REMPTY BIT(3)
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#define I2S_INT_RAW_RX_WFULL BIT(2)
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#define I2S_INT_RAW_TX_PUT_DATA BIT(1)
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#define I2S_INT_RAW_RX_TAKE_DATA BIT(0)
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/* Details for INT_STATUS register */
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#define I2S_INT_STATUS_TX_REMPTY BIT(5)
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#define I2S_INT_STATUS_TX_WFULL BIT(4)
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#define I2S_INT_STATUS_RX_REMPTY BIT(3)
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#define I2S_INT_STATUS_RX_WFULL BIT(2)
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#define I2S_INT_STATUS_TX_PUT_DATA BIT(1)
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#define I2S_INT_STATUS_RX_TAKE_DATA BIT(0)
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/* Details for INT_ENABLE register */
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#define I2S_INT_ENABLE_TX_REMPTY BIT(5)
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#define I2S_INT_ENABLE_TX_WFULL BIT(4)
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#define I2S_INT_ENABLE_RX_REMPTY BIT(3)
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#define I2S_INT_ENABLE_RX_WFULL BIT(2)
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#define I2S_INT_ENABLE_TX_PUT_DATA BIT(1)
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#define I2S_INT_ENABLE_RX_TAKE_DATA BIT(0)
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/* Details for INT_CLEAR register */
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#define I2S_INT_CLEAR_TX_REMPTY BIT(5)
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#define I2S_INT_CLEAR_TX_WFULL BIT(4)
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#define I2S_INT_CLEAR_RX_REMPTY BIT(3)
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#define I2S_INT_CLEAR_RX_WFULL BIT(2)
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#define I2S_INT_CLEAR_TX_PUT_DATA BIT(1)
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#define I2S_INT_CLEAR_RX_TAKE_DATA BIT(0)
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/* Details for TIMING register */
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#define I2S_TIMING_TX_BCK_IN_INV BIT(22)
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#define I2S_TIMING_RX_DSYNC_SW BIT(21)
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#define I2S_TIMING_TX_DSYNC_SW BIT(20)
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#define I2S_TIMING_RX_BCK_OUT_DELAY_M 0x00000003
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#define I2S_TIMING_RX_BCK_OUT_DELAY_S 18
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#define I2S_TIMING_RX_WS_OUT_DELAY_M 0x00000003
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#define I2S_TIMING_RX_WS_OUT_DELAY_S 16
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#define I2S_TIMING_TX_SD_OUT_DELAY_M 0x00000003
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#define I2S_TIMING_TX_SD_OUT_DELAY_S 14
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#define I2S_TIMING_TX_WS_OUT_DELAY_M 0x00000003
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#define I2S_TIMING_TX_WS_OUT_DELAY_S 12
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#define I2S_TIMING_TX_BCK_OUT_DELAY_M 0x00000003
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#define I2S_TIMING_TX_BCK_OUT_DELAY_S 10
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#define I2S_TIMING_RX_SD_IN_DELAY_M 0x00000003
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#define I2S_TIMING_RX_SD_IN_DELAY_S 8
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#define I2S_TIMING_RX_WS_IN_DELAY 0x00000003
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#define I2S_TIMING_RX_WS_IN_DELAY_S 6
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#define I2S_TIMING_RX_BCK_IN_DELAY_M 0x00000003
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#define I2S_TIMING_RX_BCK_IN_DELAY_S 4
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#define I2S_TIMING_TX_WS_IN_DELAY_M 0x00000003
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#define I2S_TIMING_TX_WS_IN_DELAY_S 2
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#define I2S_TIMING_TX_BCK_IN_DELAY_M 0x00000003
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#define I2S_TIMING_TX_BCK_IN_DELAY_S 0
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/* Details for FIFO_CONF register */
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#define I2S_FIFO_CONF_RX_FIFO_MOD_M 0x00000007
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#define I2S_FIFO_CONF_RX_FIFO_MOD_S 16
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#define I2S_FIFO_CONF_TX_FIFO_MOD_M 0x00000007
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#define I2S_FIFO_CONF_TX_FIFO_MOD_S 13
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#define I2S_FIFO_CONF_DESCRIPTOR_ENABLE BIT(12)
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#define I2S_FIFO_CONF_TX_DATA_NUM_M 0x0000003F
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#define I2S_FIFO_CONF_TX_DATA_NUM_S 6
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#define I2S_FIFO_CONF_RX_DATA_NUM_M 0x0000003F
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#define I2S_FIFO_CONF_RX_DATA_NUM_S 0
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/* Details for CONF_CHANNEL register */
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#define I2S_CONF_CHANNELS_RX_CHANNEL_MOD_M 0x00000003
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#define I2S_CONF_CHANNELS_RX_CHANNEL_MOD_S 3
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#define I2S_CONF_CHANNELS_TX_CHANNEL_MOD_M 0x00000007
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#define I2S_CONF_CHANNELS_TX_CHANNEL_MOD_S 0
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#endif /* _ESP_I2S_REGS_H */
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