ed7ba52c9a
At the moment these are almost bit-for-bit copies of the vector behaviour in the RTOS SDK, but hopefully that will start to change. Progress towards #2
313 lines
10 KiB
C
313 lines
10 KiB
C
/*
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FreeRTOS V7.5.2 - Copyright (C) 2013 Real Time Engineers Ltd.
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VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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***************************************************************************
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* *
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* FreeRTOS provides completely free yet professionally developed, *
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* robust, strictly quality controlled, supported, and cross *
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* platform software that has become a de facto standard. *
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* *
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* Help yourself get started quickly and support the FreeRTOS *
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* project by purchasing a FreeRTOS tutorial book, reference *
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* manual, or both from: http://www.FreeRTOS.org/Documentation *
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* *
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* Thank you! *
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* *
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***************************************************************************
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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>>! NOTE: The modification to the GPL is included to allow you to distribute
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>>! a combined work that includes FreeRTOS without being obliged to provide
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>>! the source code for proprietary components outside of the FreeRTOS
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>>! kernel.
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. Full license text is available from the following
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link: http://www.freertos.org/a00114.html
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1 tab == 4 spaces!
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***************************************************************************
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* *
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* Having a problem? Start by reading the FAQ "My application does *
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* not run, what could be wrong?" *
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* *
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* http://www.FreeRTOS.org/FAQHelp.html *
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* *
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***************************************************************************
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http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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license and Real Time Engineers Ltd. contact details.
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http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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compatible FAT file system, and our tiny thread aware UDP/IP stack.
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http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
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licenses offer ticketed support, indemnification and middleware.
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http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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engineered and independently SIL3 certified version for use in safety and
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mission critical applications that require provable dependability.
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1 tab == 4 spaces!
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*/
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for ESP8266
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*
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* This is based on the version supplied in esp_iot_rtos_sdk,
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* which is in turn based on the ARM CM3 port.
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*----------------------------------------------------------*/
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#include <xtensa/config/core.h>
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#include <malloc.h>
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#include <unistd.h>
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#include <stdio.h>
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#include "FreeRTOS.h"
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#include "task.h"
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#include "xtensa_rtos.h"
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unsigned cpu_sr;
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char level1_int_disabled;
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/* Supervisor stack pointer entry. This is the "high water mark" of how far the
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supervisor stack grew down before task started.
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After tasks start, task stacks are all allocated from the heap and
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FreeRTOS checks for stack overflow.
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*/
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static uint32_t xPortSupervisorStackPointer;
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/*
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* Stack initialization
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*/
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portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
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{
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#define SET_STKREG(r,v) sp[(r) >> 2] = (portSTACK_TYPE)(v)
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portSTACK_TYPE *sp, *tp;
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/* Create interrupt stack frame aligned to 16 byte boundary */
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sp = (portSTACK_TYPE*) (((uint32_t)(pxTopOfStack+1) - XT_CP_SIZE - XT_STK_FRMSZ) & ~0xf);
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/* Clear the entire frame (do not use memset() because we don't depend on C library) */
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for (tp = sp; tp <= pxTopOfStack; ++tp)
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*tp = 0;
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/* Explicitly initialize certain saved registers */
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SET_STKREG( XT_STK_PC, pxCode ); /* task entrypoint */
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SET_STKREG( XT_STK_A0, 0 ); /* to terminate GDB backtrace */
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SET_STKREG( XT_STK_A1, (uint32_t)sp + XT_STK_FRMSZ ); /* physical top of stack frame */
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SET_STKREG( XT_STK_A2, pvParameters ); /* parameters */
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SET_STKREG( XT_STK_EXIT, _xt_user_exit ); /* user exception exit dispatcher */
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/* Set initial PS to int level 0, EXCM disabled ('rfe' will enable), user mode. */
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SET_STKREG( XT_STK_PS, PS_UM | PS_EXCM );
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return sp;
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}
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static int pending_soft_sv;
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static int pending_maclayer_sv;
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/* PendSV is called in place of vPortYield() to request a supervisor
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call.
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The portYIELD macro calls pendSV if it's a software request.
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The libpp and libudhcp libraries also call this function, assuming
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always with arg==2 (but maybe sometimes with arg==1?)
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In the original esp_iot_rtos_sdk implementation, arg was a char. Using an
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enum is ABI-compatible, though.
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*/
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void IRAM PendSV(enum SVC_ReqType req)
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{
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vPortEnterCritical();
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if(req == SVC_Software)
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{
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pending_soft_sv = 1;
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}
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else if(req == SVC_MACLayer)
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pending_maclayer_sv= 1;
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xthal_set_intset(BIT(INUM_SOFT));
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vPortExitCritical();
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}
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/* This MAC layer ISR handler is defined in libpp.a, and is called
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* after a Blob SV requests a soft interrupt by calling
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* PendSV(SVC_MACLayer).
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*/
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extern portBASE_TYPE sdk_MacIsrSigPostDefHdl(void);
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void IRAM SV_ISR(void)
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{
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portBASE_TYPE xHigherPriorityTaskWoken=pdFALSE ;
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if(pending_maclayer_sv)
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{
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xHigherPriorityTaskWoken = sdk_MacIsrSigPostDefHdl();
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pending_maclayer_sv = 0;
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}
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if( xHigherPriorityTaskWoken || pending_soft_sv)
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{
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sdk__xt_timer_int1();
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pending_soft_sv = 0;
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}
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}
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void xPortSysTickHandle (void)
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{
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//CloseNMI();
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{
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if(xTaskIncrementTick() !=pdFALSE )
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{
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vTaskSwitchContext();
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}
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}
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//OpenNMI();
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}
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/*
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* See header file for description.
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*/
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portBASE_TYPE xPortStartScheduler( void )
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{
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_xt_isr_attach(INUM_SOFT, SV_ISR);
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_xt_isr_unmask(BIT(INUM_SOFT));
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/* Initialize system tick timer interrupt and schedule the first tick. */
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sdk__xt_tick_timer_init();
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vTaskSwitchContext();
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/* mark the supervisor stack pointer high water mark. xt_int_exit
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actually frees ~0x50 bytes off the stack, so this value is
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conservative.
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*/
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__asm__ __volatile__ ("mov %0, a1\n" : "=a"(xPortSupervisorStackPointer));
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sdk__xt_int_exit();
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/* Should not get here as the tasks are now running! */
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return pdTRUE;
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}
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/* Determine free heap size via libc sbrk function & mallinfo
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sbrk gives total size in totally unallocated memory,
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mallinfo.fordblks gives free space inside area dedicated to heap.
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mallinfo is possibly non-portable, although glibc & newlib both support
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the fordblks member.
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*/
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size_t xPortGetFreeHeapSize( void )
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{
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struct mallinfo mi = mallinfo();
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uint32_t brk_val = (uint32_t) sbrk(0);
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uint32_t sp = xPortSupervisorStackPointer;
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if(sp == 0) /* scheduler not started */
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__asm__ __volatile__ ("mov %0, a1\n" : "=a"(sp));
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return sp - brk_val + mi.fordblks;
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}
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void vPortEndScheduler( void )
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{
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/* No-op, nothing to return to */
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}
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/*-----------------------------------------------------------*/
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/* Each task maintains its own interrupt status in the critical nesting
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variable. */
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static unsigned portBASE_TYPE uxCriticalNesting = 0;
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/* These nested vPortEnter/ExitCritical macros are called by SDK
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* libraries in libmain, libnet80211, libpp
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*
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* It may be possible to replace the global nesting count variable
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* with a save/restore of interrupt level, although it's difficult as
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* the functions have no return value.
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*/
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void IRAM vPortEnterCritical( void )
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{
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portDISABLE_INTERRUPTS();
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uxCriticalNesting++;
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}
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/*-----------------------------------------------------------*/
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void IRAM vPortExitCritical( void )
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{
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uxCriticalNesting--;
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if( uxCriticalNesting == 0 )
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portENABLE_INTERRUPTS();
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}
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/*-----------------------------------------------------------*/
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/* Main ISR handler for FreeRTOS side of the ESP libs?
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As far as I can tell, the "real" Xtensa ISRs ("Exceptions") are
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handled in libmain.a (xtensa_vectors.o) which then can call into here
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passing an interrupt mask.
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*/
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_xt_isr isr[16];
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void _xt_isr_attach(uint8_t i, _xt_isr func)
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{
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isr[i] = func;
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}
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uint16_t IRAM _xt_isr_handler(uint16_t i)
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{
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uint8_t index;
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/* I think this is implementing some kind of interrupt priority or
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short-circuiting an expensive ffs for most common interrupts - ie
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WDT And GPIO are common or high priority, then remaining flags.
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*/
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if (i & (1 << INUM_WDT)) {
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index = INUM_WDT;
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}
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else if (i & (1 << INUM_GPIO)) {
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index = INUM_GPIO;
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}else {
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index = __builtin_ffs(i) - 1;
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if (index == INUM_MAX) {
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/* I don't understand what happens here. INUM_MAX is not
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the highest interrupt number listed (and the isr array
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has 16 entries).
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Clearing that flag and then setting index to
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__builtin_ffs(i)-1 may result in index == 255 if no
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higher flags are set, unless this is guarded against
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somehow by the caller?
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I also don't understand why the code is written like
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this in esp_iot_rtos_sdk instead of just putting the i
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&= line near the top... Probably no good reason?
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*/
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i &= ~(1 << INUM_MAX);
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index = __builtin_ffs(i) - 1;
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}
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}
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_xt_clear_ints(1<<index);
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isr[index]();
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return i & ~(1 << index);
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}
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