124 lines
3.1 KiB
C
124 lines
3.1 KiB
C
/**
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* The MIT License (MIT)
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*
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* Copyright (c) 2016 sheinz (https://github.com/sheinz)
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef __I2S_DMA_H__
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#define __I2S_DMA_H__
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#include <stdint.h>
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#include <stdbool.h>
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#include "esp/slc_regs.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef void (*i2s_dma_isr_t)(void);
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typedef struct dma_descriptor {
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uint32_t blocksize:12;
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uint32_t datalen:12;
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uint32_t unused:5;
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uint32_t sub_sof:1;
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uint32_t eof:1;
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uint32_t owner:1;
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void* buf_ptr;
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struct dma_descriptor *next_link_ptr;
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} dma_descriptor_t;
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typedef struct {
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uint8_t bclk_div;
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uint8_t clkm_div;
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} i2s_clock_div_t;
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typedef struct {
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bool data;
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bool clock;
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bool ws;
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} i2s_pins_t;
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/**
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* Initialize I2S and DMA subsystems.
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*
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* @param isr ISR handler. Can be NULL if interrupt handling is not needed.
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* @param clock_div I2S clock configuration.
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* @param pins I2S pin configuration. Specifies which pins are enabled in I2S.
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*/
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void i2s_dma_init(i2s_dma_isr_t isr, i2s_clock_div_t clock_div, i2s_pins_t pins);
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/**
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* Calculate I2S dividers for the specified frequency.
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*
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* I2S_FREQ = 160000000 / (bclk_div * clkm_div)
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* Base frequency is independent from the CPU frequency.
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*/
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i2s_clock_div_t i2s_get_clock_div(int32_t freq);
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/**
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* Start I2S transmittion.
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*
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* @param descr Pointer to the first descriptor in the linked list of descriptors.
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*/
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void i2s_dma_start(dma_descriptor_t *descr);
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/**
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* Stop I2S transmittion.
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*/
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void i2s_dma_stop();
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/**
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* Clear interrupt in the I2S ISR handler.
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*
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* It is intended to be called from ISR.
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*/
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inline void i2s_dma_clear_interrupt()
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{
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SLC.INT_CLEAR = 0xFFFFFFFF;
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}
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/**
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* Check if it is EOF interrupt.
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*
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* It is intended to be called from ISR.
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*/
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inline bool i2s_dma_is_eof_interrupt()
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{
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return (SLC.INT_STATUS & SLC_INT_STATUS_RX_EOF);
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}
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/**
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* Get pointer to a descriptor that caused EOF interrupt.
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* It is the last processed descriptor.
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*
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* It is intended to be called from ISR.
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*/
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inline dma_descriptor_t *i2s_dma_get_eof_descriptor()
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{
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return (dma_descriptor_t*)SLC.RX_EOF_DESCRIPTOR_ADDR;
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}
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#ifdef __cplusplus
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}
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#endif
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#endif // __I2S_DMA_H__
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