288 lines
8.6 KiB
Text
288 lines
8.6 KiB
Text
/* Memory layout for esp-open-rtos when using OTA second stage bootloader */
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MEMORY
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{
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dport0_0_seg : org = 0x3FF00000, len = 0x10
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dram0_0_seg : org = 0x3FFE8000, len = 0x14000
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iram1_0_seg : org = 0x40100000, len = 0x08000
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/* irom0 section, mapped from SPI flash
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- Origin is offset by 0x2010 to create spacer for second stage bootloader image,
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header.
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- Length is max 8Mbit of mappable flash, minus start offset
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*/
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irom0_0_seg : org = 0x40202010, len = (1M - 0x2010)
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}
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/* FreeRTOS memory management functions
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We link these directly to newlib functions (have to do it at link
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time as binary libraries use these symbols too.)
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*/
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pvPortMalloc = malloc;
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vPortFree = free;
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/* FreeRTOS lock functions.
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Rely on a patch to libc that produces weak linked versions of the
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below symbols. Currently treating locking primitives like universal
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global critical section rather than individual locks, but this seems
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OK from the use cases in newlib.
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*/
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_lock_acquire = vPortEnterCritical;
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_lock_acquire_recursive = vPortEnterCritical;
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_lock_try_acquire = vPortEnterCritical;
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_lock_try_acquire_recursive = vPortEnterCritical;
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_lock_release = vPortExitCritical;
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_lock_release_recursive = vPortExitCritical;
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/* SDK compatibility */
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ets_printf = printf;
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PHDRS
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{
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dport0_0_phdr PT_LOAD;
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dram0_0_phdr PT_LOAD;
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dram0_0_bss_phdr PT_LOAD;
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iram1_0_phdr PT_LOAD;
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irom0_0_phdr PT_LOAD;
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}
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/* Default entry point: */
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ENTRY(call_user_start)
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PROVIDE(_memmap_vecbase_reset = 0x40000000);
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/* Various memory-map dependent cache attribute settings: */
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_memmap_cacheattr_wb_base = 0x00000110;
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_memmap_cacheattr_wt_base = 0x00000110;
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_memmap_cacheattr_bp_base = 0x00000220;
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_memmap_cacheattr_unused_mask = 0xFFFFF00F;
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_memmap_cacheattr_wb_trapnull = 0x2222211F;
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_memmap_cacheattr_wba_trapnull = 0x2222211F;
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_memmap_cacheattr_wbna_trapnull = 0x2222211F;
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_memmap_cacheattr_wt_trapnull = 0x2222211F;
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_memmap_cacheattr_bp_trapnull = 0x2222222F;
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_memmap_cacheattr_wb_strict = 0xFFFFF11F;
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_memmap_cacheattr_wt_strict = 0xFFFFF11F;
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_memmap_cacheattr_bp_strict = 0xFFFFF22F;
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_memmap_cacheattr_wb_allvalid = 0x22222112;
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_memmap_cacheattr_wt_allvalid = 0x22222112;
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_memmap_cacheattr_bp_allvalid = 0x22222222;
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PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
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SECTIONS
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{
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.dport0.rodata : ALIGN(4)
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{
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_dport0_rodata_start = ABSOLUTE(.);
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*(.dport0.rodata)
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*(.dport.rodata)
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_dport0_rodata_end = ABSOLUTE(.);
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} >dport0_0_seg :dport0_0_phdr
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.dport0.literal : ALIGN(4)
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{
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_dport0_literal_start = ABSOLUTE(.);
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*(.dport0.literal)
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*(.dport.literal)
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_dport0_literal_end = ABSOLUTE(.);
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} >dport0_0_seg :dport0_0_phdr
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.dport0.data : ALIGN(4)
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{
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_dport0_data_start = ABSOLUTE(.);
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*(.dport0.data)
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*(.dport.data)
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_dport0_data_end = ABSOLUTE(.);
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} >dport0_0_seg :dport0_0_phdr
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.text : ALIGN(4) /* IRAM */
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{
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_stext = .;
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_text_start = ABSOLUTE(.);
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. = ALIGN (16);
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*(.vecbase.text)
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*(.entry.text)
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*(.init.literal)
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*(.init)
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/* esp-open-rtos compiled source files use the .iram1.* section names for IRAM
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functions, etc. */
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*(.iram1.*)
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/* SDK libraries expect their .text sections to link to iram, not irom */
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*sdklib*:*(.literal .text .literal.* .text.*)
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/* libgcc integer functions also need to be in .text, as some are called before
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flash is mapped (also performance)
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*/
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*libgcc.a:*i3.o(.literal .text .literal.* .text.*)
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/* libc also in IRAM */
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*libc.a:*malloc.o(.literal .text .literal.* .text.*)
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*libc.a:*mallocr.o(.literal .text .literal.* .text.*)
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*libc.a:*freer.o(.literal .text .literal.* .text.*)
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*libc.a:*memcpy.o(.literal .text .literal.* .text.*)
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*libc.a:*memset.o(.literal .text .literal.* .text.*)
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*libc.a:*memcmp.o(.literal .text .literal.* .text.*)
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*libc.a:*memmove.o(.literal .text .literal.* .text.*)
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*libc.a:*rand.o(.literal .text .literal.* .text.*)
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*libc.a:*bzero.o(.literal .text .literal.* .text.*)
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*libc.a:*lock.o(.literal .text .literal.* .text.*)
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*libc.a:*printf.o(.literal .text .literal.* .text.*)
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*libc.a:*findfp.o(.literal .text .literal.* .text.*)
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*libc.a:*fputwc.o(.literal .text .literal.* .text.*)
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*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
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*(.fini.literal)
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*(.fini)
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*(.gnu.version)
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_text_end = ABSOLUTE(.);
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_etext = .;
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} >iram1_0_seg :iram1_0_phdr
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.data : ALIGN(4)
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{
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_data_start = ABSOLUTE(.);
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*(.data)
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*(.data.*)
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*(.gnu.linkonce.d.*)
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*(.data1)
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*(.sdata)
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*(.sdata.*)
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*(.gnu.linkonce.s.*)
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*(.sdata2)
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*(.sdata2.*)
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*(.gnu.linkonce.s2.*)
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*(.jcr)
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_data_end = ABSOLUTE(.);
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} >dram0_0_seg :dram0_0_phdr
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/* rodata in DRAM
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cherry-picked compilation units that need rodata
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to be in DRAM - anything that may be run while
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SPI flash is unmapped (ie IRAM functions that are
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called from interrupt context or spi flash management
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functions) need their compilation units listed here.
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If you have constant data that is performance-critical,
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list the compilation unit(s) here as well.
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*/
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.rodata : ALIGN(4)
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{
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_rodata_start = ABSOLUTE(.);
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/* Store all of core, libc, freertos .rodata in RAM by default
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(some parts are necessary, some parts for performance reasons.)
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*/
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*core.a:*(.rodata.* .rodata) *libc.a:*.o(.rodata.* .rodata)
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*freertos.a:*(.rodata.* .rodata)
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/* spi flash management rodata needs to be accessed
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while flash is unmapped. */
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*libmain.a:spi_flash.o(.rodata.* .rodata)
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/* libpp wdev.o has the NMI handler (sdk_wDev_ProcessFiq)
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which runs at all times, flash mapped or not. */
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*libpp.a:wdev.o(.rodata.* .rodata)
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_rodata_end = ABSOLUTE(.);
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} > dram0_0_seg :dram0_0_phdr
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.bss ALIGN(8) (NOLOAD) : ALIGN(4)
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{
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. = ALIGN (8);
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_bss_start = ABSOLUTE(.);
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*(.dynsbss)
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*(.sbss)
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*(.sbss.*)
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*(.gnu.linkonce.sb.*)
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*(.scommon)
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*(.sbss2)
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*(.sbss2.*)
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*(.gnu.linkonce.sb2.*)
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*(.dynbss)
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*(.bss)
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*(.bss.*)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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. = ALIGN (8);
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_bss_end = ABSOLUTE(.);
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_heap_start = ABSOLUTE(.);
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/* _stack_sentry = ALIGN(0x8); */
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} >dram0_0_seg :dram0_0_bss_phdr
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/* __stack = 0x3ffc8000; <-- this value seems a bit odd, stack on sdk_user_start is ~0x3ffffce9 */
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/* All data that goes to flash (IROM) ends up in this section */
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.irom0.text : ALIGN(4)
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{
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/*****************************
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* Actual irom0 text section *
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*****************************/
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_irom0_text_start = ABSOLUTE(.);
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/* esp-open-rtos compiled code goes into IROM by default
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(except for libgcc which is matched above.)
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We also link .rodata here in the hope that data is stored near
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its code on the flash (in practice this doesn't quite happen. :/)
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*/
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*(.literal .text .literal.* .text.* .rodata .rodata.*)
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/* Anything explicitly marked as "irom" or "irom0" should go here */
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*(.irom.* .irom.*.* .irom0.*)
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_irom0_text_end = ABSOLUTE(.);
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/**************************************************************
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C++ constructor and destructor tables, properly ordered:
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**************************************************************/
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__init_array_start = ABSOLUTE(.);
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KEEP (*crtbegin.o(.ctors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*(.ctors))
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__init_array_end = ABSOLUTE(.);
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KEEP (*crtbegin.o(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*(.dtors))
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/***********************************
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C++ exception handlers table: *
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**********************************/
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__XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
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*(.xt_except_desc)
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*(.gnu.linkonce.h.*)
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__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
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*(.xt_except_desc_end)
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/***********************************
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Additional .rodata special sections
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stored in flash
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************************************/
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. = ALIGN(4);
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*(.gnu.linkonce.r.*)
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__XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
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*(.xt_except_table)
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*(.gcc_except_table)
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*(.gnu.linkonce.e.*)
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*(.gnu.version_r)
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*(.eh_frame)
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. = ALIGN(4);
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*(.dynamic)
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*(.gnu.version_d)
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. = ALIGN(4); /* this table MUST be 4-byte aligned */
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_bss_table_start = ABSOLUTE(.);
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LONG(_bss_start)
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LONG(_bss_end)
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_bss_table_end = ABSOLUTE(.);
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} > irom0_0_seg :irom0_0_phdr
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.lit4 : ALIGN(4)
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{
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_lit4_start = ABSOLUTE(.);
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*(*.lit4)
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*(.lit4.*)
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*(.gnu.linkonce.lit4.*)
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_lit4_end = ABSOLUTE(.);
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} >iram1_0_seg :iram1_0_phdr
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}
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