23ea182e83
RTOS Timer tick handler is now the same as any other ISR. This causes a few subtle behaviour changes that seem OK but are worth noting: * RTOS tick handler sdk__xt_timer_int() is now called from one stack frame deeper (inside _xt_isr_handler()), whereas before it was called from the level above in UserHandleInterrupt. I can't see any way that the extra ~40 bytes of stack use here hurt, though. * sdk__xt_timer_int() was previous called after all other interrupts flagged in the handler, now it's called before the TIMER FRC1 & FRC2 handlers. The tick handler doesn't appear to do anything particularly timing intensive, though. * GPIO interrupt (value 3) is now lower priority than the SPI interrupt (value 2), whereas before it would have been called before SPI if both interrupts triggered at once.
39 lines
832 B
C
39 lines
832 B
C
/* ESP8266 Xtensa interrupt management functions
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*
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*
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* Part of esp-open-rtos
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* Copyright (C) 2015 Angus Gratton
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* BSD Licensed as described in the file LICENSE
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*/
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#include <esp/interrupts.h>
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_xt_isr isr[16];
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void IRAM _xt_isr_attach(uint8_t i, _xt_isr func)
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{
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isr[i] = func;
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}
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/* Generic ISR handler.
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Handles all flags set for interrupts in 'intset'.
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*/
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uint16_t IRAM _xt_isr_handler(uint16_t intset)
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{
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/* WDT has highest priority (occasional WDT resets otherwise) */
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if(intset & BIT(INUM_WDT)) {
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_xt_clear_ints(BIT(INUM_WDT));
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isr[INUM_WDT]();
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intset -= BIT(INUM_WDT);
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}
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while(intset) {
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uint8_t index = __builtin_ffs(intset) - 1;
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uint16_t mask = BIT(index);
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_xt_clear_ints(mask);
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isr[index]();
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intset -= mask;
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}
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return 0;
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}
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