7823a28ff8
This reverts a behaviour change from 3ceadfc0a6
.
495 lines
15 KiB
C
495 lines
15 KiB
C
/* Implementation of libmain/app_main.o from the Espressif SDK.
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*
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* This contains most of the startup code for the SDK/OS, some event handlers,
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* etc.
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*
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* Part of esp-open-rtos
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* Copyright (C) 2015 Superhouse Automation Pty Ltd
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* BSD Licensed as described in the file LICENSE
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*/
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#include <string.h>
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#include <FreeRTOS.h>
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#include <task.h>
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#include <lwip/tcpip.h>
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#include "common_macros.h"
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#include "xtensa_ops.h"
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#include "esp/rom.h"
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#include "esp/uart.h"
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#include "esp/iomux_regs.h"
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#include "esp/spi_regs.h"
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#include "esp/dport_regs.h"
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#include "esp/wdev_regs.h"
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#include "os_version.h"
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#include "espressif/esp_common.h"
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#include "sdk_internal.h"
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/* This is not declared in any header file (but arguably should be) */
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void user_init(void);
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#define BOOT_INFO_SIZE 28
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//TODO: phy_info should probably be a struct (no idea about its organization, though)
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#define PHY_INFO_SIZE 128
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// These are the offsets of these values within the RTCMEM regions. It appears
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// that the ROM saves them to RTCMEM before calling us, and we pull them out of
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// there to display them in startup messages (not sure why it works that way).
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#define RTCMEM_BACKUP_PHY_VER 31
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#define RTCMEM_SYSTEM_PP_VER 62
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#define halt() while (1) {}
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extern uint32_t _bss_start;
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extern uint32_t _bss_end;
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// .Ldata003 -- .irom.text+0x0
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static const uint8_t IROM default_phy_info[PHY_INFO_SIZE] = {
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0x05, 0x00, 0x04, 0x02, 0x05, 0x05, 0x05, 0x02,
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0x05, 0x00, 0x04, 0x05, 0x05, 0x04, 0x05, 0x05,
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0x04, 0xfe, 0xfd, 0xff, 0xf0, 0xf0, 0xf0, 0xe0,
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0xe0, 0xe0, 0xe1, 0x0a, 0xff, 0xff, 0xf8, 0x00,
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0xf8, 0xf8, 0x52, 0x4e, 0x4a, 0x44, 0x40, 0x38,
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0x00, 0x00, 0x01, 0x01, 0x02, 0x03, 0x04, 0x05,
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0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0xe1, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x01, 0x93, 0x43, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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};
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// user_init_flag -- .bss+0x0
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uint8_t sdk_user_init_flag;
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// info -- .bss+0x4
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struct sdk_info_st sdk_info;
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// xUserTaskHandle -- .bss+0x28
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xTaskHandle sdk_xUserTaskHandle;
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// xWatchDogTaskHandle -- .bss+0x2c
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xTaskHandle sdk_xWatchDogTaskHandle;
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/* Static function prototypes */
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static void IRAM get_otp_mac_address(uint8_t *buf);
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static void IRAM set_spi0_divisor(uint32_t divisor);
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static void zero_bss(void);
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static void init_networking(uint8_t *phy_info, uint8_t *mac_addr);
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static void init_g_ic(void);
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static void dump_excinfo(void);
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static void user_start_phase2(void);
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static void dump_flash_sector(uint32_t start_sector, uint32_t length);
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static void dump_flash_config_sectors(uint32_t start_sector);
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// .Lfunc001 -- .text+0x14
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static void IRAM get_otp_mac_address(uint8_t *buf) {
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uint32_t otp_flags;
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uint32_t otp_id0, otp_id1;
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uint32_t otp_vendor_id;
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otp_flags = DPORT.OTP_CHIPID;
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otp_id1 = DPORT.OTP_MAC1;
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otp_id0 = DPORT.OTP_MAC0;
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if (!(otp_flags & 0x8000)) {
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//FIXME: do we really need this check?
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printf("Firmware ONLY supports ESP8266!!!\n");
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halt();
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}
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if (otp_id0 == 0 && otp_id1 == 0) {
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printf("empty otp\n");
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halt();
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}
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if (otp_flags & 0x1000) {
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// If bit 12 is set, it indicates that the vendor portion of the MAC
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// address is stored in DPORT.OTP_MAC2.
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otp_vendor_id = DPORT.OTP_MAC2;
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buf[0] = otp_vendor_id >> 16;
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buf[1] = otp_vendor_id >> 8;
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buf[2] = otp_vendor_id;
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} else {
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// If bit 12 is clear, there's no MAC vendor in DPORT.OTP_MAC2, so
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// default to the Espressif MAC vendor prefix instead.
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buf[1] = 0xfe;
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buf[0] = 0x18;
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buf[2] = 0x34;
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}
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buf[3] = otp_id1 >> 8;
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buf[4] = otp_id1;
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buf[5] = otp_id0 >> 24;
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}
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// .Lfunc002 -- .text+0xa0
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static void IRAM set_spi0_divisor(uint32_t divisor) {
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int cycle_len, half_cycle_len, clkdiv;
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if (divisor < 2) {
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clkdiv = 0;
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SPI(0).CTRL0 |= SPI_CTRL0_CLOCK_EQU_SYS_CLOCK;
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IOMUX.CONF |= IOMUX_CONF_SPI0_CLOCK_EQU_SYS_CLOCK;
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} else {
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cycle_len = divisor - 1;
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half_cycle_len = (divisor / 2) - 1;
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clkdiv = VAL2FIELD(SPI_CTRL0_CLOCK_NUM, cycle_len)
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| VAL2FIELD(SPI_CTRL0_CLOCK_HIGH, half_cycle_len)
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| VAL2FIELD(SPI_CTRL0_CLOCK_LOW, cycle_len);
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SPI(0).CTRL0 &= ~SPI_CTRL0_CLOCK_EQU_SYS_CLOCK;
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IOMUX.CONF &= ~IOMUX_CONF_SPI0_CLOCK_EQU_SYS_CLOCK;
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}
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SPI(0).CTRL0 = SET_FIELD(SPI(0).CTRL0, SPI_CTRL0_CLOCK, clkdiv);
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}
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// .text+0x148
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void IRAM sdk_user_fatal_exception_handler(void) {
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if (!sdk_NMIIrqIsOn) {
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vPortEnterCritical();
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do {
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DPORT.DPORT0 &= 0xffffffe0;
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} while (DPORT.DPORT0 & 0x00000001);
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}
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Cache_Read_Disable();
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Cache_Read_Enable(0, 0, 1);
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dump_excinfo();
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uart_flush_txfifo(0);
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uart_flush_txfifo(1);
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sdk_system_restart_in_nmi();
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halt();
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}
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static void IRAM default_putc(char c) {
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uart_putc(0, c);
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}
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// .text+0x258
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void IRAM sdk_user_start(void) {
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uint32_t buf32[sizeof(struct sdk_g_ic_saved_st) / 4];
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uint8_t *buf8 = (uint8_t *)buf32;
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uint32_t flash_speed_divisor;
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uint32_t flash_sectors;
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uint32_t flash_size;
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int boot_slot;
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uint32_t cksum_magic;
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uint32_t cksum_len;
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uint32_t cksum_value;
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uint32_t ic_flash_addr;
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SPI(0).USER0 |= SPI_USER0_CS_SETUP;
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sdk_SPIRead(0, buf32, 4);
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switch (buf8[3] & 0x0f) {
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case 0xf: // 80 MHz
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flash_speed_divisor = 1;
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break;
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case 0x0: // 40 MHz
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flash_speed_divisor = 2;
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break;
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case 0x1: // 26 MHz
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flash_speed_divisor = 3;
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break;
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case 0x2: // 20 MHz
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flash_speed_divisor = 4;
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break;
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default: // Invalid -- Assume 40 MHz
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flash_speed_divisor = 2;
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}
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switch (buf8[3] >> 4) {
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case 0x0: // 4 Mbit (512 KByte)
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flash_sectors = 128;
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break;
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case 0x1: // 2 Mbit (256 Kbyte)
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flash_sectors = 64;
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break;
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case 0x2: // 8 Mbit (1 Mbyte)
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flash_sectors = 256;
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break;
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case 0x3: // 16 Mbit (2 Mbyte)
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flash_sectors = 512;
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break;
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case 0x4: // 32 Mbit (4 Mbyte)
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flash_sectors = 1024;
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break;
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default: // Invalid -- Assume 4 Mbit (512 KByte)
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flash_sectors = 128;
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}
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//FIXME: we should probably calculate flash_sectors by starting with flash_size and dividing by sdk_flashchip.sector_size instead of vice-versa.
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flash_size = flash_sectors * 4096;
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sdk_flashchip.chip_size = flash_size;
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set_spi0_divisor(flash_speed_divisor);
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sdk_SPIRead(flash_size - 4096, buf32, BOOT_INFO_SIZE);
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boot_slot = buf8[0] ? 1 : 0;
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cksum_magic = buf32[1];
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cksum_len = buf32[3 + boot_slot];
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cksum_value = buf32[5 + boot_slot];
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ic_flash_addr = (flash_sectors - 3 + boot_slot) * sdk_flashchip.sector_size;
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sdk_SPIRead(ic_flash_addr, buf32, sizeof(struct sdk_g_ic_saved_st));
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Cache_Read_Enable(0, 0, 1);
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zero_bss();
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sdk_os_install_putc1(default_putc);
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if (cksum_magic == 0xffffffff) {
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// No checksum required
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} else if ((cksum_magic == 0x55aa55aa) &&
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(sdk_system_get_checksum(buf8, cksum_len) == cksum_value)) {
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// Checksum OK
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} else {
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// Bad checksum or bad cksum_magic value
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dump_flash_config_sectors(flash_sectors - 4);
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//FIXME: should we halt here? (original SDK code doesn't)
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}
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memcpy(&sdk_g_ic.s, buf32, sizeof(struct sdk_g_ic_saved_st));
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user_start_phase2();
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}
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// .text+0x3a8
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void IRAM vApplicationStackOverflowHook(xTaskHandle task, char *task_name) {
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printf("\"%s\"(stack_size = %lu) overflow the heap_size.\n", task_name, uxTaskGetStackHighWaterMark(task));
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}
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// .text+0x3d8
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void IRAM vApplicationIdleHook(void) {
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printf("idle %u\n", WDEV.SYS_TIME);
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}
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// .text+0x404
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void IRAM vApplicationTickHook(void) {
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printf("tick %u\n", WDEV.SYS_TIME);
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}
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// .Lfunc005 -- .irom0.text+0x8
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static void zero_bss(void) {
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uint32_t *addr;
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for (addr = &_bss_start; addr < &_bss_end; addr++) {
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*addr = 0;
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}
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}
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// .Lfunc006 -- .irom0.text+0x70
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static void init_networking(uint8_t *phy_info, uint8_t *mac_addr) {
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if (sdk_register_chipv6_phy(phy_info)) {
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printf("FATAL: sdk_register_chipv6_phy failed");
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halt();
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}
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uart_set_baud(0, 74906);
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uart_set_baud(1, 74906);
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sdk_phy_disable_agc();
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sdk_ieee80211_phy_init(sdk_g_ic.s.phy_mode);
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sdk_lmacInit();
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sdk_wDev_Initialize();
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sdk_pp_attach();
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sdk_ieee80211_ifattach(&sdk_g_ic, mac_addr);
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_xt_isr_mask(1);
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DPORT.DPORT0 = SET_FIELD(DPORT.DPORT0, DPORT_DPORT0_FIELD0, 1);
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sdk_pm_attach();
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sdk_phy_enable_agc();
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sdk_cnx_attach(&sdk_g_ic);
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sdk_wDevEnableRx();
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}
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// .Lfunc007 -- .irom0.text+0x148
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static void init_g_ic(void) {
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if (sdk_g_ic.s.wifi_mode == 0xff) {
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sdk_g_ic.s.wifi_mode = 2;
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}
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sdk_wifi_softap_set_default_ssid();
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if (sdk_g_ic.s._unknown30d < 1 || sdk_g_ic.s._unknown30d > 14) {
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sdk_g_ic.s._unknown30d = 1;
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}
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if (sdk_g_ic.s._unknown544 < 100 || sdk_g_ic.s._unknown544 > 60000) {
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sdk_g_ic.s._unknown544 = 100;
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}
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if (sdk_g_ic.s._unknown30e == 1 || sdk_g_ic.s._unknown30e > 4) {
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sdk_g_ic.s._unknown30e = 0;
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}
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bzero(sdk_g_ic.s._unknown2ac, sizeof(sdk_g_ic.s._unknown2ac));
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if (sdk_g_ic.s._unknown30f > 1) {
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sdk_g_ic.s._unknown30f = 0;
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}
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if (sdk_g_ic.s._unknown310 > 4) {
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sdk_g_ic.s._unknown310 = 4;
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}
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if (sdk_g_ic.s._unknown1e4._unknown1e4 == 0xffffffff) {
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bzero(&sdk_g_ic.s._unknown1e4, sizeof(sdk_g_ic.s._unknown1e4));
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bzero(&sdk_g_ic.s._unknown20f, sizeof(sdk_g_ic.s._unknown20f));
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}
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sdk_g_ic.s.wifi_led_enable = 0;
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if (sdk_g_ic.s._unknown281 > 1) {
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sdk_g_ic.s._unknown281 = 0;
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}
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if (sdk_g_ic.s.ap_number > 5) {
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sdk_g_ic.s.ap_number = 1;
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}
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if (sdk_g_ic.s.phy_mode < 1 || sdk_g_ic.s.phy_mode > 3) {
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sdk_g_ic.s.phy_mode = PHY_MODE_11N;
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}
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}
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// .Lfunc008 -- .irom0.text+0x2a0
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static void dump_excinfo(void) {
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uint32_t exccause, epc1, epc2, epc3, excvaddr, depc, excsave1;
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uint32_t excinfo[8];
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RSR(exccause, exccause);
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printf("Fatal exception (%d): \n", (int)exccause);
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RSR(epc1, epc1);
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RSR(epc2, epc2);
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RSR(epc3, epc3);
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RSR(excvaddr, excvaddr);
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RSR(depc, depc);
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RSR(excsave1, excsave1);
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printf("%s=0x%08x\n", "epc1", epc1);
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printf("%s=0x%08x\n", "epc2", epc2);
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printf("%s=0x%08x\n", "epc3", epc3);
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printf("%s=0x%08x\n", "excvaddr", excvaddr);
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printf("%s=0x%08x\n", "depc", depc);
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printf("%s=0x%08x\n", "excsave1", excsave1);
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sdk_system_rtc_mem_read(0, excinfo, 32); // Why?
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excinfo[0] = 2;
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excinfo[1] = exccause;
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excinfo[2] = epc1;
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excinfo[3] = epc2;
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excinfo[4] = epc3;
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excinfo[5] = excvaddr;
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excinfo[6] = depc;
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excinfo[7] = excsave1;
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sdk_system_rtc_mem_write(0, excinfo, 32);
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}
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// .irom0.text+0x368
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int sdk_uart_rx_one_char(char *buf) {
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/* This functions returns 1 instead of -1 on error,
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but is otherwise the same. Unsure if anyone checks the
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result for a specific value though.
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*/
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return uart_getc_nowait(0) ? 1 : 0;
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}
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// .irom0.text+0x398
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void sdk_wdt_init(void) {
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WDT.CTRL &= ~WDT_CTRL_ENABLE;
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DPORT.INT_ENABLE |= DPORT_INT_ENABLE_WDT;
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WDT.REG1 = 0x0000000b;
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WDT.REG2 = 0x0000000c;
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WDT.CTRL |= WDT_CTRL_FLAG3 | WDT_CTRL_FLAG4 | WDT_CTRL_FLAG5;
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WDT.CTRL = SET_FIELD(WDT.CTRL, WDT_CTRL_FIELD0, 0);
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WDT.CTRL |= WDT_CTRL_ENABLE;
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sdk_pp_soft_wdt_init();
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}
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// .irom0.text+0x474
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void sdk_user_init_task(void *params) {
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int phy_ver, pp_ver;
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sdk_ets_timer_init();
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printf("\nESP-Open-SDK ver: %s compiled @ %s %s\n", OS_VERSION_STR, __DATE__, __TIME__);
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phy_ver = RTCMEM_BACKUP[RTCMEM_BACKUP_PHY_VER] >> 16;
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printf("phy ver: %d, ", phy_ver);
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pp_ver = RTCMEM_SYSTEM[RTCMEM_SYSTEM_PP_VER];
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printf("pp ver: %d.%d\n\n", (pp_ver >> 8) & 0xff, pp_ver & 0xff);
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user_init();
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sdk_user_init_flag = 1;
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sdk_wifi_mode_set(sdk_g_ic.s.wifi_mode);
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if (sdk_g_ic.s.wifi_mode == 1) {
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sdk_wifi_station_start();
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netif_set_default(sdk_g_ic.v.station_netif_info->netif);
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}
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if (sdk_g_ic.s.wifi_mode == 2) {
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sdk_wifi_softap_start();
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netif_set_default(sdk_g_ic.v.softap_netif_info->netif);
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}
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if (sdk_g_ic.s.wifi_mode == 3) {
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sdk_wifi_station_start();
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sdk_wifi_softap_start();
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netif_set_default(sdk_g_ic.v.softap_netif_info->netif);
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}
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if (sdk_wifi_station_get_auto_connect()) {
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sdk_wifi_station_connect();
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}
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vTaskDelete(NULL);
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}
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// .Lfunc009 -- .irom0.text+0x5b4
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static void user_start_phase2(void) {
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uint8_t *buf;
|
|
uint8_t *phy_info;
|
|
|
|
sdk_system_rtc_mem_read(0, &sdk_rst_if, sizeof(sdk_rst_if));
|
|
if (sdk_rst_if.version > 3) {
|
|
// Bad version number. Probably garbage.
|
|
bzero(&sdk_rst_if, sizeof(sdk_rst_if));
|
|
}
|
|
buf = malloc(sizeof(sdk_rst_if));
|
|
bzero(buf, sizeof(sdk_rst_if));
|
|
sdk_system_rtc_mem_write(0, buf, sizeof(sdk_rst_if));
|
|
free(buf);
|
|
sdk_sleep_reset_analog_rtcreg_8266();
|
|
get_otp_mac_address(sdk_info.sta_mac_addr);
|
|
sdk_wifi_softap_cacl_mac(sdk_info.softap_mac_addr, sdk_info.sta_mac_addr);
|
|
sdk_info._unknown0 = 0x0104a8c0;
|
|
sdk_info._unknown1 = 0x00ffffff;
|
|
sdk_info._unknown2 = 0x0104a8c0;
|
|
init_g_ic();
|
|
phy_info = malloc(PHY_INFO_SIZE);
|
|
sdk_spi_flash_read(sdk_flashchip.chip_size - sdk_flashchip.sector_size * 4, (uint32_t *)phy_info, PHY_INFO_SIZE);
|
|
|
|
// Wait for UARTs to finish sending anything in their queues.
|
|
uart_flush_txfifo(0);
|
|
uart_flush_txfifo(1);
|
|
|
|
if (phy_info[0] != 5) {
|
|
// Bad version byte. Discard what we read and use default values
|
|
// instead.
|
|
memcpy(phy_info, default_phy_info, PHY_INFO_SIZE);
|
|
}
|
|
init_networking(phy_info, sdk_info.sta_mac_addr);
|
|
free(phy_info);
|
|
tcpip_init(NULL, NULL);
|
|
sdk_wdt_init();
|
|
xTaskCreate(sdk_user_init_task, (signed char *)"uiT", 1024, 0, 14, &sdk_xUserTaskHandle);
|
|
vTaskStartScheduler();
|
|
}
|
|
|
|
// .Lfunc010 -- .irom0.text+0x710
|
|
static void dump_flash_sector(uint32_t start_sector, uint32_t length) {
|
|
uint8_t *buf;
|
|
int bufsize, i;
|
|
|
|
bufsize = (length + 3) & 0xfffc;
|
|
buf = malloc(bufsize);
|
|
sdk_spi_flash_read(start_sector * sdk_flashchip.sector_size, (uint32_t *)buf
|
|
, bufsize);
|
|
for (i = 0; i < length; i++) {
|
|
if ((i & 0xf) == 0) {
|
|
if (i) {
|
|
printf("\n");
|
|
}
|
|
printf("%04x:", i);
|
|
}
|
|
printf(" %02x", buf[i]);
|
|
}
|
|
printf("\n");
|
|
free(buf);
|
|
}
|
|
|
|
// .Lfunc011 -- .irom0.text+0x790
|
|
static void dump_flash_config_sectors(uint32_t start_sector) {
|
|
printf("system param error\n");
|
|
// Note: original SDK code didn't dump PHY info
|
|
printf("phy_info:\n");
|
|
dump_flash_sector(start_sector, PHY_INFO_SIZE);
|
|
printf("\ng_ic saved 0:\n");
|
|
dump_flash_sector(start_sector + 1, sizeof(struct sdk_g_ic_saved_st));
|
|
printf("\ng_ic saved 1:\n");
|
|
dump_flash_sector(start_sector + 2, sizeof(struct sdk_g_ic_saved_st));
|
|
printf("\nboot info:\n");
|
|
dump_flash_sector(start_sector + 3, BOOT_INFO_SIZE);
|
|
}
|
|
|