e8eac9614d
Memory layout is now split into two linker scripts for OTA vs non-OTA (different starting offsets), remaining functionality in common.ld. As discussed in #64, progress towards #38
15 lines
577 B
Text
15 lines
577 B
Text
/* Memory layout for esp-open-rtos when using OTA second stage bootloader */
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MEMORY
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{
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dport0_0_seg : org = 0x3FF00000, len = 0x10
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dram0_0_seg : org = 0x3FFE8000, len = 0x14000
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iram1_0_seg : org = 0x40100000, len = 0x08000
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/* irom0 section, mapped from SPI flash
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- Origin is offset by 0x2010 to create spacer for second stage bootloader image,
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header.
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- Length is max 8Mbit of mappable flash, minus start offset
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*/
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irom0_0_seg : org = 0x40202010, len = (1M - 0x2010)
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}
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