161 lines
5.3 KiB
C
161 lines
5.3 KiB
C
/* Routines to allow custom access to the Internal Espressif
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SDK PHY datastructures.
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Matches espressif/phy_internal.h
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Part of esp-open-rtos. Copyright (C) 2016 Angus Gratton,
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BSD Licensed as described in the file LICENSE.
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*/
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#include <espressif/phy_info.h>
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#include <espressif/esp_common.h>
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#include <common_macros.h>
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#include <string.h>
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static const sdk_phy_info_t IROM default_phy_info = {
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._reserved00 = { 0x05, 0x00, 0x04, 0x02, 0x05 },
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.version = 5,
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._reserved06 = { 0x05, 0x02, 0x05, 0x00, 0x04, 0x05, 0x05, 0x04,
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0x05, 0x05, 0x04,-0x02,-0x03,-0x01,-0x10,-0x10,
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-0x10,-0x20,-0x20, -0x20},
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.spur_freq_primary = 225,
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.spur_freq_divisor = 10,
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.spur_freq_en_h = 0xFF,
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.spur_freq_en_l = 0xFF,
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._reserved1e = { 0xf8, 0, 0xf8, 0xf8 },
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.target_power = { 82, 78, 74, 68, 64, 56 },
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.target_power_index_mcs = { 0, 0, 1, 1, 2, 3, 4, 5 },
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.crystal_freq = CRYSTAL_FREQ_26M,
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.sdio_config = SDIO_CONFIG_AUTO,
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.bt_coexist_config = BT_COEXIST_CONFIG_NONE,
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.bt_coexist_protocol = BT_COEXIST_PROTOCOL_WIFI_ONLY,
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.dual_ant_config = DUAL_ANT_CONFIG_NONE,
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._reserved34 = 0x02,
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.crystal_sleep = CRYSTAL_SLEEP_OFF,
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.spur_freq_2_primary = 225,
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.spur_freq_2_divisor = 10,
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.spur_freq_2_en_h = 0x00,
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.spur_freq_2_en_l = 0x00,
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.spur_freq_cfg_msb = 0x00,
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.spur_freq_2_cfg_msb = 0x00,
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.spur_freq_3_cfg = 0x0000,
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.spur_freq_4_cfg = 0x0000,
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._reserved4a = { 0x01, 0x93, 0x43, 0x00 },
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.low_power_en = false,
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.lp_atten_stage01 = LP_ATTEN_STAGE01_23DB,
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.lp_atten_bb = 0,
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.pwr_ind_11b_en = false,
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.pwr_ind_11b_0 = 0,
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.pwr_ind_11b_1 = 0,
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/* Nominal 3.3V VCC. NOTE: This value is 0 in the
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esp-open-rtos SDK default config sector, and may be unused
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by that version of the SDK?
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*/
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.pa_vdd = 33,
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/* Note: untested with the esp-open-rtos SDK default config sector, may be unused? */
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.freq_correct_mode = FREQ_CORRECT_DISABLE,
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.force_freq_offset = 0,
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/* Note: is zero with the esp-open-rtos SDK default config sector, may be unused? */
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.rf_cal_mode = RF_CAL_MODE_SAVED,
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};
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void get_default_phy_info(sdk_phy_info_t *info) __attribute__((weak, alias("get_sdk_default_phy_info")));
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void get_sdk_default_phy_info(sdk_phy_info_t *info)
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{
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memcpy(info, &default_phy_info, sizeof(sdk_phy_info_t));
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}
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void read_saved_phy_info(sdk_phy_info_t *info)
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{
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sdk_spi_flash_read(sdk_flashchip.chip_size - sdk_flashchip.sector_size * 4, (uint32_t *)info, sizeof(sdk_phy_info_t));
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}
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void write_saved_phy_info(const sdk_phy_info_t *info)
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{
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sdk_spi_flash_write(sdk_flashchip.chip_size - sdk_flashchip.sector_size * 4, (uint32_t *)info, sizeof(sdk_phy_info_t));
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}
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void dump_phy_info(const sdk_phy_info_t *info, bool raw)
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{
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printf("version=%d\n", info->version);
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printf("spur_freq = %.3f (%d/%d)\n",
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(float)info->spur_freq_primary / info->spur_freq_divisor,
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info->spur_freq_primary,
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info->spur_freq_divisor);
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printf("spur_freq_en = 0x%02x 0x%02x\n", info->spur_freq_en_h,
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info->spur_freq_en_l);
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printf("target_power\n");
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for(int i = 0; i < 6; i++) {
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printf(" %d: %.2fdB (raw 0x%02x)\n", i,
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info->target_power[i]/4.0,
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info->target_power[i]);
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}
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printf("target_power_index_mcs:");
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for(int i = 0; i < 8; i++) {
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printf(" %d%c", info->target_power_index_mcs[i],
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i == 7 ? '\n' : ',');
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}
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printf("crystal_freq: %s (raw %d)\n",
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(info->crystal_freq == CRYSTAL_FREQ_40M ? "40MHz" :
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(info->crystal_freq == CRYSTAL_FREQ_26M ? "26MHz" :
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(info->crystal_freq == CRYSTAL_FREQ_24M ? "24MHz" : "???"))),
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info->crystal_freq);
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printf("sdio_config: %d\n", info->sdio_config);
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printf("bt_coexist config: %d protocol: 0x%02x\n",
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info->bt_coexist_config, info->bt_coexist_protocol);
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printf("dual_ant_config: %d\n", info->dual_ant_config);
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printf("crystal_sleep: %d\n", info->crystal_sleep);
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printf("spur_freq_2 = %.3f (%d/%d)\n",
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(float)info->spur_freq_2_primary / info->spur_freq_2_divisor,
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info->spur_freq_2_primary,
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info->spur_freq_2_divisor);
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printf("spur_freq_2_en = 0x%02x 0x%02x\n", info->spur_freq_2_en_h,
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info->spur_freq_2_en_l);
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printf("spur_freq_cfg_msb = 0x%02x\n", info->spur_freq_cfg_msb);
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printf("spur_freq_2_)cfg_msb = 0x%02x\n", info->spur_freq_2_cfg_msb);
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printf("spur_freq_3_cfg = 0x%04x\n", info->spur_freq_3_cfg);
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printf("spur_freq_4_cfg = 0x%04x\n", info->spur_freq_4_cfg);
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printf("low_power_en = %d\n", info->low_power_en);
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printf("lp_atten_stage01 = 0x%02x\n", info->lp_atten_stage01);
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printf("lp_atten_bb = %.2f (raw 0x%02x)\n", info->lp_atten_bb / 4.0,
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info->lp_atten_bb);
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printf("pa_vdd = %d\n", info->pa_vdd);
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printf("freq_correct_mode = 0x%02x\n", info->freq_correct_mode);
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printf("force_freq_offset = %d\n", info->force_freq_offset);
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printf("rf_cal_mode = 0x%02x\n", info->rf_cal_mode);
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if(raw) {
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printf("Raw values:");
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uint8_t *p = (uint8_t *)info;
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for(int i = 0; i < sizeof(sdk_phy_info_t); i ++) {
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if(i % 8 == 0) {
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printf("\n0x%02x:", i);
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}
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printf(" %02x", p[i]);
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}
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printf("\n\n");
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}
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}
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