449 lines
14 KiB
C
449 lines
14 KiB
C
/*
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* Hardware SPI driver for MMC/SD/SDHC cards
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*
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* Part of esp-open-rtos
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* Copyright (C) 2016 Ruslan V. Uss <unclerus@gmail.com>
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* BSD Licensed as described in the file LICENSE
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*/
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#include <esp/gpio.h>
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#include <esp/spi.h>
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#include <espressif/esp_common.h>
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#include "sdio.h"
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#define BUS 1
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#define BV(x) (1 << (x))
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#define MS 1000
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#define INIT_TIMEOUT_US (2000 * MS)
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#define IO_TIMEOUT_US (500 * MS)
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#define MAX_ERR_COUNT 0xff
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#define R1_IDLE_STATE 0
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#define R1_ERASE_RESET 1
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#define R1_ILLEGAL_CMD 2
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#define R1_CRC_ERR 3
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#define R1_ERASE_SEQ_ERR 4
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#define R1_ADDR_ERR 5
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#define R1_PARAM_ERR 6
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#define R1_BUSY 7
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#define R2_LOCKED 8
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#define R2_WPE_SKIP_LF 9
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#define R2_ERROR 10
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#define R2_CC_ERROR 11
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#define R2_ECC_FAILED 12
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#define R2_WP_VIOLATION 13
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#define R2_ERASE_PARAM 14
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#define R2_OUT_OF_RANGE 15
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#define OCR_CCS 30
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#define OCR_BUSY 31
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#define OCR_SDHC (BV(OCR_CCS) | BV(OCR_BUSY))
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#define TOKEN_SINGLE_TRAN 0xfe
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#define TOKEN_MULTI_TRAN 0xfc
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#define TOKEN_STOP_TRAN 0xfd
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#define WRITE_RES_MASK 0x1f
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#define WRITE_RES_OK 0x05
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#define CMD0 0x00 // GO_IDLE_STATE - Resets the SD Memory Card
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#define CMD1 0x01 // SEND_OP_COND - Sends host capacity support information
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// and activates the card's initialization process.
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#define CMD6 0x06 // SWITCH_FUNC - Checks switchable function (mode 0) and
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// switches card function (mode 1).
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#define CMD8 0x08 // SEND_IF_COND - Sends SD Memory Card interface condition
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// that includes host supply voltage information and asks
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// the accessed card whether card can operate in supplied
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// voltage range.
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#define CMD9 0x09 // SEND_CSD - Asks the selected card to send its
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// card-specific data (CSD register)
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#define CMD10 0x0a // SEND_CID - Asks the selected card to send its card
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// identification (CID register)
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#define CMD12 0x0c // STOP_TRANSMISSION - Forces the card to stop transmission
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// in Multiple Block Read Operation
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#define CMD13 0x0d // SEND_STATUS - Asks the selected card to send its
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// status register.
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#define CMD16 0x10 // SET_BLOCKLEN - Sets a block length (in bytes) for all
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// following block commands (read and write) of a Standard
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// Capacity Card. Block length of the read and write
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// commands are fixed to 512 bytes in a High Capacity Card.
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// The length of LOCK_UNLOCK command is set by this command
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// in both capacity cards.
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#define CMD17 0x11 // READ_SINGLE_BLOCK - Reads a block of the size selected
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// by the SET_BLOCKLEN command.
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#define CMD18 0x12 // READ_MULTIPLE_BLOCK - Continuously transfers data blocks
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// from card to host until interrupted by a
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// STOP_TRANSMISSION command.
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#define CMD24 0x18 // WRITE_BLOCK - Writes a block of the size selected by the
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// SET_BLOCKLEN command.
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#define CMD25 0x19 // WRITE_MULTIPLE_BLOCK - Continuously writes blocks of
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// data until ’Stop Tran’ token is sent (instead ’Start
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// Block’).
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#define CMD27 0x1b // PROGRAM_CSD - Programming of the programmable bits of
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// the CSD.
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#define CMD28 0x1c // SET_WRITE_PROT
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#define CMD29 0x1d // CLR_WRITE_PROT
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#define CMD32 0x20 // ERASE_WR_BLK_START - Sets the address of the first block
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// to be erased.
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#define CMD33 0x21 // ERASE_WR_BLK_END - Sets the address of the last block of
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// the continuous range to be erased.
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#define CMD38 0x26 // ERASE - Erases all previously selected blocks.
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#define CMD55 0x37 // APP_CMD - Defines to the card that the next command is
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// an application specific command rather than a standard
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// command.
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#define CMD58 0x3a // READ_OCR - Reads the OCR register of a card.
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#define CMD59 0x3b // CRC_ON_OFF - Turns the CRC option on or off.
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#define ACMD23 0x17 // SET_WR_BLK_ERASE_COUNT - Sets the number of write blocks
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// to be pre-erased before writing
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#define ACMD41 0x29 // SD_SEND_OP_COMD - Sends host capacity support information
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// and activates the card's initialization process
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static uint8_t crc7(const uint8_t* data, uint8_t n)
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{
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uint8_t crc = 0;
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for (uint8_t i = 0; i < n; i++)
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{
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uint8_t d = data[i];
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for (uint8_t j = 0; j < 8; j++)
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{
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crc <<= 1;
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if ((d & 0x80) ^ (crc & 0x80))
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crc ^= 0x09;
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d <<= 1;
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}
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}
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return (crc << 1) | 1;
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}
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static uint16_t crc_ccitt(const uint8_t *data, size_t n)
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{
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uint16_t crc = 0;
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for (size_t i = 0; i < n; i++)
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{
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crc = (uint8_t)(crc >> 8) | (crc << 8);
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crc ^= data[i];
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crc ^= (uint8_t)(crc & 0xff) >> 4;
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crc ^= crc << 12;
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crc ^= (crc & 0xff) << 5;
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}
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return crc;
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}
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#define spi_cs_low(card) do { gpio_write(card->cs_pin, false); } while(0)
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#define spi_cs_high(card) do { gpio_write(card->cs_pin, true); } while(0)
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#define spi_read_byte() (spi_transfer_8(BUS, 0xff))
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#define spi_read_word() (((uint16_t)spi_read_byte() << 8) | spi_read_byte())
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#define spi_read_dword() (((uint32_t)spi_read_byte() << 24) | ((uint32_t)spi_read_byte() << 16) | ((uint32_t)spi_read_byte() << 8) | spi_read_byte())
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#define spi_skip_word() do { spi_read_byte(); spi_read_byte(); } while(0)
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#define spi_skip_dword() do { spi_read_byte(); spi_read_byte(); spi_read_byte(); spi_read_byte(); } while(0)
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inline static uint16_t spi_write_word(uint16_t word)
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{
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return (spi_transfer_8(BUS, word >> 8) << 8) | spi_transfer_8(BUS, word);
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}
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inline static void spi_read_bytes(uint8_t *dst, size_t size)
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{
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for (uint8_t *offs = dst; offs < dst + size; offs ++)
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*offs = spi_read_byte();
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}
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static bool wait()
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{
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uint32_t stop = sdk_system_get_time() + IO_TIMEOUT_US;
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while (spi_read_byte() != 0xff)
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if (sdk_system_get_time() >= stop)
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return false;
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return true;
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}
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static uint8_t command(sdio_card_t *card, uint8_t cmd, uint32_t arg)
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{
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uint8_t buf[6] = {
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cmd | 0x40,
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arg >> 24,
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arg >> 16,
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arg >> 8,
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arg
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};
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if (card->crc_enabled)
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buf[5] = crc7(buf, 5);
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else
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buf[5] = cmd == CMD0 ? 0x95 : 0x87;
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spi_cs_low(card);
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wait();
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spi_transfer(BUS, buf, NULL, 6, SPI_8BIT);
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// R1b response
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if (cmd == CMD12 || cmd == CMD28 || cmd == CMD29)
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spi_read_byte();
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uint8_t res;
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for (uint8_t i = 0; i < MAX_ERR_COUNT; i ++)
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{
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res = spi_read_byte();
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if (!(res & BV(R1_BUSY)))
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break;
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}
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return res;
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}
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inline static uint8_t app_command(sdio_card_t *card, uint8_t cmd, uint32_t arg)
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{
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command(card, CMD55, 0);
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return command(card, cmd, arg);
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}
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inline static sdio_error_t set_error(sdio_card_t *card, sdio_error_t err)
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{
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card->error = err;
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spi_cs_high(card);
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return err;
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}
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static sdio_error_t read_data(sdio_card_t *card, uint8_t *dst, size_t size)
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{
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uint32_t timeout = sdk_system_get_time() + IO_TIMEOUT_US;
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while (true)
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{
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if (sdk_system_get_time() >= timeout)
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return set_error(card, SDIO_ERR_TIMEOUT);
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uint8_t b = spi_read_byte();
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if (b == TOKEN_SINGLE_TRAN)
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break;
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if (b != 0xff)
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return set_error(card, SDIO_ERR_IO);
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}
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spi_read_bytes(dst, size);
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uint16_t crc = spi_read_word();
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if (card->crc_enabled && crc_ccitt(dst, size) != crc)
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return set_error(card, SDIO_ERR_CRC);
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return SDIO_ERR_NONE;
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}
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static sdio_error_t read_register(sdio_card_t *card, uint8_t cmd, void *dst)
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{
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if (command(card, cmd, 0))
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return set_error(card, SDIO_ERR_IO);
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return read_data(card, dst, 16);
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}
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static sdio_error_t write_data_block(sdio_card_t *card, uint8_t token, uint8_t *src)
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{
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if (!wait())
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return set_error(card, SDIO_ERR_TIMEOUT);
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spi_transfer_8(BUS, token);
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spi_transfer(BUS, src, NULL, SDIO_BLOCK_SIZE, SPI_8BIT);
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spi_write_word(card->crc_enabled ? crc_ccitt(src, SDIO_BLOCK_SIZE) : 0xffff);
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if ((spi_read_byte() & WRITE_RES_MASK) != WRITE_RES_OK)
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return set_error(card, SDIO_ERR_IO);
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return SDIO_ERR_NONE;
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}
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sdio_error_t sdio_init(sdio_card_t *card, uint8_t cs_pin, uint32_t high_freq_divider)
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{
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card->cs_pin = cs_pin;
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card->type = SDIO_TYPE_UNKNOWN;
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// setup SPI at 125kHz
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spi_settings_t s = {
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.mode = SPI_MODE0,
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.freq_divider = SPI_FREQ_DIV_125K,
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.msb = true,
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.endianness = SPI_LITTLE_ENDIAN,
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.minimal_pins = true
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};
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spi_set_settings(BUS, &s);
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gpio_enable(card->cs_pin, GPIO_OUTPUT);
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uint32_t timeout = sdk_system_get_time() + INIT_TIMEOUT_US;
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spi_cs_low(card);
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spi_cs_high(card);
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for (uint8_t i = 0; i < 10; i++)
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spi_read_byte();
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// Set card to the SPI idle mode
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while (command(card, CMD0, 0) != BV(R1_IDLE_STATE))
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{
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if (sdk_system_get_time() >= timeout)
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return set_error(card, SDIO_ERR_TIMEOUT);
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}
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// Enable CRC
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card->crc_enabled = command(card, CMD59, 1) == BV(R1_IDLE_STATE);
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// Get card type
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while (true)
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{
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if (command(card, CMD8, 0x1aa) & BV(R1_ILLEGAL_CMD))
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{
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card->type = SDIO_TYPE_SD1;
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break;
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}
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if ((spi_read_dword() & 0xff) == 0xaa)
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{
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card->type = SDIO_TYPE_SD2;
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break;
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}
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if (sdk_system_get_time() >= timeout)
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return set_error(card, SDIO_ERR_TIMEOUT);
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}
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if (card->type == SDIO_TYPE_SD1)
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{
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// SD1 or MMC3
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if (app_command(card, ACMD41, 0) > 1)
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{
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card->type = SDIO_TYPE_MMC;
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while (command(card, CMD1, 0))
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if (sdk_system_get_time() >= timeout)
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return set_error(card, SDIO_ERR_TIMEOUT);
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}
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else
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{
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while (app_command(card, ACMD41, 0))
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if (sdk_system_get_time() >= timeout)
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return set_error(card, SDIO_ERR_TIMEOUT);
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}
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if (command(card, CMD16, SDIO_BLOCK_SIZE))
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return set_error(card, SDIO_ERR_UNSUPPORTED);
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}
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else
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{
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// SD2 or SDHC
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while (app_command(card, ACMD41, BV(30)) != 0)
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if (sdk_system_get_time() >= timeout)
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return set_error(card, SDIO_ERR_TIMEOUT);
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}
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// read OCR
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if (command(card, CMD58, 0))
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return set_error(card, SDIO_ERR_IO);
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card->ocr.data = spi_read_dword();
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if (card->type == SDIO_TYPE_SD2 && (card->ocr.data & OCR_SDHC) == OCR_SDHC)
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card->type = SDIO_TYPE_SDHC;
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spi_set_frequency_div(BUS, high_freq_divider);
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if (read_register(card, CMD10, &card->cid.data) != SDIO_ERR_NONE)
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return card->error;
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if (read_register(card, CMD9, &card->csd.data) != SDIO_ERR_NONE)
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return card->error;
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// Card size
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if (card->csd.v1.csd_ver == 0)
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card->sectors = (uint32_t)(((card->csd.v1.c_size_high << 10) | (card->csd.v1.c_size_mid << 2) | card->csd.v1.c_size_low) + 1)
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<< (((card->csd.v1.c_size_mult_high << 1) | card->csd.v1.c_size_mult_low) + card->csd.v1.read_bl_len - 7);
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else if (card->csd.v2.csd_ver == 1)
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card->sectors = (((uint32_t)card->csd.v2.c_size_high << 16) + ((uint32_t)card->csd.v2.c_size_mid << 8) + card->csd.v2.c_size_low + 1) << 10;
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else
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return set_error(card, SDIO_ERR_UNSUPPORTED);
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return set_error(card, SDIO_ERR_NONE);
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}
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sdio_error_t sdio_read_sectors(sdio_card_t *card, uint32_t sector, uint8_t *dst, uint32_t count)
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{
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if (!count)
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return set_error(card, SDIO_ERR_IO);
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if (card->type != SDIO_TYPE_SDHC)
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sector <<= 9;
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bool multi = count > 1;
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if (command(card, multi ? CMD18 : CMD17, sector))
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return set_error(card, SDIO_ERR_IO);
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while (count--)
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{
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if (read_data(card, dst, SDIO_BLOCK_SIZE) != SDIO_ERR_NONE)
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return card->error;
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dst += SDIO_BLOCK_SIZE;
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}
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if (multi && command(card, CMD12, 0))
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return set_error(card, SDIO_ERR_IO);
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return set_error(card, SDIO_ERR_NONE);
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}
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sdio_error_t sdio_write_sectors(sdio_card_t *card, uint32_t sector, uint8_t *src, uint32_t count)
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{
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if (!count)
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return set_error(card, SDIO_ERR_IO);
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if (card->type != SDIO_TYPE_SDHC)
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sector <<= 9;
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if (count == 1)
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{
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// single block
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if (command(card, CMD24, sector))
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return set_error(card, SDIO_ERR_IO);
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return set_error(card, write_data_block(card, TOKEN_SINGLE_TRAN, src));
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}
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// send pre-erase count
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if ((card->type == SDIO_TYPE_SD1
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|| card->type == SDIO_TYPE_SD2
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|| card->type == SDIO_TYPE_SDHC)
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&& app_command(card, ACMD23, count))
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{
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return set_error(card, SDIO_ERR_IO);
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}
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if (command(card, CMD25, sector))
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return set_error(card, SDIO_ERR_IO);
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while (count--)
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{
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if (write_data_block(card, TOKEN_MULTI_TRAN, src) != SDIO_ERR_NONE)
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return card->error;
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src += SDIO_BLOCK_SIZE;
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}
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spi_transfer_8(BUS, TOKEN_STOP_TRAN);
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return set_error(card, SDIO_ERR_NONE);
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}
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sdio_error_t sdio_erase_sectors(sdio_card_t *card, uint32_t first, uint32_t last)
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{
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if (!card->csd.v1.erase_blk_en)
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{
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uint8_t mask = (card->csd.v1.sector_size_high << 1) | card->csd.v1.sector_size_low;
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if ((first & mask) || ((last + 1) & mask))
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return set_error(card, SDIO_ERR_UNSUPPORTED);
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}
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if (card->type != SDIO_TYPE_SDHC)
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{
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first <<= 9;
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last <<= 9;
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}
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if (command(card, CMD32, first)
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|| command(card, CMD33, last)
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|| command(card, CMD38, 0))
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{
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return set_error(card, SDIO_ERR_IO);
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}
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return set_error(card, wait() ? SDIO_ERR_NONE : SDIO_ERR_TIMEOUT);
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}
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