Commit graph

7 commits

Author SHA1 Message Date
Our Air Quality
5583543f14 Add an argument to ISRs. Disable interrupts while masking them. 2017-08-30 13:51:32 +10:00
Paul Sokolovsky
0962255d91 esp/interrupts.h: Add RTC interrupt number.
40002a58     $a3 = rtc_intr_handler
40002a5e     $a4 = 0x0
40002a60     $a2 = 0x3
40002a62     call ets_isr_attach
2016-08-31 01:51:23 +03:00
Paul Sokolovsky
458a6813c8 esp/interrupts.h: Add wDev FIQ interrupt number.
40251dd9     $a2 = 0x0
40251ddb     $a3 = wDev_ProcessFiq
40251dde     $a4 = 0x0
40251de0     $a0 = ets_isr_attach
40251de3     call $a0
2016-08-20 16:06:09 +03:00
Angus Gratton
812c2fef21 Removed INLINED (force inline) macro.
Progress towards #57.
2015-11-28 18:01:03 +11:00
Angus Gratton
547c57c840 Add SLC interrupt number 1. Closes #69 2015-11-20 17:25:15 +11:00
Angus Gratton
89c481c606 Simplify interrupt and RTOS timer tick handlers
RTOS Timer tick handler is now the same as any other ISR.

This causes a few subtle behaviour changes that seem OK but are worth noting:

* RTOS tick handler sdk__xt_timer_int() is now called from one stack
  frame deeper (inside _xt_isr_handler()), whereas before it was called
  from the level above in UserHandleInterrupt. I can't see any way that
  the extra ~40 bytes of stack use here hurt, though.

* sdk__xt_timer_int() was previous called after all other interrupts
  flagged in the handler, now it's called before the TIMER FRC1 & FRC2
  handlers. The tick handler doesn't appear to do anything particularly
  timing intensive, though.

* GPIO interrupt (value 3) is now lower priority than the SPI
  interrupt (value 2), whereas before it would have been called before
  SPI if both interrupts triggered at once.
2015-09-29 13:21:04 +10:00
Angus Gratton
ed8470631f Consolidate interrupt management in core as esp/interrupts.h & esp_interrupts.c 2015-09-28 22:15:40 +10:00
Renamed from include/xtensa_interrupts.h (Browse further)