Original work by @ourairquality
* Sysparam threadsafe and SPI access
* Sysparam test cases
* Fix for negative int8
* Sysparam getting bool without memory allocation. Bool tests.
* SPI flash refactoring.
* Extract common spiflash.c into core.
* Use spiflash.c in sysparam.
* Use memcpy in spiflash.c insted of hand-written version.
* Tests for spiflash.c
* Allow changing write function of stdout.
Required for stdout redirection.
Works on blocks, not chars - does _not_ use sdk_os_putc !
Should work even when linking with SPIFFS.
Also comment the point at which the bus clock that drives the uart changes on startup and comment out the change in the uart divisor. This at least allows a consistent uart baud rate during a restart if using the rate 115200.
WDT is countdown timer. Current value is accessible via VAL register. At
this time it's unclear if it's RO or RW (common sense says it shoul be RO).
Source: looking at the WDT registers on a running chip.
* Sysparam implementation
sysparam improvements
Mostly done, a few minor cleanups left.
Add sysparam_editor example
Sysparam code cleanup
Add documentation to sysparam.h
Fix up sysparam.h docs
Added a couple more debug statements
Fix potential memory leak if realloc() fails
Major sysparam overhaul
Add sysparam_get_info function
Add sysparam initialization to app_main.c
* Fixed warnings, added license
Fixes#147
* Can vary tick rate from 100Hz via configTICK_RATE_HZ. Note that the
SDK binary libraries are hard-coded to assume the tick rate is 100Hz,
so changing the tick rate may have unexpected consequences for lower
layer WiFi behaviour (such as certain kinds of timeouts happening
faster/slower.)
* Setting configCPU_CLOCK_HZ to 160MHz means ESP will set 160MHz during
initialisation. Only 80MHz and 160MHz are supported.
* Timing of tasks is no longer affected by current CPU freq (whether set
via configCPU_CLOCK_HZ or via sdk_system_update_cpu_freq().)
Previously doubling the CPU frequency would double the tick rate.
