SPI flash refactoring.
Extract common spiflash.c into core. Use spiflash.c in sysparam. Use memcpy in spiflash.c insted of hand-written version. Tests for spiflash.c
This commit is contained in:
parent
2105d5a5cd
commit
e84f47f944
9 changed files with 140 additions and 247 deletions
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@ -36,4 +36,6 @@ typedef struct {
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uint32_t status_mask;
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} sdk_flashchip_t;
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extern sdk_flashchip_t sdk_flashchip;
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#endif /* _FLASHCHIP_H */
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64
core/include/spiflash.h
Normal file
64
core/include/spiflash.h
Normal file
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@ -0,0 +1,64 @@
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/**
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* The MIT License (MIT)
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*
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* Copyright (c) 2016 sheinz (https://github.com/sheinz)
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef __SPIFLASH_H__
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#define __SPIFLASH_H__
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#include <stdint.h>
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#include <stdbool.h>
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#include "common_macros.h"
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#define SPI_FLASH_SECTOR_SIZE 4096
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/**
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* Read data from SPI flash.
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*
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* @param addr Address to read from. Can be not aligned.
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* @param buf Buffer to read to. Doesn't have to be aligned.
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* @param size Size of data to read. Buffer size must be >= than data size.
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*
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* @return true if success, otherwise false
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*/
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bool IRAM spiflash_read(uint32_t addr, uint8_t *buf, uint32_t size);
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/**
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* Write data to SPI flash.
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*
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* @param addr Address to write to. Can be not aligned.
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* @param buf Buffer of data to write to flash. Doesn't have to be aligned.
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* @param size Size of data to write. Buffer size must be >= than data size.
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*
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* @return true if success, otherwise false
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*/
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bool IRAM spiflash_write(uint32_t addr, uint8_t *buf, uint32_t size);
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/**
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* Erase a sector.
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*
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* @param addr Address of sector to erase. Must be sector aligned.
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*
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* @return true if success, otherwise false
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*/
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bool IRAM spiflash_erase_sector(uint32_t addr);
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#endif // __SPIFLASH_H__
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259
core/spiflash.c
Normal file
259
core/spiflash.c
Normal file
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@ -0,0 +1,259 @@
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/**
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* The MIT License (MIT)
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*
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* Copyright (c) 2016 sheinz (https://github.com/sheinz)
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "include/spiflash.h"
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#include "include/flashchip.h"
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#include "include/esp/rom.h"
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#include "include/esp/spi_regs.h"
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#include <FreeRTOS.h>
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#include <string.h>
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/**
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* Note about Wait_SPI_Idle.
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*
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* Each write/erase flash operation sets BUSY bit in flash status register.
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* If attempt to access flash while BUSY bit is set operation will fail.
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* Function Wait_SPI_Idle loops until this bit is not cleared.
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*
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* The approach in the following code is that each write function that is
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* accessible from the outside should leave flash in Idle state.
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* The read operations doesn't set BUSY bit in a flash. So they do not wait.
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* They relay that previous operation is completely finished.
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*
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* This approach is different from ESP8266 bootrom where Wait_SPI_Idle is
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* called where it needed and not.
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*/
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#define SPI_WRITE_MAX_SIZE 64
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// 64 bytes read causes hang
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// http://bbs.espressif.com/viewtopic.php?f=6&t=2439
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#define SPI_READ_MAX_SIZE 60
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/**
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* Low level SPI flash write. Write block of data up to 64 bytes.
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*/
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static inline void IRAM spi_write_data(sdk_flashchip_t *chip, uint32_t addr,
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uint8_t *buf, uint32_t size)
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{
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uint32_t words = size >> 2;
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if (size & 0b11) {
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words++;
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}
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Wait_SPI_Idle(chip); // wait for previous write to finish
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SPI(0).ADDR = (addr & 0x00FFFFFF) | (size << 24);
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memcpy((void*)SPI(0).W, buf, words<<2);
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__asm__ volatile("memw");
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SPI_write_enable(chip);
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SPI(0).CMD = SPI_CMD_PP;
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while (SPI(0).CMD) {}
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}
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/**
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* Write a page of flash. Data block should not cross page boundary.
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*/
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static bool IRAM spi_write_page(sdk_flashchip_t *flashchip, uint32_t dest_addr,
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uint8_t *buf, uint32_t size)
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{
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// check if block to write doesn't cross page boundary
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if (flashchip->page_size < size + (dest_addr % flashchip->page_size)) {
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return false;
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}
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if (size < 1) {
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return true;
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}
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while (size >= SPI_WRITE_MAX_SIZE) {
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spi_write_data(flashchip, dest_addr, buf, SPI_WRITE_MAX_SIZE);
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size -= SPI_WRITE_MAX_SIZE;
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dest_addr += SPI_WRITE_MAX_SIZE;
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buf += SPI_WRITE_MAX_SIZE;
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if (size < 1) {
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return true;
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}
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}
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spi_write_data(flashchip, dest_addr, buf, size);
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return true;
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}
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/**
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* Split block of data into pages and write pages.
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*/
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static bool IRAM spi_write(uint32_t addr, uint8_t *dst, uint32_t size)
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{
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if (sdk_flashchip.chip_size < (addr + size)) {
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return false;
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}
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uint32_t write_bytes_to_page = sdk_flashchip.page_size -
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(addr % sdk_flashchip.page_size); // TODO: place for optimization
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if (size < write_bytes_to_page) {
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if (!spi_write_page(&sdk_flashchip, addr, dst, size)) {
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return false;
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}
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} else {
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if (!spi_write_page(&sdk_flashchip, addr, dst, write_bytes_to_page)) {
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return false;
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}
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uint32_t offset = write_bytes_to_page;
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uint32_t pages_to_write = (size - offset) / sdk_flashchip.page_size;
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for (uint8_t i = 0; i != pages_to_write; i++) {
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if (!spi_write_page(&sdk_flashchip, addr + offset,
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dst + offset, sdk_flashchip.page_size)) {
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return false;
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}
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offset += sdk_flashchip.page_size;
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}
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if (!spi_write_page(&sdk_flashchip, addr + offset,
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dst + offset, size - offset)) {
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return false;
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}
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}
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return true;
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}
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bool IRAM spiflash_write(uint32_t addr, uint8_t *buf, uint32_t size)
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{
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bool result = false;
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if (buf) {
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vPortEnterCritical();
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Cache_Read_Disable();
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result = spi_write(addr, buf, size);
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// make sure all write operations is finished before exiting
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Wait_SPI_Idle(&sdk_flashchip);
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Cache_Read_Enable(0, 0, 1);
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vPortExitCritical();
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}
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return result;
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}
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/**
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* Read SPI flash up to 64 bytes.
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*/
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static inline void IRAM read_block(sdk_flashchip_t *chip, uint32_t addr,
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uint8_t *buf, uint32_t size)
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{
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SPI(0).ADDR = (addr & 0x00FFFFFF) | (size << 24);
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SPI(0).CMD = SPI_CMD_READ;
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while (SPI(0).CMD) {};
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__asm__ volatile("memw");
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memcpy(buf, (const void*)SPI(0).W, size);
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}
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/**
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* Read SPI flash data. Data region doesn't need to be page aligned.
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*/
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static inline bool IRAM read_data(sdk_flashchip_t *flashchip, uint32_t addr,
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uint8_t *dst, uint32_t size)
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{
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if (size < 1) {
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return true;
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}
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if ((addr + size) > flashchip->chip_size) {
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return false;
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}
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while (size >= SPI_READ_MAX_SIZE) {
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read_block(flashchip, addr, dst, SPI_READ_MAX_SIZE);
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dst += SPI_READ_MAX_SIZE;
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size -= SPI_READ_MAX_SIZE;
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addr += SPI_READ_MAX_SIZE;
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}
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if (size > 0) {
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read_block(flashchip, addr, dst, size);
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}
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return true;
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}
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bool IRAM spiflash_read(uint32_t dest_addr, uint8_t *buf, uint32_t size)
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{
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bool result = false;
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if (buf) {
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vPortEnterCritical();
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Cache_Read_Disable();
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result = read_data(&sdk_flashchip, dest_addr, buf, size);
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Cache_Read_Enable(0, 0, 1);
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vPortExitCritical();
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}
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return result;
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}
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bool IRAM spiflash_erase_sector(uint32_t addr)
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{
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if ((addr + sdk_flashchip.sector_size) > sdk_flashchip.chip_size) {
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return false;
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}
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if (addr & 0xFFF) {
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return false;
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}
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vPortEnterCritical();
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Cache_Read_Disable();
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SPI_write_enable(&sdk_flashchip);
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SPI(0).ADDR = addr & 0x00FFFFFF;
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SPI(0).CMD = SPI_CMD_SE;
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while (SPI(0).CMD) {};
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Wait_SPI_Idle(&sdk_flashchip);
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Cache_Read_Enable(0, 0, 1);
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vPortExitCritical();
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return true;
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}
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@ -8,7 +8,8 @@
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#include <string.h>
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#include <stdio.h>
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#include <sysparam.h>
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#include <espressif/spi_flash.h>
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#include "spiflash.h"
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#include "flashchip.h"
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#include <common_macros.h>
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#include "FreeRTOS.h"
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#include "semphr.h"
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@ -83,7 +84,9 @@
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#define debug(level, format, ...) if (SYSPARAM_DEBUG >= (level)) { printf("%s" format "\n", "sysparam: ", ## __VA_ARGS__); }
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#define CHECK_FLASH_OP(x) do { int __x = (x); if ((__x) != SPI_FLASH_RESULT_OK) { debug(1, "FLASH ERR: %d", __x); return SYSPARAM_ERR_IO; } } while (0);
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#define CHECK_FLASH_OP(x) do { bool __x = (x); if (!(__x)) { \
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debug(1, "FLASH ERR: %d", __x); return SYSPARAM_ERR_IO; \
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} } while (0);
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/********************* Internal datatypes and structures *********************/
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@ -120,36 +123,13 @@ static struct {
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/***************************** Internal routines *****************************/
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static sysparam_status_t _write_and_verify(uint32_t addr, const void *data, size_t data_size) {
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int i;
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uint32_t bounce[BOUNCE_BUFFER_WORDS];
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static uint8_t bounce[BOUNCE_BUFFER_SIZE];
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// The flash write can not cross a flash page boundary, the source needs to
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// be word align, so an initial alignment write is performed if necessary.
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int align = addr & 3;
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if (align) {
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size_t count = min(data_size, 4 - align);
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// Pad the word with ones, write a word.
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bounce[0] = 0xffffffff;
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memcpy(((void *)bounce) + align, data, count);
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CHECK_FLASH_OP(sdk_spi_flash_write(addr & ~3, bounce, 4));
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CHECK_FLASH_OP(sdk_spi_flash_read(addr & ~3, bounce, 4));
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if (memcmp(((void *)bounce) + align, data, count) != 0) {
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debug(1, "Flash write (@ 0x%08x) verify failed!", addr);
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return SYSPARAM_ERR_IO;
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}
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addr += count;
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data += count;
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data_size -= count;
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}
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for (i = 0; i < data_size; i += BOUNCE_BUFFER_SIZE) {
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for (int i = 0; i < data_size; i += BOUNCE_BUFFER_SIZE) {
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size_t count = min(data_size - i, BOUNCE_BUFFER_SIZE);
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// Pad the last word write ones, write words.
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bounce[(count - 1) >> 2] = 0xffffffff;
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memcpy(bounce, data + i, count);
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size_t word_count = (count + 3) & ~3;
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CHECK_FLASH_OP(sdk_spi_flash_write(addr + i, bounce, word_count));
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CHECK_FLASH_OP(sdk_spi_flash_read(addr + i, bounce, word_count));
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CHECK_FLASH_OP(spiflash_write(addr + i, bounce, count));
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CHECK_FLASH_OP(spiflash_read(addr + i, bounce, count));
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if (memcmp(data + i, bounce, count) != 0) {
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debug(1, "Flash write (@ 0x%08x) verify failed!", addr);
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return SYSPARAM_ERR_IO;
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@ -160,11 +140,10 @@ static sysparam_status_t _write_and_verify(uint32_t addr, const void *data, size
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/** Erase the sectors of a region */
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static sysparam_status_t _format_region(uint32_t addr, uint16_t num_sectors) {
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uint16_t sector = addr / sdk_flashchip.sector_size;
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int i;
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for (i = 0; i < num_sectors; i++) {
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CHECK_FLASH_OP(sdk_spi_flash_erase_sector(sector + i));
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CHECK_FLASH_OP(spiflash_erase_sector(addr + (i * SPI_FLASH_SECTOR_SIZE)));
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}
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return SYSPARAM_OK;
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}
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@ -214,7 +193,7 @@ static sysparam_status_t init_write_context(struct sysparam_context *ctx) {
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memset(ctx, 0, sizeof(*ctx));
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ctx->addr = _sysparam_info.end_addr;
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debug(3, "read entry header @ 0x%08x", ctx->addr);
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CHECK_FLASH_OP(sdk_spi_flash_read(ctx->addr, (void*) &ctx->entry, ENTRY_HEADER_SIZE));
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CHECK_FLASH_OP(spiflash_read(ctx->addr, (void*) &ctx->entry, ENTRY_HEADER_SIZE));
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return SYSPARAM_OK;
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}
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@ -240,7 +219,10 @@ static sysparam_status_t _find_entry(struct sysparam_context *ctx, uint16_t matc
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// workaround is to make sure that the next write operation
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// will always start with a compaction, which will leave off
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// the invalid data at the end and fix the issue going forward.
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debug(1, "Encountered entry with invalid length (0x%04x) @ 0x%08x (region end is 0x%08x). Truncating entries.", ctx->entry.len, ctx->addr, _sysparam_info.end_addr);
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debug(1, "Encountered entry with invalid length (0x%04x) @ 0x%08x (region end is 0x%08x). Truncating entries.",
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ctx->entry.len,
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ctx->addr, _sysparam_info.end_addr);
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_sysparam_info.force_compact = true;
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break;
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}
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@ -253,7 +235,7 @@ static sysparam_status_t _find_entry(struct sysparam_context *ctx, uint16_t matc
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}
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debug(3, "read entry header @ 0x%08x", ctx->addr);
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CHECK_FLASH_OP(sdk_spi_flash_read(ctx->addr, (void*) &ctx->entry, ENTRY_HEADER_SIZE));
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CHECK_FLASH_OP(spiflash_read(ctx->addr, (void*) &ctx->entry, ENTRY_HEADER_SIZE));
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debug(3, " idflags = 0x%04x", ctx->entry.idflags);
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if (ctx->entry.idflags == 0xffff) {
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// 0xffff is never a valid id field, so this means we've hit the
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@ -299,18 +281,11 @@ static sysparam_status_t _find_entry(struct sysparam_context *ctx, uint16_t matc
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/** Read the payload from the current entry pointed to by `ctx` */
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static inline sysparam_status_t _read_payload(struct sysparam_context *ctx, uint8_t *buffer, size_t buffer_size) {
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int i;
|
||||
uint32_t addr = ctx->addr + ENTRY_HEADER_SIZE;
|
||||
size_t size = min(buffer_size, ctx->entry.len);
|
||||
uint32_t bounce[BOUNCE_BUFFER_WORDS];
|
||||
debug(3, "read payload (%d) @ 0x%08x", size, addr);
|
||||
|
||||
for (i = 0; i < size; i += BOUNCE_BUFFER_SIZE) {
|
||||
size_t count = min(size - i, BOUNCE_BUFFER_SIZE);
|
||||
size_t word_count = (count + 3) & ~3;
|
||||
CHECK_FLASH_OP(sdk_spi_flash_read(addr + i, bounce, word_count));
|
||||
memcpy(buffer + i, bounce, count);
|
||||
}
|
||||
CHECK_FLASH_OP(spiflash_read(addr, buffer, buffer_size));
|
||||
|
||||
return SYSPARAM_OK;
|
||||
}
|
||||
|
|
@ -323,7 +298,7 @@ static inline sysparam_status_t _compare_payload(struct sysparam_context *ctx, u
|
|||
int i;
|
||||
for (i = 0; i < size; i += BOUNCE_BUFFER_SIZE) {
|
||||
int len = min(size - i, BOUNCE_BUFFER_SIZE);
|
||||
CHECK_FLASH_OP(sdk_spi_flash_read(addr + i, (void*)bounce, len));
|
||||
CHECK_FLASH_OP(spiflash_read(addr + i, (void*)bounce, len));
|
||||
if (memcmp(value + i, bounce, len)) {
|
||||
// Mismatch.
|
||||
return SYSPARAM_NOTFOUND;
|
||||
|
|
@ -425,7 +400,7 @@ static inline sysparam_status_t _delete_entry(uint32_t addr) {
|
|||
|
||||
debug(2, "Deleting entry @ 0x%08x", addr);
|
||||
debug(3, "read entry header @ 0x%08x", addr);
|
||||
CHECK_FLASH_OP(sdk_spi_flash_read(addr, (void*) &entry, ENTRY_HEADER_SIZE));
|
||||
CHECK_FLASH_OP(spiflash_read(addr, (uint8_t*) &entry, ENTRY_HEADER_SIZE));
|
||||
// Set the ID to zero to mark it as "deleted"
|
||||
entry.idflags &= ~ENTRY_FLAG_ALIVE;
|
||||
debug(3, "write entry header @ 0x%08x", addr);
|
||||
|
|
@ -453,7 +428,11 @@ static sysparam_status_t _compact_params(struct sysparam_context *ctx, int *key_
|
|||
uint16_t binary_flag;
|
||||
uint16_t num_sectors = _sysparam_info.region_size / sdk_flashchip.sector_size;
|
||||
|
||||
debug(1, "compacting region (current size %d, expect to recover %d%s bytes)...", _sysparam_info.end_addr - _sysparam_info.cur_base, ctx ? ctx->compactable : 0, (ctx && ctx->unused_keys > 0) ? "+ (unused keys present)" : "");
|
||||
debug(1, "compacting region (current size %d, expect to recover %d%s bytes)...",
|
||||
_sysparam_info.end_addr - _sysparam_info.cur_base,
|
||||
ctx ? ctx->compactable : 0,
|
||||
(ctx && ctx->unused_keys > 0) ? "+ (unused keys present)" : "");
|
||||
|
||||
status = _format_region(new_base, num_sectors);
|
||||
if (status < 0) return status;
|
||||
status = sysparam_iter_start(&iter);
|
||||
|
|
@ -534,7 +513,7 @@ sysparam_status_t sysparam_init(uint32_t base_addr, uint32_t top_addr) {
|
|||
top_addr = base_addr + sdk_flashchip.sector_size;
|
||||
}
|
||||
for (addr0 = base_addr; addr0 < top_addr; addr0 += sdk_flashchip.sector_size) {
|
||||
CHECK_FLASH_OP(sdk_spi_flash_read(addr0, (void*) &header0, REGION_HEADER_SIZE));
|
||||
CHECK_FLASH_OP(spiflash_read(addr0, (void*) &header0, REGION_HEADER_SIZE));
|
||||
if (header0.magic == SYSPARAM_MAGIC) {
|
||||
// Found a starting point...
|
||||
break;
|
||||
|
|
@ -552,7 +531,7 @@ sysparam_status_t sysparam_init(uint32_t base_addr, uint32_t top_addr) {
|
|||
} else {
|
||||
addr1 = addr0 + num_sectors * sdk_flashchip.sector_size;
|
||||
}
|
||||
CHECK_FLASH_OP(sdk_spi_flash_read(addr1, (void*) &header1, REGION_HEADER_SIZE));
|
||||
CHECK_FLASH_OP(spiflash_read(addr1, (uint8_t*) &header1, REGION_HEADER_SIZE));
|
||||
|
||||
if (header1.magic == SYSPARAM_MAGIC) {
|
||||
// Yay! Found the other one. Sanity-check it..
|
||||
|
|
@ -629,7 +608,7 @@ sysparam_status_t sysparam_create_area(uint32_t base_addr, uint16_t num_sectors,
|
|||
// we're not going to be clobbering something else important.
|
||||
for (addr = base_addr; addr < base_addr + region_size * 2; addr += SCAN_BUFFER_SIZE) {
|
||||
debug(3, "read %d words @ 0x%08x", SCAN_BUFFER_SIZE, addr);
|
||||
CHECK_FLASH_OP(sdk_spi_flash_read(addr, buffer, SCAN_BUFFER_SIZE * 4));
|
||||
CHECK_FLASH_OP(spiflash_read(addr, (uint8_t*)buffer, SCAN_BUFFER_SIZE * 4));
|
||||
for (i = 0; i < SCAN_BUFFER_SIZE; i++) {
|
||||
if (buffer[i] != 0xffffffff) {
|
||||
// Uh oh, not empty.
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue