First half of moving custom synchronisation primitive API to standard FreeRTOS
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2 changed files with 32 additions and 53 deletions
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@ -81,6 +81,7 @@ static char SWReq = 0;
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static char PendSvIsPosted = 0;
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static char PendSvIsPosted = 0;
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unsigned cpu_sr;
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unsigned cpu_sr;
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char level1_int_disabled;
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/* Each task maintains its own interrupt status in the critical nesting
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/* Each task maintains its own interrupt status in the critical nesting
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variable. */
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variable. */
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@ -263,71 +264,31 @@ vPortEndScheduler( void )
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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static unsigned int tick_lock=0;
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static unsigned int tick_lock=0;
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static char ClosedLv1Isr = 0;
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void vPortEnterCritical( void )
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void vPortEnterCritical( void )
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{
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{
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if(NMIIrqIsOn == 0)
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portDISABLE_INTERRUPTS();
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{
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uxCriticalNesting++;
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//if( uxCriticalNesting == 0 )
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{
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if( ClosedLv1Isr !=1 )
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{
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portDISABLE_INTERRUPTS();
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ClosedLv1Isr = 1;
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}
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//tick_lock = WDEV_NOW();
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}
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uxCriticalNesting++;
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}
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}
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}
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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void vPortExitCritical( void )
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void vPortExitCritical( void )
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{
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{
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if(NMIIrqIsOn == 0)
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uxCriticalNesting--;
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{
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if( uxCriticalNesting == 0 )
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uxCriticalNesting--;
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portENABLE_INTERRUPTS();
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if( uxCriticalNesting == 0 )
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{
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//if( (WDEV_NOW() - tick_lock) > 2000000 )
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//printf("INTR LOCK TOO LONG:%d\n",(WDEV_NOW() - tick_lock));
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if( ClosedLv1Isr ==1 )
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{
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ClosedLv1Isr = 0;
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portENABLE_INTERRUPTS();
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}
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}
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}
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}
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}
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void
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void
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PortDisableInt_NoNest( void )
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PortDisableInt_NoNest( void )
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{
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{
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//os_printf("ERRRRRRR\n");
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portDISABLE_INTERRUPTS();
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if(NMIIrqIsOn == 0)
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{
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if( ClosedLv1Isr !=1 )
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{
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portDISABLE_INTERRUPTS();
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ClosedLv1Isr = 1;
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}
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}
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}
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}
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void
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void
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PortEnableInt_NoNest( void )
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PortEnableInt_NoNest( void )
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{
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{
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//os_printf("ERRRRR\n");
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portENABLE_INTERRUPTS();
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if(NMIIrqIsOn == 0)
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{
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if( ClosedLv1Isr ==1 )
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{
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ClosedLv1Isr = 0;
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portENABLE_INTERRUPTS();
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}
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}
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}
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}
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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@ -131,7 +131,6 @@ extern void vTaskSwitchContext( void ); \
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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extern unsigned cpu_sr;
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/* Critical section management. */
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/* Critical section management. */
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extern void vPortEnterCritical( void );
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extern void vPortEnterCritical( void );
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@ -141,12 +140,31 @@ extern void vPortExitCritical( void );
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void PortDisableInt_NoNest( void );
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void PortDisableInt_NoNest( void );
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void PortEnableInt_NoNest( void );
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void PortEnableInt_NoNest( void );
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extern char NMIIrqIsOn;
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extern char level1_int_disabled;
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extern unsigned cpu_sr;
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inline static __attribute__((always_inline)) void _esp_disable_interrupts(void)
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{
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if(!NMIIrqIsOn && !level1_int_disabled) {
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__asm__ volatile ("rsil %0, " XTSTR(XCHAL_EXCM_LEVEL) : "=a" (cpu_sr) :: "memory");
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level1_int_disabled = 1;
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}
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}
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inline static __attribute__((always_inline)) void _esp_enable_interrupts(void)
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{
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if(!NMIIrqIsOn && level1_int_disabled) {
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level1_int_disabled = 0;
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__asm__ volatile ("wsr %0, ps" :: "a" (cpu_sr) : "memory");
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}
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}
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/* Disable interrupts, saving previous state in cpu_sr */
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/* Disable interrupts, saving previous state in cpu_sr */
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#define portDISABLE_INTERRUPTS() \
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#define portDISABLE_INTERRUPTS() _esp_disable_interrupts()
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__asm__ volatile ("rsil %0, " XTSTR(XCHAL_EXCM_LEVEL) : "=a" (cpu_sr) :: "memory")
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/* Restore interrupts to previous level saved in cpu_sr */
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/* Restore interrupts to previous level saved in cpu_sr */
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#define portENABLE_INTERRUPTS() __asm__ volatile ("wsr %0, ps" :: "a" (cpu_sr) : "memory")
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#define portENABLE_INTERRUPTS() _esp_enable_interrupts()
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#define portENTER_CRITICAL() vPortEnterCritical()
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#define portENTER_CRITICAL() vPortEnterCritical()
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#define portEXIT_CRITICAL() vPortExitCritical()
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#define portEXIT_CRITICAL() vPortExitCritical()
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