From c32a6692a0ff670bb80a9517dea404c418c76b93 Mon Sep 17 00:00:00 2001
From: Alex Stewart <Alexander.Stewart@consensuscorp.com>
Date: Wed, 19 Aug 2015 16:48:11 -0700
Subject: [PATCH] Add esp/wdt_regs.h

---
 core/include/esp/registers.h | 14 ++-----------
 core/include/esp/wdt_regs.h  | 38 ++++++++++++++++++++++++++++++++++++
 2 files changed, 40 insertions(+), 12 deletions(-)
 create mode 100644 core/include/esp/wdt_regs.h

diff --git a/core/include/esp/registers.h b/core/include/esp/registers.h
index 98c73c0..0fcd30c 100644
--- a/core/include/esp/registers.h
+++ b/core/include/esp/registers.h
@@ -19,11 +19,9 @@
 #include "esp/iomux_regs.h"
 #include "esp/gpio_regs.h"
 #include "esp/timer_regs.h"
+#include "esp/wdt_regs.h"
 #include "esp/dport_regs.h"
 
-/* Internal macro, only defined in header body */
-#define _REG(BASE, OFFSET) (*(esp_reg_t)((BASE)+(OFFSET)))
-
 /* Register base addresses
 
    You shouldn't need to use these directly.
@@ -38,19 +36,11 @@
 //#define TIMER_BASE (MMIO_BASE + 0x0600)
 #define RTC_BASE   (MMIO_BASE + 0x0700)
 //#define IOMUX_BASE (MMIO_BASE + 0x0800)
-#define WDT_BASE   (MMIO_BASE + 0x0900)
+//#define WDT_BASE   (MMIO_BASE + 0x0900)
 #define I2C_BASE   (MMIO_BASE + 0x0d00)
 #define UART1_BASE (MMIO_BASE + 0x0F00)
 #define RTCB_BASE  (MMIO_BASE + 0x1000)
 #define RTCS_BASE  (MMIO_BASE + 0x1100)
 #define RTCU_BASE  (MMIO_BASE + 0x1200)
 
-/* WDT register(s)
-
-   Not fully understood yet. Writing 0 here disables wdt.
-
-   See ROM functions esp_wdt_xxx
- */
-#define WDT_CTRL       _REG(WDT_BASE, 0x00)
-
 #endif
diff --git a/core/include/esp/wdt_regs.h b/core/include/esp/wdt_regs.h
new file mode 100644
index 0000000..a9ee063
--- /dev/null
+++ b/core/include/esp/wdt_regs.h
@@ -0,0 +1,38 @@
+/* esp/wdt_regs.h
+ *
+ * ESP8266 Watchdog Timer register definitions
+ *
+ * Not compatible with ESP SDK register access code.
+ */
+
+#ifndef _ESP_WDT_REGS_H
+#define _ESP_WDT_REGS_H
+
+#include "esp/types.h"
+#include "common_macros.h"
+
+#define WDT_BASE 0x60000900
+#define WDT (*(struct WDT_REGS *)(WDT_BASE))
+
+/* WDT register(s)
+
+   Not fully understood yet. Writing 0 to CTRL disables WDT.
+
+   See ROM functions esp_wdt_xxx
+ */
+
+struct WDT_REGS {
+    uint32_t volatile CTRL;        // 0x00
+    uint32_t volatile REG1;        // 0x04
+    uint32_t volatile REG2;        // 0x08
+    uint32_t volatile _unused[2];  // 0x0c - 0x10
+    uint32_t volatile FEED;        // 0x14
+} __attribute__ (( packed ));
+
+_Static_assert(sizeof(struct WDT_REGS) == 0x18, "WDT_REGS is the wrong size");
+
+/* Writing WDT_FEED_MAGIC to WDT.FEED register "feeds the dog" and holds off
+ * triggering for another cycle (unconfirmed) */
+#define WDT_FEED_MAGIC  0x73
+
+#endif /* _ESP_WDT_REGS_H */