Hardware SPI driver
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197
core/include/esp/spi.h
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197
core/include/esp/spi.h
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/**
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* \file Hardware SPI master driver
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*
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* Part of esp-open-rtos
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*
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* \copyright Ruslan V. Uss, 2016
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* BSD Licensed as described in the file LICENSE
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*/
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#ifndef _ESP_SPI_H_
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#define _ESP_SPI_H_
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#include <stdbool.h>
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#include <stdint.h>
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#include "esp/spi_regs.h"
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// FIXME Better to define it somewhere else. This is not the CPU frequency!
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#define SYSTEM_BUS_FREQ 80000000UL
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/**
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* Macro for use with spi_init and spi_set_frequency_div.
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* SPI frequency = 80000000 / divider / count
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* dvider must be in 1..8192 and count in 1..64
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*/
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#define SPI_GET_FREQ_DIV(divider, count) (((count) << 16) | (divider))
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/**
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* Predefinded SPI frequency dividers
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*/
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#define SPI_FREQ_DIV_125K SPI_GET_FREQ_DIV(64, 10) ///< 125kHz
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#define SPI_FREQ_DIV_250K SPI_GET_FREQ_DIV(32, 10) ///< 250kHz
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#define SPI_FREQ_DIV_500K SPI_GET_FREQ_DIV(16, 10) ///< 500kHz
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#define SPI_FREQ_DIV_1M SPI_GET_FREQ_DIV(8, 10) ///< 1MHz
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#define SPI_FREQ_DIV_2M SPI_GET_FREQ_DIV(4, 10) ///< 2MHz
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#define SPI_FREQ_DIV_4M SPI_GET_FREQ_DIV(2, 10) ///< 4MHz
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#define SPI_FREQ_DIV_8M SPI_GET_FREQ_DIV(5, 2) ///< 8MHz
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#define SPI_FREQ_DIV_10M SPI_GET_FREQ_DIV(4, 2) ///< 10MHz
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#define SPI_FREQ_DIV_20M SPI_GET_FREQ_DIV(2, 2) ///< 20MHz
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#define SPI_FREQ_DIV_40M SPI_GET_FREQ_DIV(1, 2) ///< 40MHz
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#define SPI_FREQ_DIV_80M SPI_GET_FREQ_DIV(1, 1) ///< 80MHz
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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typedef enum _spi_mode_t {
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SPI_MODE0 = 0, ///< CPOL = 0, CPHA = 0
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SPI_MODE1, ///< CPOL = 0, CPHA = 1
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SPI_MODE2, ///< CPOL = 1, CPHA = 0
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SPI_MODE3 ///< CPOL = 1, CPHA = 1
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} spi_mode_t;
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typedef enum _spi_endianness_t {
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SPI_LITTLE_ENDIAN,
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SPI_BIG_ENDIAN
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} spi_endianness_t;
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/**
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* \brief Initalize SPI bus
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* Initalize specified SPI bus and setup appropriate pins:
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* Bus 0:
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* - MISO = GPIO 7
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* - MOSI = GPIO 8
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* - SCK = GPIO 6
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* - CS0 = GPIO 11 (if minimal_pins is false)
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* - HD = GPIO 9 (if minimal_pins is false)
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* - WP = GPIO 10 (if minimal_pins is false)
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* Bus 1:
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* - MISO = GPIO 12
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* - MOSI = GPIO 13
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* - SCK = GPIO 14
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* - CS0 = GPIO 15 (if minimal_pins is false)
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* Note that system flash memory is on the bus 0!
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* \param bus Bus ID: 0 - system, 1 - user
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* \param mode Bus mode
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* \param freq_divider SPI bus frequency divider, use SPI_GET_FREQ_DIV() or predefined value
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* \param msb Bit order, MSB first if true
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* \param endianness Byte order
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* \param minimal_pins If true use the minimal set of pins: MISO, MOSI and SCK.
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* \return false when error
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*/
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bool spi_init(uint8_t bus, spi_mode_t mode, uint32_t freq_divider, bool msb, spi_endianness_t endianness, bool minimal_pins);
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/**
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* \brief Set SPI bus mode
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* \param bus Bus ID: 0 - system, 1 - user
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* \param mode Bus mode.
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*/
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void spi_set_mode(uint8_t bus, spi_mode_t mode);
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/**
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* \brief Get mode of the SPI bus
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* \param bus Bus ID: 0 - system, 1 - user
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* \return Bus mode
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*/
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inline spi_mode_t spi_get_mode(uint8_t bus)
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{
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return (spi_mode_t)((SPI(bus).PIN & SPI_PIN_IDLE_EDGE ? 2 : 0) | (SPI(bus).USER0 & SPI_USER0_CLOCK_OUT_EDGE ? 1 : 0));
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}
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/**
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* \brief Set SPI bus frequency
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* Examples:
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*
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* spi_set_frequency_div(1, SPI_FREQ_DIV_8M); // 8 MHz, predefined value
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* ...
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* spi_set_frequency_div(1, SPI_GET_FREQ_DIV(8, 10)); // divider = 8, count = 10,
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* // frequency = 80000000 Hz / 8 / 10 = 1000000 Hz
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*
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* \param bus Bus ID: 0 - system, 1 - user
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* \param divider Predivider of the system bus frequency (80MHz) in the 2 low
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* bytes and period pulses count in the third byte. Please note that
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* divider must be be in range 1..8192 and count in range 2..64. Use the
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* macro SPI_GET_FREQ_DIV(divider, count) to get the correct parameter value.
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*/
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void spi_set_frequency_div(uint8_t bus, uint32_t divider);
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/**
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* \brief Get SPI bus frequency
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* Note the result is in Hz.
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* \param bus Bus ID: 0 - system, 1 - user
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* \return SPI frequency, Hz
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*/
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inline uint32_t spi_get_frequency_hz(uint8_t bus)
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{
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return SYSTEM_BUS_FREQ /
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(((SPI(bus).CLOCK >> SPI_CLOCK_DIV_PRE_S) & SPI_CLOCK_DIV_PRE_M) + 1) /
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(((SPI(bus).CLOCK >> SPI_CLOCK_COUNT_NUM_S) & SPI_CLOCK_COUNT_NUM_M) + 1);
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}
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/**
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* \brief Set SPI bus bit order
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* \param bus Bus ID: 0 - system, 1 - user
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* \param msb Bit order, MSB first if true
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*/
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void spi_set_msb(uint8_t bus, bool msb);
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/**
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* \brief Get SPI bus bit order
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* \param bus Bus ID: 0 - system, 1 - user
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* \return msb Bit order, MSB first if true
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*/
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inline bool spi_get_msb(uint8_t bus)
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{
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return !(SPI(bus).CTRL0 & (SPI_CTRL0_WR_BIT_ORDER | SPI_CTRL0_RD_BIT_ORDER));
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}
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/**
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* \brief Set SPI bus byte order
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* This value is ignored when transferring buffer with spi_transfer()
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* \param bus Bus ID: 0 - system, 1 - user
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* \param endianness Byte order
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*/
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void spi_set_endianness(uint8_t bus, spi_endianness_t endianness);
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/**
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* \brief Get SPI bus byte order
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* \param bus Bus ID: 0 - system, 1 - user
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* \return endianness Byte order
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*/
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inline spi_endianness_t spi_get_endianness(uint8_t bus)
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{
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return SPI(bus).USER0 & (SPI_USER0_WR_BYTE_ORDER | SPI_USER0_RD_BYTE_ORDER)
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? SPI_BIG_ENDIAN
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: SPI_LITTLE_ENDIAN;
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}
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/**
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* \brief Transfer byte over SPI
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* \param bus Bus ID: 0 - system, 1 - user
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* \param data Byte to send
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* \return Received byte
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*/
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uint8_t spi_transfer_8(uint8_t bus, uint8_t data);
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/**
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* \brief Transfer word over SPI
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* \param bus Bus ID: 0 - system, 1 - user
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* \param data Word to send
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* \return Received word
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*/
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uint16_t spi_transfer_16(uint8_t bus, uint16_t data);
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/**
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* \brief Transfer dword over SPI
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* \param bus Bus ID: 0 - system, 1 - user
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* \param data dword to send
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* \return Received dword
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*/
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uint32_t spi_transfer_32(uint8_t bus, uint32_t data);
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/**
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* \brief Transfer buffer over SPI
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* \param bus Bus ID: 0 - system, 1 - user
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* \param data Data to send. Buffer contents will be replaced with received data
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* \param len Buffer size
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*/
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void spi_transfer(uint8_t bus, void *data, size_t len);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _ESP_SPI_H_ */
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@ -152,6 +152,7 @@ _Static_assert(sizeof(struct SPI_REGS) == 0x100, "SPI_REGS is the wrong size");
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#define SPI_USER0_CS_SETUP BIT(5)
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#define SPI_USER0_CS_HOLD BIT(4)
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#define SPI_USER0_FLASH_MODE BIT(2)
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#define SPI_USER0_DUPLEX BIT(0)
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/* Details for USER1 register */
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@ -173,6 +174,7 @@ _Static_assert(sizeof(struct SPI_REGS) == 0x100, "SPI_REGS is the wrong size");
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/* Details for PIN register */
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#define SPI_PIN_IDLE_EDGE BIT(29) ///< CPOL
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#define SPI_PIN_CS2_DISABLE BIT(2)
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#define SPI_PIN_CS1_DISABLE BIT(1)
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#define SPI_PIN_CS0_DISABLE BIT(0)
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