SSD1306 OLED Display driver refactored (#290)
* SSD1306 OLED Display driver SPI refactored: - SPI connection support - different display sizes support * I2C address added to device descriptor * Small fix
This commit is contained in:
Ruslan V. Uss
sheinz
parent
2d933cf0e4
commit
b807eefeaf
11 changed files with 710 additions and 343 deletions
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@ -1,376 +1,406 @@
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/**
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* SSD1306 OLED display driver for esp-open-rtos.
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*
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* Copyright (c) 2016 urx (https://github.com/urx),
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* Ruslan V. Uss (https://github.com/UncleRus)
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*
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* MIT Licensed as described in the file LICENSE
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*
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* @todo Scrolling, fonts
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*/
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#include "ssd1306.h"
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#include <stdio.h>
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#include <i2c/i2c.h>
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#if (SSD1306_I2C_SUPPORT)
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#include <i2c/i2c.h>
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#endif
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#if (SSD1306_SPI4_SUPPORT)
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#include <esp/spi.h>
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#endif
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#include <esp/gpio.h>
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#include <FreeRTOS.h>
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#include <task.h>
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#include "ssd1306.h"
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#define SPI_BUS 1
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//#define SSD1306_DEBUG
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/* SSD1306 commands */
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#define SSD1306_SET_MEM_ADDR_MODE (0x20)
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#define SSD1306_ADDR_MODE_HORIZ (0x0)
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#define SSD1306_ADDR_MODE_VERT (0x1)
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#define SSD1306_ADDR_MODE_PAGE (0x2)
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#define SSD1306_SET_MEM_ADDR_MODE (0x20)
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#define SSD1306_SET_COL_ADDR (0x21)
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#define SSD1306_SET_PAGE_ADDR (0x22)
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#define SSD1306_SET_DISP_START_LINE (0x40)
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#define SSD1306_SET_CONTRAST (0x81)
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#define SSD1306_SET_SEGMENT_REMAP0 (0xA0)
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#define SSD1306_SET_SEGMENT_REMAP1 (0xA1)
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#define SSD1306_SET_ENTIRE_DISP_ON (0xA5)
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#define SSD1306_SET_ENTIRE_DISP_OFF (0xA4)
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#define SSD1306_SET_INVERSION_OFF (0xA6)
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#define SSD1306_SET_INVERSION_ON (0xA7)
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#define SSD1306_SET_COL_ADDR (0x21)
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#define SSD1306_SET_PAGE_ADDR (0x22)
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#define SSD1306_SET_DISP_START_LINE (0x40)
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#define SSD1306_SET_CONTRAST (0x81)
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#define SSD1306_SET_SEGMENT_REMAP0 (0xA0)
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#define SSD1306_SET_SEGMENT_REMAP1 (0xA1)
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#define SSD1306_SET_ENTIRE_DISP_ON (0xA5)
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#define SSD1306_SET_ENTIRE_DISP_OFF (0xA4)
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#define SSD1306_SET_INVERSION_OFF (0xA6)
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#define SSD1306_SET_INVERSION_ON (0xA7)
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#define SSD1306_SET_MUX_RATIO (0xA8)
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#define SSD1306_MUX_RATIO_MASK (0x3F)
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#define SSD1306_SET_DISPLAY_OFF (0xAE)
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#define SSD1306_SET_DISPLAY_ON (0xAF)
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#define SSD1306_SET_SCAN_DIR_FWD (0xC0)
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#define SSD1306_SET_SCAN_DIR_BWD (0xC8)
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#define SSD1306_SET_DISPLAY_OFFSET (0xD3)
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#define SSD1306_SET_OSC_FREQ (0xD5)
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#define SSD1306_SET_PRE_CHRG_PER (0xD9)
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#define SSD1306_SET_MUX_RATIO (0xA8)
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#define SSD1306_MUX_RATIO_MASK (0x3F)
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#define SSD1306_SET_DISPLAY_OFF (0xAE)
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#define SSD1306_SET_DISPLAY_ON (0xAF)
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#define SSD1306_SET_SCAN_DIR_FWD (0xC0)
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#define SSD1306_SET_SCAN_DIR_BWD (0xC8)
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#define SSD1306_SET_DISPLAY_OFFSET (0xD3)
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#define SSD1306_SET_OSC_FREQ (0xD5)
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#define SSD1306_SET_PRE_CHRG_PER (0xD9)
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#define SSD1306_SET_COM_PINS_HW_CFG (0xDA)
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#define SSD1306_COM_PINS_HW_CFG_MASK (0x32)
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#define SSD1306_SEQ_COM_PINS_CFG (0x02)
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#define SSD1306_ALT_COM_PINS_CFG (0x12)
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#define SSD1306_COM_LR_REMAP_OFF (0x02)
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#define SSD1306_COM_LR_REMAP_ON (0x22)
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#define SSD1306_SET_COM_PINS_HW_CFG (0xDA)
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#define SSD1306_COM_PINS_HW_CFG_MASK (0x32)
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#define SSD1306_SEQ_COM_PINS_CFG (0x02)
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#define SSD1306_ALT_COM_PINS_CFG (0x12)
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#define SSD1306_COM_LR_REMAP_OFF (0x02)
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#define SSD1306_COM_LR_REMAP_ON (0x22)
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#define SSD1306_SET_DESEL_LVL (0xDB)
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#define SSD1306_SET_NOP (0xE3)
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#define SSD1306_SET_DESEL_LVL (0xDB)
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#define SSD1306_SET_NOP (0xE3)
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#define SSD1306_SET_CHARGE_PUMP (0x8D)
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#define SSD1306_CHARGE_PUMP_EN (0x14)
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#define SSD1306_CHARGE_PUMP_DIS (0x10)
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#define SSD1306_SET_CHARGE_PUMP (0x8D)
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#define SSD1306_CHARGE_PUMP_EN (0x14)
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#define SSD1306_CHARGE_PUMP_DIS (0x10)
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#ifdef SSD1306_DEBUG
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#define debug(fmt, ...) printf("%s" fmt "\n", "SSD1306", ## __VA_ARGS__);
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#define debug(fmt, ...) printf("%s: " fmt "\n", "SSD1306", ## __VA_ARGS__)
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#else
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#define debug(fmt, ...)
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#endif
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/* Issue a command to SSD1306 device
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* format such follows:
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* I2C proto format:
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* |S|Slave Address|W|ACK|0x00|Command|Ack|P|
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*
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* in case of two-bytes command here will be Data byte
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* right after command byte.
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* right after the command byte.
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*/
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int ssd1306_command(uint8_t cmd)
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int ssd1306_command(const ssd1306_t *dev, uint8_t cmd)
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{
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i2c_start();
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if (!i2c_write(SSD1306_I2C_ADDR << 1)) {
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debug("Error while xmitting I2C slave address\n");
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i2c_stop();
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return -EIO;
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debug("Command: 0x%02x", cmd);
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switch (dev->protocol) {
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#if (SSD1306_I2C_SUPPORT)
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case SSD1306_PROTO_I2C:
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i2c_start();
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if (!i2c_write(dev->addr << 1)) {
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debug("Error while xmitting I2C slave address\n");
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i2c_stop();
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return -EIO;
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}
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if (!i2c_write(0x00)) {
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debug("Error while xmitting transmission type\n");
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i2c_stop();
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return -EIO;
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}
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if (!i2c_write(cmd)) {
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debug("Error while xmitting command: 0x%02X\n", cmd);
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i2c_stop();
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return -EIO;
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}
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i2c_stop();
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break;
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#endif
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#if (SSD1306_SPI4_SUPPORT)
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case SSD1306_PROTO_SPI4:
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gpio_write(dev->dc_pin, false); // command mode
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gpio_write(dev->cs_pin, false);
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spi_transfer_8(SPI_BUS, cmd);
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gpio_write(dev->cs_pin, true);
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break;
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#endif
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default:
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debug("Unsupported protocol");
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return -EPROTONOSUPPORT;
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}
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if (!i2c_write(0x00)) {
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debug("Error while xmitting transmission type\n");
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i2c_stop();
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return -EIO;
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}
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if (!i2c_write(cmd)) {
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debug("Error while xmitting command: 0x%02X\n", cmd);
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i2c_stop();
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return -EIO;
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}
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i2c_stop();
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return 0;
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}
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/* Perform default init routine according
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* to SSD1306 datasheet from adafruit.com */
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int ssd1306_init()
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int ssd1306_init(const ssd1306_t *dev)
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{
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if (!ssd1306_display_on(false) &&
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!ssd1306_set_osc_freq(0x80) &&
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!ssd1306_set_mux_ratio(SSD1306_ROWS-1) &&
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!ssd1306_set_display_offset(0x0) &&
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!ssd1306_set_display_start_line(0x0) &&
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!ssd1306_set_charge_pump_enabled(true) &&
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!ssd1306_set_mem_addr_mode(SSD1306_ADDR_MODE_HORIZ) &&
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!ssd1306_set_segment_remapping_enabled(false) &&
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!ssd1306_set_scan_direction_fwd(true) &&
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!ssd1306_set_com_pin_hw_config(SSD1306_ALT_COM_PINS_CFG) &&
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!ssd1306_set_contrast(0x9f) &&
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!ssd1306_set_precharge_period(0xf1) &&
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!ssd1306_set_deseltct_lvl(0x40) &&
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!ssd1306_set_whole_display_lighting(true) &&
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!ssd1306_set_inversion(false) &&
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!ssd1306_display_on(true)) {
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uint8_t pin_cfg;
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switch (dev->height) {
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case 16:
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case 32:
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pin_cfg = 0x02;
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break;
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case 64:
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pin_cfg = 0x12;
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break;
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default:
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debug("Unsupported screen height");
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return -ENOTSUP;
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}
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switch (dev->protocol) {
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#if (SSD1306_I2C_SUPPORT)
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case SSD1306_PROTO_I2C:
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break;
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#endif
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#if (SSD1306_SPI4_SUPPORT)
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case SSD1306_PROTO_SPI4:
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gpio_enable(dev->cs_pin, GPIO_OUTPUT);
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gpio_write(dev->cs_pin, true);
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gpio_enable(dev->dc_pin, GPIO_OUTPUT);
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spi_init(SPI_BUS, SPI_MODE0, SPI_FREQ_DIV_8M, true, SPI_LITTLE_ENDIAN, true);
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break;
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#endif
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default:
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debug("Unsupported protocol");
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return -EPROTONOSUPPORT;
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}
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if (!ssd1306_display_on(dev, false) &&
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!ssd1306_set_osc_freq(dev, 0x80) &&
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!ssd1306_set_mux_ratio(dev, dev->height - 1) &&
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!ssd1306_set_display_offset(dev, 0x0) &&
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!ssd1306_set_display_start_line(dev, 0x0) &&
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!ssd1306_set_charge_pump_enabled(dev, true) &&
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!ssd1306_set_mem_addr_mode(dev, SSD1306_ADDR_MODE_HORIZONTAL) &&
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!ssd1306_set_segment_remapping_enabled(dev, false) &&
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!ssd1306_set_scan_direction_fwd(dev, true) &&
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!ssd1306_set_com_pin_hw_config(dev, pin_cfg) &&
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!ssd1306_set_contrast(dev, 0x9f) &&
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!ssd1306_set_precharge_period(dev, 0xf1) &&
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!ssd1306_set_deseltct_lvl(dev, 0x40) &&
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!ssd1306_set_whole_display_lighting(dev, true) &&
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!ssd1306_set_inversion(dev, false) &&
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!ssd1306_display_on(dev, true)) {
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return 0;
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}
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return -EIO;
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}
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/*
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* frame buffer of SSD1306 consists of 8 pages of 128 bits each
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*
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*/
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int ssd1306_load_frame_buffer(uint8_t buf[], uint16_t len)
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int ssd1306_load_frame_buffer(const ssd1306_t *dev, uint8_t buf[])
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{
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uint16_t i;
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uint8_t j;
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ssd1306_set_column_addr(0, 127);
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ssd1306_set_page_addr(0, 7);
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ssd1306_set_column_addr(dev, 0, dev->width - 1);
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ssd1306_set_page_addr(dev, 0, dev->height / 8 - 1);
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for (i=0; i<len; i++) {
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i2c_start();
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if (!i2c_write(SSD1306_I2C_ADDR << 1)) {
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debug("Error while xmitting I2C slave address\n");
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i2c_stop();
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return -EIO;
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}
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if (!i2c_write(0x40)) {
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debug("Error while xmitting transmission type\n");
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i2c_stop();
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return -EIO;
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}
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size_t len = dev->width * dev->height / 8;
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for (j=0;j<16;j++) {
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if (!i2c_write(buf[i])) {
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debug("Error while writing to GDDRAM\n");
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switch (dev->protocol) {
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#if (SSD1306_I2C_SUPPORT)
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case SSD1306_PROTO_I2C:
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for (i = 0; i < len; i++) {
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i2c_start();
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if (!i2c_write(dev->addr << 1)) {
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debug("Error while xmitting I2C slave address\n");
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i2c_stop();
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return -EIO;
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}
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if (!i2c_write(0x40)) {
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debug("Error while xmitting transmission type\n");
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i2c_stop();
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return -EIO;
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}
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for (j = 0; j < 16; j++) {
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if (!i2c_write(buf ? buf[i] : 0)) {
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debug("Error while writing to GDDRAM\n");
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i2c_stop();
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return -EIO;
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}
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i++;
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}
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i--;
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i2c_stop();
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return -EIO;
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taskYIELD();
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}
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i++;
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}
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i--;
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i2c_stop();
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taskYIELD();
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break;
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#endif
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#if (SSD1306_SPI4_SUPPORT)
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case SSD1306_PROTO_SPI4:
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gpio_write(dev->dc_pin, true); // data mode
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gpio_write(dev->cs_pin, false);
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if (buf)
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spi_transfer(SPI_BUS, buf, NULL, len, SPI_8BIT);
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else
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for (i = 0; i < len; i ++) {
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spi_transfer_8(SPI_BUS, 0);
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}
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gpio_write(dev->cs_pin, true);
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break;
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#endif
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default:
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debug("Unsupported protocol");
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return -EPROTONOSUPPORT;
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}
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return 0;
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}
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int ssd1306_clear_screen()
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int ssd1306_display_on(const ssd1306_t *dev, bool on)
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{
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uint16_t i = 0;
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uint8_t j = 0;
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ssd1306_set_column_addr(0, 127);
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ssd1306_set_page_addr(0, 7);
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while (i < (SSD1306_ROWS*SSD1306_COLS/8)) {
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i2c_start();
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if (!i2c_write(SSD1306_I2C_ADDR << 1)) {
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debug("Error while xmitting I2C slave address\n");
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i2c_stop();
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return -EIO;
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}
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if (!i2c_write(0x40)) {
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debug("Error while xmitting transmission type\n");
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i2c_stop();
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return -EIO;
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}
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/* write 16 bytes of data and then give resources to another task */
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while (j < 16) {
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if (!i2c_write(0x0)) {
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debug("Error while writing to GDDRAM\n");
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i2c_stop();
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return -EIO;
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}
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i++;
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j++;
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}
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i--;
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j = 0;
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i2c_stop();
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taskYIELD();
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}
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return 0;
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return ssd1306_command(dev, on ? SSD1306_SET_DISPLAY_ON : SSD1306_SET_DISPLAY_OFF);
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}
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int ssd1306_display_on(bool on)
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int ssd1306_set_display_start_line(const ssd1306_t *dev, uint8_t start)
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{
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if (on)
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return ssd1306_command(SSD1306_SET_DISPLAY_ON);
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if (start > 63)
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return -EINVAL;
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return ssd1306_command(SSD1306_SET_DISPLAY_OFF);
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return ssd1306_command(dev, SSD1306_SET_DISP_START_LINE | start);
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}
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int ssd1306_set_display_start_line(uint8_t start)
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int ssd1306_set_display_offset(const ssd1306_t *dev, uint8_t offset)
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{
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return ssd1306_command(SSD1306_SET_DISP_START_LINE | start);
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}
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int ssd1306_set_display_offset(uint8_t offset)
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{
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int err = 0;
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if ((err = ssd1306_command(SSD1306_SET_DISPLAY_OFFSET)))
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return err;
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return ssd1306_command(offset);
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}
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int ssd1306_set_charge_pump_enabled(bool enabled)
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{
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int err = 0;
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if ((err = ssd1306_command(SSD1306_SET_CHARGE_PUMP)))
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return err;
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if (enabled)
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return ssd1306_command(SSD1306_CHARGE_PUMP_EN);
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return ssd1306_command(SSD1306_CHARGE_PUMP_DIS);
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}
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int ssd1306_set_mem_addr_mode(uint8_t mode)
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{
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if (mode >= 0x3)
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if (offset > 63)
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return -EINVAL;
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||||
|
||||
int err = 0;
|
||||
if ((err = ssd1306_command(SSD1306_SET_MEM_ADDR_MODE)))
|
||||
if ((err = ssd1306_command(dev, SSD1306_SET_DISPLAY_OFFSET)))
|
||||
return err;
|
||||
|
||||
return ssd1306_command(mode);
|
||||
return ssd1306_command(dev, offset);
|
||||
}
|
||||
|
||||
int ssd1306_set_segment_remapping_enabled(bool on)
|
||||
{
|
||||
if (on)
|
||||
return ssd1306_command(SSD1306_SET_SEGMENT_REMAP1);
|
||||
|
||||
return ssd1306_command(SSD1306_SET_SEGMENT_REMAP0);
|
||||
}
|
||||
|
||||
int ssd1306_set_scan_direction_fwd(bool fwd)
|
||||
{
|
||||
if (fwd)
|
||||
return ssd1306_command(SSD1306_SET_SCAN_DIR_FWD);
|
||||
|
||||
return ssd1306_command(SSD1306_SET_SCAN_DIR_BWD);
|
||||
}
|
||||
|
||||
int ssd1306_set_com_pin_hw_config(uint8_t config)
|
||||
int ssd1306_set_charge_pump_enabled(const ssd1306_t *dev, bool enabled)
|
||||
{
|
||||
int err = 0;
|
||||
if ((err = ssd1306_command(SSD1306_SET_COM_PINS_HW_CFG)))
|
||||
if ((err = ssd1306_command(dev, SSD1306_SET_CHARGE_PUMP)))
|
||||
return err;
|
||||
|
||||
return ssd1306_command(config & SSD1306_COM_PINS_HW_CFG_MASK);
|
||||
return ssd1306_command(dev, enabled ? SSD1306_CHARGE_PUMP_EN : SSD1306_CHARGE_PUMP_DIS);
|
||||
}
|
||||
|
||||
int ssd1306_set_contrast(uint8_t contrast)
|
||||
int ssd1306_set_mem_addr_mode(const ssd1306_t *dev, ssd1306_mem_addr_mode_t mode)
|
||||
{
|
||||
int err = 0;
|
||||
if ((err = ssd1306_command(SSD1306_SET_CONTRAST)))
|
||||
if ((err = ssd1306_command(dev, SSD1306_SET_MEM_ADDR_MODE)))
|
||||
return err;
|
||||
|
||||
return ssd1306_command(contrast);
|
||||
return ssd1306_command(dev, mode);
|
||||
}
|
||||
|
||||
int ssd1306_set_inversion(bool on)
|
||||
int ssd1306_set_segment_remapping_enabled(const ssd1306_t *dev, bool on)
|
||||
{
|
||||
if (on)
|
||||
return ssd1306_command(SSD1306_SET_INVERSION_ON);
|
||||
|
||||
return ssd1306_command(SSD1306_SET_INVERSION_OFF);
|
||||
return ssd1306_command(dev, on ? SSD1306_SET_SEGMENT_REMAP1 : SSD1306_SET_SEGMENT_REMAP0);
|
||||
}
|
||||
|
||||
int ssd1306_set_osc_freq(uint8_t osc_freq)
|
||||
int ssd1306_set_scan_direction_fwd(const ssd1306_t *dev, bool fwd)
|
||||
{
|
||||
return ssd1306_command(dev, fwd ? SSD1306_SET_SCAN_DIR_FWD : SSD1306_SET_SCAN_DIR_BWD);
|
||||
}
|
||||
|
||||
int ssd1306_set_com_pin_hw_config(const ssd1306_t *dev, uint8_t config)
|
||||
{
|
||||
int err = 0;
|
||||
if ((err = ssd1306_command(SSD1306_SET_OSC_FREQ)))
|
||||
if ((err = ssd1306_command(dev, SSD1306_SET_COM_PINS_HW_CFG)))
|
||||
return err;
|
||||
|
||||
return ssd1306_command(osc_freq);
|
||||
return ssd1306_command(dev, config & SSD1306_COM_PINS_HW_CFG_MASK);
|
||||
}
|
||||
|
||||
int ssd1306_set_mux_ratio(uint8_t ratio)
|
||||
int ssd1306_set_contrast(const ssd1306_t *dev, uint8_t contrast)
|
||||
{
|
||||
if (ratio < 15)
|
||||
int err = 0;
|
||||
if ((err = ssd1306_command(dev, SSD1306_SET_CONTRAST)))
|
||||
return err;
|
||||
|
||||
return ssd1306_command(dev, contrast);
|
||||
}
|
||||
|
||||
int ssd1306_set_inversion(const ssd1306_t *dev, bool on)
|
||||
{
|
||||
return ssd1306_command(dev, on ? SSD1306_SET_INVERSION_ON : SSD1306_SET_INVERSION_OFF);
|
||||
}
|
||||
|
||||
int ssd1306_set_osc_freq(const ssd1306_t *dev, uint8_t osc_freq)
|
||||
{
|
||||
int err = 0;
|
||||
if ((err = ssd1306_command(dev, SSD1306_SET_OSC_FREQ)))
|
||||
return err;
|
||||
|
||||
return ssd1306_command(dev, osc_freq);
|
||||
}
|
||||
|
||||
int ssd1306_set_mux_ratio(const ssd1306_t *dev, uint8_t ratio)
|
||||
{
|
||||
if (ratio < 15 || ratio > 63)
|
||||
return -EINVAL;
|
||||
|
||||
int err = 0;
|
||||
if ((err = ssd1306_command(SSD1306_SET_MUX_RATIO)))
|
||||
if ((err = ssd1306_command(dev, SSD1306_SET_MUX_RATIO)))
|
||||
return err;
|
||||
|
||||
return ssd1306_command(ratio);
|
||||
return ssd1306_command(dev, ratio);
|
||||
}
|
||||
|
||||
int ssd1306_set_column_addr(uint8_t start, uint8_t stop)
|
||||
int ssd1306_set_column_addr(const ssd1306_t *dev, uint8_t start, uint8_t stop)
|
||||
{
|
||||
int err = 0;
|
||||
if ((err = ssd1306_command(SSD1306_SET_COL_ADDR)))
|
||||
if ((err = ssd1306_command(dev, SSD1306_SET_COL_ADDR)))
|
||||
return err;
|
||||
|
||||
if ((err = ssd1306_command(start)))
|
||||
if ((err = ssd1306_command(dev, start)))
|
||||
return err;
|
||||
|
||||
return ssd1306_command(stop);
|
||||
return ssd1306_command(dev, stop);
|
||||
}
|
||||
|
||||
int ssd1306_set_page_addr(uint8_t start, uint8_t stop)
|
||||
int ssd1306_set_page_addr(const ssd1306_t *dev, uint8_t start, uint8_t stop)
|
||||
{
|
||||
int err = 0;
|
||||
if ((err = ssd1306_command(SSD1306_SET_PAGE_ADDR)))
|
||||
if ((err = ssd1306_command(dev, SSD1306_SET_PAGE_ADDR)))
|
||||
return err;
|
||||
|
||||
if ((err = ssd1306_command(start)))
|
||||
if ((err = ssd1306_command(dev, start)))
|
||||
return err;
|
||||
|
||||
return ssd1306_command(stop);
|
||||
return ssd1306_command(dev, stop);
|
||||
}
|
||||
|
||||
int ssd1306_set_precharge_period(uint8_t prchrg)
|
||||
int ssd1306_set_precharge_period(const ssd1306_t *dev, uint8_t prchrg)
|
||||
{
|
||||
int err = 0;
|
||||
if ((err = ssd1306_command(SSD1306_SET_PRE_CHRG_PER)))
|
||||
if ((err = ssd1306_command(dev, SSD1306_SET_PRE_CHRG_PER)))
|
||||
return err;
|
||||
|
||||
return ssd1306_command(prchrg);
|
||||
return ssd1306_command(dev, prchrg);
|
||||
}
|
||||
|
||||
int ssd1306_set_deseltct_lvl(uint8_t lvl)
|
||||
int ssd1306_set_deseltct_lvl(const ssd1306_t *dev, uint8_t lvl)
|
||||
{
|
||||
int err = 0;
|
||||
if ((err = ssd1306_command(SSD1306_SET_DESEL_LVL)))
|
||||
if ((err = ssd1306_command(dev, SSD1306_SET_DESEL_LVL)))
|
||||
return err;
|
||||
|
||||
return ssd1306_command(lvl);
|
||||
return ssd1306_command(dev, lvl);
|
||||
}
|
||||
|
||||
int ssd1306_set_whole_display_lighting(bool light)
|
||||
int ssd1306_set_whole_display_lighting(const ssd1306_t *dev, bool light)
|
||||
{
|
||||
if (light)
|
||||
return ssd1306_command(SSD1306_SET_ENTIRE_DISP_ON);
|
||||
|
||||
return ssd1306_command(SSD1306_SET_ENTIRE_DISP_OFF);
|
||||
return ssd1306_command(dev, light ? SSD1306_SET_ENTIRE_DISP_ON : SSD1306_SET_ENTIRE_DISP_OFF);
|
||||
}
|
||||
|
||||
|
||||
/* one byte of xbm - 8 dots in line of picture source
|
||||
* one byte of fb - 8 rows for 1 column of screen
|
||||
*/
|
||||
int ssd1306_load_xbm(uint8_t *xbm, uint8_t *fb)
|
||||
int ssd1306_load_xbm(const ssd1306_t *dev, uint8_t *xbm, uint8_t *fb)
|
||||
{
|
||||
uint8_t bit = 0;
|
||||
|
||||
int row = 0;
|
||||
int column = 0;
|
||||
for (row = 0; row < SSD1306_ROWS; row ++) {
|
||||
for (column = 0; column < SSD1306_COLS/8; column++) {
|
||||
for (row = 0; row < dev->height; row ++) {
|
||||
for (column = 0; column < dev->width / 8; column++) {
|
||||
uint16_t xbm_offset = row * 16 + column;
|
||||
for (bit = 0; bit < 8; bit++) {
|
||||
if (*(xbm + xbm_offset) & 1 << bit) {
|
||||
*(fb + SSD1306_COLS*(row/8)+column*8+bit) |= 1 << row%8;
|
||||
*(fb + dev->width * (row / 8) + column * 8 + bit) |= 1 << row % 8;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return ssd1306_load_frame_buffer(fb, SSD1306_ROWS*SSD1306_COLS/8);
|
||||
return ssd1306_load_frame_buffer(dev, fb);
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue