Fixup some constants used in examples

This commit is contained in:
Alex Stewart 2015-08-20 15:11:29 -07:00
parent e07395fcb6
commit ab6f4b8420
3 changed files with 33 additions and 32 deletions

View file

@ -26,7 +26,7 @@ void frc1_interrupt_handler(void)
void frc2_interrupt_handler(void)
{
/* FRC2 needs the match register updated on each timer interrupt */
timer_set_frequency(TIMER_FRC2, freq_frc2);
timer_set_frequency(FRC2, freq_frc2);
frc2_count++;
gpio_toggle(gpio_frc2);
}
@ -41,24 +41,24 @@ void user_init(void)
gpio_write(gpio_frc1, 1);
/* stop both timers and mask their interrupts as a precaution */
timer_set_interrupts(TIMER_FRC1, false);
timer_set_run(TIMER_FRC1, false);
timer_set_interrupts(TIMER_FRC2, false);
timer_set_run(TIMER_FRC2, false);
timer_set_interrupts(FRC1, false);
timer_set_run(FRC1, false);
timer_set_interrupts(FRC2, false);
timer_set_run(FRC2, false);
/* set up ISRs */
_xt_isr_attach(INUM_TIMER_FRC1, frc1_interrupt_handler);
_xt_isr_attach(INUM_TIMER_FRC2, frc2_interrupt_handler);
/* configure timer frequencies */
timer_set_frequency(TIMER_FRC1, freq_frc1);
timer_set_frequency(TIMER_FRC2, freq_frc2);
timer_set_frequency(FRC1, freq_frc1);
timer_set_frequency(FRC2, freq_frc2);
/* unmask interrupts and start timers */
timer_set_interrupts(TIMER_FRC1, true);
timer_set_run(TIMER_FRC1, true);
timer_set_interrupts(TIMER_FRC2, true);
timer_set_run(TIMER_FRC2, true);
timer_set_interrupts(FRC1, true);
timer_set_run(FRC1, true);
timer_set_interrupts(FRC2, true);
timer_set_run(FRC2, true);
gpio_write(gpio_frc1, 0);
}

View file

@ -15,7 +15,7 @@
/* pin config */
const int gpio = 0; /* gpio 0 usually has "PROGRAM" button attached */
const int active = 0; /* active == 0 for active low */
const gpio_interrupt_t int_type = INT_FALLING;
const gpio_inttype_t int_type = GPIO_INTTYPE_EDGE_NEG;
#define GPIO_HANDLER gpio00_interrupt_handler

View file

@ -11,14 +11,15 @@
#include "FreeRTOS.h"
#include "task.h"
#include "esp8266.h"
#include "common_macros.h"
#define DUMP_SZ 0x10 /* number of regs not size of buffer */
IRAM void dump_frc1_seq(void)
{
uint32_t f1_a = TIMER_FRC1_COUNT_REG;
uint32_t f1_b = TIMER_FRC1_COUNT_REG;
uint32_t f1_c = TIMER_FRC1_COUNT_REG;
uint32_t f1_a = TIMER(0).COUNT;
uint32_t f1_b = TIMER(0).COUNT;
uint32_t f1_c = TIMER(0).COUNT;
printf("FRC1 sequence 0x%08lx 0x%08lx 0x%08lx\r\n", f1_a, f1_b, f1_c);
printf("FRC1 deltas %ld %ld \r\n", f1_b-f1_a, f1_c-f1_b);
}
@ -33,9 +34,9 @@ IRAM void dump_frc2_seq(void)
* /16 = 0 or 1 (usually 1)
*
*/
uint32_t f2_a = TIMER_FRC2_COUNT_REG;
uint32_t f2_b = TIMER_FRC2_COUNT_REG;
uint32_t f2_c = TIMER_FRC2_COUNT_REG;
uint32_t f2_a = TIMER(1).COUNT;
uint32_t f2_b = TIMER(1).COUNT;
uint32_t f2_c = TIMER(1).COUNT;
printf("FRC2 sequence 0x%08lx 0x%08lx 0x%08lx\r\n", f2_a, f2_b, f2_c);
printf("FRC2 deltas %ld %ld \r\n", f2_b-f2_a, f2_c-f2_b);
}
@ -99,20 +100,20 @@ void timerRegTask(void *pvParameters)
IRAM void frc1_handler(void)
{
frc1_handler_call_count++;
frc1_last_count_val = TIMER_FRC1_COUNT_REG;
//TIMER_FRC1_LOAD_REG = 0x300000;
//TIMER_FRC1_CLEAR_INT = 0;
frc1_last_count_val = TIMER(0).COUNT;
//TIMER(0).LOAD = 0x300000;
//TIMER(0).STATUS = 0;
//TIMER_FRC1_MATCH_REG = frc1_last_count_val + 0x100000;
}
void frc2_handler(void)
{
frc2_handler_call_count++;
frc2_last_count_val = TIMER_FRC2_COUNT_REG;
TIMER_FRC2_MATCH_REG = frc2_last_count_val + 0x100000;
//TIMER_FRC2_LOAD_REG = 0;
//TIMER_FRC2_LOAD_REG = 0x2000000;
//TIMER_FRC2_CLEAR_INT_REG = 0;
frc2_last_count_val = TIMER(1).COUNT;
TIMER(1).ALARM = frc2_last_count_val + 0x100000;
//TIMER(1).LOAD = 0;
//TIMER(1).LOAD = 0x2000000;
//TIMER(1).STATUS = 0;
}
void user_init(void)
@ -120,19 +121,19 @@ void user_init(void)
sdk_uart_div_modify(0, UART_CLK_FREQ / 115200);
xTaskCreate(timerRegTask, (signed char *)"timerRegTask", 1024, NULL, 2, NULL);
TIMER_FRC1_CTRL_REG = TIMER_CTRL_DIV_256|TIMER_CTRL_INT_EDGE|TIMER_CTRL_RELOAD;
TIMER_FRC1_LOAD_REG = 0x200000;
TIMER(0).CTRL = VAL2FIELD(TIMER_CTRL_CLKDIV, TIMER_CLKDIV_256) | TIMER_CTRL_RELOAD;
TIMER(0).LOAD = 0x200000;
TIMER_FRC2_CTRL_REG = TIMER_CTRL_DIV_256|TIMER_CTRL_INT_EDGE;
TIMER(1).LOAD = VAL2FIELD(TIMER_CTRL_CLKDIV, TIMER_CLKDIV_256);
DP_INT_ENABLE_REG |= INT_ENABLE_FRC1|INT_ENABLE_FRC2;
DPORT.INT_ENABLE |= DPORT_INT_ENABLE_TIMER0 | DPORT_INT_ENABLE_TIMER1;
_xt_isr_attach(INUM_TIMER_FRC1, frc1_handler);
_xt_isr_unmask(1<<INUM_TIMER_FRC1);
_xt_isr_attach(INUM_TIMER_FRC2, frc2_handler);
_xt_isr_unmask(1<<INUM_TIMER_FRC2);
TIMER_FRC1_CTRL_REG |= TIMER_CTRL_RUN;
TIMER_FRC2_CTRL_REG |= TIMER_CTRL_RUN;
TIMER(0).CTRL |= TIMER_CTRL_RUN;
TIMER(1).CTRL |= TIMER_CTRL_RUN;
dump_timer_regs("timer regs during user_init");
dump_timer_regs("#2 timer regs during user_init");