ds3231 ads111x bh1750 update + I2c device desciptor
This commit is contained in:
lilian
parent
130385fecd
commit
a731034e65
12 changed files with 190 additions and 177 deletions
|
|
@ -6,7 +6,6 @@
|
|||
* BSD Licensed as described in the file LICENSE
|
||||
*/
|
||||
#include "ads111x.h"
|
||||
#include <i2c/i2c.h>
|
||||
|
||||
#define ADS111X_DEBUG
|
||||
|
||||
|
|
@ -52,144 +51,144 @@ const float ads111x_gain_values[] = {
|
|||
[ADS111X_GAIN_0V256_3] = 0.256
|
||||
};
|
||||
|
||||
static uint16_t read_reg(uint8_t addr, uint8_t reg)
|
||||
static uint16_t read_reg(i2c_dev_t* dev, uint8_t reg)
|
||||
{
|
||||
uint16_t res = 0;
|
||||
if (i2c_slave_read(addr, ®, (uint8_t *)&res, 2))
|
||||
if (i2c_slave_read(dev->bus, dev->addr, ®, (uint8_t *)&res, 2))
|
||||
debug("Could not read register %d", reg);
|
||||
//debug("Read %d: 0x%04x", reg, res);
|
||||
return res;
|
||||
}
|
||||
|
||||
static void write_reg(uint8_t addr, uint8_t reg, uint16_t val)
|
||||
static void write_reg(i2c_dev_t* dev, uint8_t reg, uint16_t val)
|
||||
{
|
||||
//debug("Write %d: 0x%04x", reg, val);
|
||||
uint8_t buf[2] = { val >> 8, val};
|
||||
if (i2c_slave_write(addr, ®, buf, 2))
|
||||
if (i2c_slave_write(dev->bus, dev->addr, ®, buf, 2))
|
||||
debug("Could not write 0x%04x to register %d", val, reg);
|
||||
}
|
||||
|
||||
static uint16_t read_conf_bits(uint8_t addr, uint8_t offs, uint16_t mask)
|
||||
static uint16_t read_conf_bits(i2c_dev_t* dev, uint8_t offs, uint16_t mask)
|
||||
{
|
||||
return (read_reg(addr, REG_CONFIG) >> offs) & mask;
|
||||
return (read_reg(dev, REG_CONFIG) >> offs) & mask;
|
||||
}
|
||||
|
||||
static void write_conf_bits(uint8_t addr, uint16_t val, uint8_t offs, uint16_t mask)
|
||||
static void write_conf_bits(i2c_dev_t* dev, uint16_t val, uint8_t offs, uint16_t mask)
|
||||
{
|
||||
write_reg(addr, REG_CONFIG, (read_reg(addr, REG_CONFIG) & ~(mask << offs)) | (val << offs));
|
||||
write_reg(dev, REG_CONFIG, (read_reg(dev, REG_CONFIG) & ~(mask << offs)) | (val << offs));
|
||||
}
|
||||
|
||||
bool ads111x_busy(uint8_t addr)
|
||||
bool ads111x_busy(i2c_dev_t* dev)
|
||||
{
|
||||
return read_conf_bits(addr, OS_OFFSET, OS_MASK);
|
||||
return read_conf_bits(dev, OS_OFFSET, OS_MASK);
|
||||
}
|
||||
|
||||
void ads111x_start_conversion(uint8_t addr)
|
||||
void ads111x_start_conversion(i2c_dev_t* dev)
|
||||
{
|
||||
write_conf_bits(addr, 1, OS_OFFSET, OS_MASK);
|
||||
write_conf_bits(dev, 1, OS_OFFSET, OS_MASK);
|
||||
}
|
||||
|
||||
int16_t ads111x_get_value(uint8_t addr)
|
||||
int16_t ads111x_get_value(i2c_dev_t* dev)
|
||||
{
|
||||
return read_reg(addr, REG_CONVERSION);
|
||||
return read_reg(dev, REG_CONVERSION);
|
||||
}
|
||||
|
||||
ads111x_gain_t ads111x_get_gain(uint8_t addr)
|
||||
ads111x_gain_t ads111x_get_gain(i2c_dev_t* dev)
|
||||
{
|
||||
return read_conf_bits(addr, PGA_OFFSET, PGA_MASK);
|
||||
return read_conf_bits(dev, PGA_OFFSET, PGA_MASK);
|
||||
}
|
||||
|
||||
void ads111x_set_gain(uint8_t addr, ads111x_gain_t gain)
|
||||
void ads111x_set_gain(i2c_dev_t* dev, ads111x_gain_t gain)
|
||||
{
|
||||
write_conf_bits(addr, gain, PGA_OFFSET, PGA_MASK);
|
||||
write_conf_bits(dev, gain, PGA_OFFSET, PGA_MASK);
|
||||
}
|
||||
|
||||
ads111x_mux_t ads111x_get_input_mux(uint8_t addr)
|
||||
ads111x_mux_t ads111x_get_input_mux(i2c_dev_t* dev)
|
||||
{
|
||||
return read_conf_bits(addr, MUX_OFFSET, MUX_MASK);
|
||||
return read_conf_bits(dev, MUX_OFFSET, MUX_MASK);
|
||||
}
|
||||
|
||||
void ads111x_set_input_mux(uint8_t addr, ads111x_mux_t mux)
|
||||
void ads111x_set_input_mux(i2c_dev_t* dev, ads111x_mux_t mux)
|
||||
{
|
||||
write_conf_bits(addr, mux, MUX_OFFSET, MUX_MASK);
|
||||
write_conf_bits(dev, mux, MUX_OFFSET, MUX_MASK);
|
||||
}
|
||||
|
||||
ads111x_mode_t ads111x_get_mode(uint8_t addr)
|
||||
ads111x_mode_t ads111x_get_mode(i2c_dev_t* dev)
|
||||
{
|
||||
return read_conf_bits(addr, MODE_OFFSET, MODE_MASK);
|
||||
return read_conf_bits(dev, MODE_OFFSET, MODE_MASK);
|
||||
}
|
||||
|
||||
void ads111x_set_mode(uint8_t addr, ads111x_mode_t mode)
|
||||
void ads111x_set_mode(i2c_dev_t* dev, ads111x_mode_t mode)
|
||||
{
|
||||
write_conf_bits(addr, mode, MODE_OFFSET, MODE_MASK);
|
||||
write_conf_bits(dev, mode, MODE_OFFSET, MODE_MASK);
|
||||
}
|
||||
|
||||
ads111x_data_rate_t ads111x_get_data_rate(uint8_t addr)
|
||||
ads111x_data_rate_t ads111x_get_data_rate(i2c_dev_t* dev)
|
||||
{
|
||||
return read_conf_bits(addr, DR_OFFSET, DR_MASK);
|
||||
return read_conf_bits(dev, DR_OFFSET, DR_MASK);
|
||||
}
|
||||
|
||||
void ads111x_set_data_rate(uint8_t addr, ads111x_data_rate_t rate)
|
||||
void ads111x_set_data_rate(i2c_dev_t* dev, ads111x_data_rate_t rate)
|
||||
{
|
||||
write_conf_bits(addr, rate, DR_OFFSET, DR_MASK);
|
||||
write_conf_bits(dev, rate, DR_OFFSET, DR_MASK);
|
||||
}
|
||||
|
||||
ads111x_comp_mode_t ads111x_get_comp_mode(uint8_t addr)
|
||||
ads111x_comp_mode_t ads111x_get_comp_mode(i2c_dev_t* dev)
|
||||
{
|
||||
return read_conf_bits(addr, COMP_MODE_OFFSET, COMP_MODE_MASK);
|
||||
return read_conf_bits(dev, COMP_MODE_OFFSET, COMP_MODE_MASK);
|
||||
}
|
||||
|
||||
void ads111x_set_comp_mode(uint8_t addr, ads111x_comp_mode_t mode)
|
||||
void ads111x_set_comp_mode(i2c_dev_t* dev, ads111x_comp_mode_t mode)
|
||||
{
|
||||
write_conf_bits(addr, mode, COMP_MODE_OFFSET, COMP_MODE_MASK);
|
||||
write_conf_bits(dev, mode, COMP_MODE_OFFSET, COMP_MODE_MASK);
|
||||
}
|
||||
|
||||
ads111x_comp_polarity_t ads111x_get_comp_polarity(uint8_t addr)
|
||||
ads111x_comp_polarity_t ads111x_get_comp_polarity(i2c_dev_t* dev)
|
||||
{
|
||||
return read_conf_bits(addr, COMP_POL_OFFSET, COMP_POL_MASK);
|
||||
return read_conf_bits(dev, COMP_POL_OFFSET, COMP_POL_MASK);
|
||||
}
|
||||
|
||||
void ads111x_set_comp_polarity(uint8_t addr, ads111x_comp_polarity_t polarity)
|
||||
void ads111x_set_comp_polarity(i2c_dev_t* dev, ads111x_comp_polarity_t polarity)
|
||||
{
|
||||
write_conf_bits(addr, polarity, COMP_POL_OFFSET, COMP_POL_MASK);
|
||||
write_conf_bits(dev, polarity, COMP_POL_OFFSET, COMP_POL_MASK);
|
||||
}
|
||||
|
||||
ads111x_comp_latch_t ads111x_get_comp_latch(uint8_t addr)
|
||||
ads111x_comp_latch_t ads111x_get_comp_latch(i2c_dev_t* dev)
|
||||
{
|
||||
return read_conf_bits(addr, COMP_LAT_OFFSET, COMP_LAT_MASK);
|
||||
return read_conf_bits(dev, COMP_LAT_OFFSET, COMP_LAT_MASK);
|
||||
}
|
||||
|
||||
void ads111x_set_comp_latch(uint8_t addr, ads111x_comp_latch_t latch)
|
||||
void ads111x_set_comp_latch(i2c_dev_t* dev, ads111x_comp_latch_t latch)
|
||||
{
|
||||
write_conf_bits(addr, latch, COMP_LAT_OFFSET, COMP_LAT_MASK);
|
||||
write_conf_bits(dev, latch, COMP_LAT_OFFSET, COMP_LAT_MASK);
|
||||
}
|
||||
|
||||
ads111x_comp_queue_t ads111x_get_comp_queue(uint8_t addr)
|
||||
ads111x_comp_queue_t ads111x_get_comp_queue(i2c_dev_t* dev)
|
||||
{
|
||||
return read_conf_bits(addr, COMP_QUE_OFFSET, COMP_QUE_MASK);
|
||||
return read_conf_bits(dev, COMP_QUE_OFFSET, COMP_QUE_MASK);
|
||||
}
|
||||
|
||||
void ads111x_set_comp_queue(uint8_t addr, ads111x_comp_queue_t queue)
|
||||
void ads111x_set_comp_queue(i2c_dev_t* dev, ads111x_comp_queue_t queue)
|
||||
{
|
||||
write_conf_bits(addr, queue, COMP_QUE_OFFSET, COMP_QUE_MASK);
|
||||
write_conf_bits(dev, queue, COMP_QUE_OFFSET, COMP_QUE_MASK);
|
||||
}
|
||||
|
||||
int16_t ads111x_get_comp_low_thresh(uint8_t addr)
|
||||
int16_t ads111x_get_comp_low_thresh(i2c_dev_t* dev)
|
||||
{
|
||||
return read_reg(addr, REG_THRESH_L);
|
||||
return read_reg(dev, REG_THRESH_L);
|
||||
}
|
||||
|
||||
void ads111x_set_comp_low_thresh(uint8_t addr, int16_t thresh)
|
||||
void ads111x_set_comp_low_thresh(i2c_dev_t* dev, int16_t thresh)
|
||||
{
|
||||
write_reg(addr, REG_THRESH_L, thresh);
|
||||
write_reg(dev, REG_THRESH_L, thresh);
|
||||
}
|
||||
|
||||
int16_t ads111x_get_comp_high_thresh(uint8_t addr)
|
||||
int16_t ads111x_get_comp_high_thresh(i2c_dev_t* dev)
|
||||
{
|
||||
return read_reg(addr, REG_THRESH_H);
|
||||
return read_reg(dev, REG_THRESH_H);
|
||||
}
|
||||
|
||||
void ads111x_set_comp_high_thresh(uint8_t addr, int16_t thresh)
|
||||
void ads111x_set_comp_high_thresh(i2c_dev_t* dev, int16_t thresh)
|
||||
{
|
||||
write_reg(addr, REG_THRESH_H, thresh);
|
||||
write_reg(dev, REG_THRESH_H, thresh);
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue