Simplify linker script to remove preprocessing, not check flash sizes
Memory layout is now split into two linker scripts for OTA vs non-OTA (different starting offsets), remaining functionality in common.ld. As discussed in #64, progress towards #38
This commit is contained in:
Angus Gratton
parent
959849d271
commit
92eb02f17a
5 changed files with 60 additions and 67 deletions
26
common.mk
26
common.mk
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@ -131,8 +131,12 @@ endif
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GITSHORTREV=\"$(shell cd $(ROOT); git rev-parse --short -q HEAD)\"
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CPPFLAGS += -DGITSHORTREV=$(GITSHORTREV) -DFLASH_SIZE=$(FLASH_SIZE)
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# Linker scripts, all found in $(ROOT)/ld
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LINKER_SCRIPTS = eagle.app.v6.ld eagle.rom.addr.v6.ld
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ifeq ($(OTA),0)
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LINKER_SCRIPTS = $(ROOT)ld/nonota.ld
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else
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LINKER_SCRIPTS = $(ROOT)ld/ota.ld
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endif
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LINKER_SCRIPTS += $(ROOT)ld/common.ld $(ROOT)ld/rom.ld
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####
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#### no user configurable options below here
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@ -152,19 +156,11 @@ lc = $(subst A,a,$(subst B,b,$(subst C,c,$(subst D,d,$(subst E,e,$(subst F,f,$(s
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# assume the program dir is the directory the top-level makefile was run in
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PROGRAM_DIR := $(dir $(firstword $(MAKEFILE_LIST)))
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# linker scripts get run through the C preprocessor
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ifeq ($(OTA),1)
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LD_DIR = $(BUILD_DIR)ld-$(FLASH_SIZE)-ota/
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else
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LD_DIR = $(BUILD_DIR)ld-$(FLASH_SIZE)/
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endif
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LINKER_SCRIPTS_PROCESSED = $(addprefix $(LD_DIR),$(LINKER_SCRIPTS))
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# derive various parts of compiler/linker arguments
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SDK_LIB_ARGS = $(addprefix -l,$(SDK_LIBS))
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LIB_ARGS = $(addprefix -l,$(LIBS))
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PROGRAM_OUT = $(BUILD_DIR)$(PROGRAM).out
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LDFLAGS += $(addprefix -T,$(LINKER_SCRIPTS_PROCESSED))
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LDFLAGS += $(addprefix -T,$(LINKER_SCRIPTS))
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ifeq ($(OTA),0)
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# for non-OTA, we create two different files for uploading into the flash
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@ -335,16 +331,12 @@ $(foreach component,$(COMPONENTS), \
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) \
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)
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## Run linker scripts via C preprocessor to evaluate macros
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$(LD_DIR)%.ld: $(ROOT)ld/%.ld | $(LD_DIR)
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$(Q) $(CPP) $(CPPFLAGS) -E -C -P $< > $@
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# final linking step to produce .elf
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$(PROGRAM_OUT): $(COMPONENT_ARS) $(SDK_PROCESSED_LIBS) $(LINKER_SCRIPTS_PROCESSED)
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$(PROGRAM_OUT): $(COMPONENT_ARS) $(SDK_PROCESSED_LIBS) $(LINKER_SCRIPTS)
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$(vecho) "LD $@"
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$(Q) $(LD) $(LDFLAGS) -Wl,--start-group $(COMPONENT_ARS) $(LIB_ARGS) $(SDK_LIB_ARGS) -Wl,--end-group -o $@
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$(BUILD_DIR) $(FW_BASE) $(BUILD_DIR)sdklib $(LD_DIR):
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$(BUILD_DIR) $(FW_BASE) $(BUILD_DIR)sdklib:
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$(Q) mkdir -p $@
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$(FW_FILE_1) $(FW_FILE_2): $(PROGRAM_OUT) $(FW_BASE)
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@ -1,6 +1,6 @@
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/* This linker script generated from xt-genldscripts.tpp for LSP .
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Modified for esp open RTOS, this linker script is no longer the same as the esp_iot_rtos_sdk one.
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/*
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* Common (OTA and non-OTA) parts for the esp-open-rtos Linker Script
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*
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*/
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/* FreeRTOS memory management functions
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@ -28,43 +28,6 @@ _lock_release_recursive = vPortExitCritical;
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/* SDK compatibility */
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ets_printf = printf;
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/* Evaluate FLASH_SIZE to calculate irom size, etc.
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*/
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#ifndef OTA
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/* IROM0 section sits after other sections in the "v1" non-OTA bootloader image,
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so need an 128kB offset to leave room
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*/
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#define IROM0_OFFSET 0x20000
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#else /* OTA */
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/* For OTA, IROM0 becomes an actual "section" of the bootloader image,
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so we only need to leave space for the second stage bootloader
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(0x2000 bytes) and space for the bootloader & section headers (0x10
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bytes) */
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#define IROM0_OFFSET 0x2010
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#if FLASH_SIZE < 16
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#error "OTA support currently requires minimum 16 megabit flash"
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#endif
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#endif
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/* Full maximum length of IROM section is length of mappable flash (ie up to 1 megabyte),
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minus anything mapped at start, minus single config SDK WiFi config sector at end
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*/
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#define IROM0_LEN ((0x20000*MIN(FLASH_SIZE,8)) - IROM0_OFFSET - 0x1000)
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/* Linker Script for ld -N */
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MEMORY
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{
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dport0_0_seg : org = 0x3FF00000, len = 0x10
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dram0_0_seg : org = 0x3FFE8000, len = 0x14000
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iram1_0_seg : org = 0x40100000, len = 0x08000
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irom0_0_seg : org = 0x40200000+IROM0_OFFSET, len = IROM0_LEN
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}
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PHDRS
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{
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dport0_0_phdr PT_LOAD;
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15
ld/nonota.ld
Normal file
15
ld/nonota.ld
Normal file
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@ -0,0 +1,15 @@
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/* Memory layout for esp-open-rtos when not using OTA
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(ie ROM bootloader only, no second stage rboot)
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*/
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MEMORY
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{
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dport0_0_seg : org = 0x3FF00000, len = 0x10
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dram0_0_seg : org = 0x3FFE8000, len = 0x14000
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iram1_0_seg : org = 0x40100000, len = 0x08000
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/* irom0 section, mapped from SPI flash
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- Origin is offset by 0x20000 to leave space for bootloader RAM sections.
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- Length is max 8Mbit of mappable flash, minus start offset
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*/
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irom0_0_seg : org = 0x40220000, len = (1M - 0x20000)
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}
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15
ld/ota.ld
Normal file
15
ld/ota.ld
Normal file
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@ -0,0 +1,15 @@
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/* Memory layout for esp-open-rtos when using OTA second stage bootloader */
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MEMORY
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{
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dport0_0_seg : org = 0x3FF00000, len = 0x10
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dram0_0_seg : org = 0x3FFE8000, len = 0x14000
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iram1_0_seg : org = 0x40100000, len = 0x08000
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/* irom0 section, mapped from SPI flash
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- Origin is offset by 0x2010 to create spacer for second stage bootloader image,
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header.
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- Length is max 8Mbit of mappable flash, minus start offset
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*/
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irom0_0_seg : org = 0x40202010, len = (1M - 0x2010)
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}
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@ -1,3 +1,11 @@
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/* Linker script containing Boot ROM functions for ESP8266
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For more information, see:
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http://esp8266-re.foogod.com/wiki/Boot_ROM
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https://github.com/jcmvbkbc/esp-elf-rom/
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*/
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PROVIDE ( SPI_sector_erase = 0x400040c0 );
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PROVIDE ( SPI_page_program = 0x40004174 );
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PROVIDE ( SPI_read_data = 0x400042ac );
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@ -8,22 +16,22 @@ PROVIDE ( Wait_SPI_Idle = 0x4000448c );
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PROVIDE ( Enable_QMode = 0x400044c0 );
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PROVIDE ( Disable_QMode = 0x40004508 );
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/* When using OTA, Cache_Read_Enable is defined in extras/rboot-ota so
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the ROM Cache_Read_Enable isn't picked up from here. However we
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also provide access to the ROM function in all cases, via the name
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rom_Cache_Read_Enable */
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PROVIDE ( rom_Cache_Read_Enable = 0x40004678 );
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PROVIDE ( Cache_Read_Enable = rom_Cache_Read_Enable );
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PROVIDE ( Cache_Read_Disable = 0x400047f0 );
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#ifndef OTA
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/* If not building an OTA image for boot, can use the default (simple)
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cache enable function from ROM.
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Otherwise, we need an OTA-aware one (see extras/rboot-ota/rboot-cache.S)
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*/
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Cache_Read_Enable = rom_Cache_Read_Enable;
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#endif
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PROVIDE ( lldesc_build_chain = 0x40004f40 );
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PROVIDE ( lldesc_num2link = 0x40005050 );
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PROVIDE ( lldesc_set_owner = 0x4000507c );
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/* TODO: Nearly everything below here is probably provided by the
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libc, so never linked in, and can therefore be removed. */
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PROVIDE ( __adddf3 = 0x4000c538 );
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PROVIDE ( __addsf3 = 0x4000c180 );
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PROVIDE ( __divdf3 = 0x4000cb94 );
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