Added first half of RE'd user_interface.c

This commit is contained in:
Alex Stewart 2016-04-05 09:23:28 -07:00 committed by Angus Gratton
parent 3e5af479bc
commit 8c9a77efe8
20 changed files with 745 additions and 30 deletions

View file

@ -90,6 +90,10 @@ _Static_assert(sizeof(struct DPORT_REGS) == 0x60, "DPORT_REGS is the wrong size"
/* Details for CLOCKGATE_WATCHDOG register */
// Set and then cleared during sdk_system_restart_in_nmi().
// Not sure what this does. May be related to ESPSAR.UNKNOWN_48
#define DPORT_CLOCKGATE_WATCHDOG_UNKNOWN_8 BIT(8)
/* Comment found in pvvx/mp3_decode headers: "use clockgate_watchdog(flg) { if(flg) 0x3FF00018 &= 0x77; else 0x3FF00018 |= 8; }". Not sure what this means or does. */
#define DPORT_CLOCKGATE_WATCHDOG_DISABLE BIT(3)

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@ -31,7 +31,8 @@ struct RTC_REGS {
uint32_t volatile CTRL0; // 0x00
uint32_t volatile COUNTER_ALARM; // 0x04
uint32_t volatile RESET_REASON0; // 0x08 //FIXME: need better name
uint32_t volatile _unknownc[2]; // 0x0c - 0x10
uint32_t volatile _unknownc; // 0x0c
uint32_t volatile _unknown10; // 0x10
uint32_t volatile RESET_REASON1; // 0x14 //FIXME: need better name
uint32_t volatile RESET_REASON2; // 0x18 //FIXME: need better name
uint32_t volatile COUNTER; // 0x1c
@ -40,7 +41,10 @@ struct RTC_REGS {
uint32_t volatile INT_ENABLE; // 0x28
uint32_t volatile _unknown2c; // 0x2c
uint32_t volatile SCRATCH[4]; // 0x30 - 3c
uint32_t volatile _unknown40[10]; // 0x40 - 0x64
uint32_t volatile _unknown40; // 0x40
uint32_t volatile _unknown44; // 0x44
uint32_t volatile _unknown48; // 0x48
uint32_t volatile _unknown4c[7]; // 0x4c - 0x64
uint32_t volatile GPIO_OUT; // 0x68
uint32_t volatile _unknown6c[2]; // 0x6c - 0x70
uint32_t volatile GPIO_ENABLE; // 0x74

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@ -0,0 +1,39 @@
/* esp/sar_regs.h
*
* ESP8266 register definitions for the "sar" region (0x3FF2xxx)
*
* The 0x60000D00 register region is referred to as "sar" by some old header
* files. Apparently referenced both by ROM I2C functions as well as ADC
* config/read functions.
*
* Not compatible with ESP SDK register access code.
*/
#ifndef _ESP_SAR_REGS_H
#define _ESP_SAR_REGS_H
#include "esp/types.h"
#include "common_macros.h"
#define SAR_BASE 0x60000d00
// Unfortunately,
// esp-open-sdk/xtensa-lx106-elf/xtensa-lx106-elf/sysroot/usr/include/xtensa/config/specreg.h
// already has a "SAR" macro definition which would conflict with this, so
// we'll use "ESPSAR" instead..
#define ESPSAR (*(struct SAR_REGS *)(SAR_BASE))
/* Note: This memory region is not currently well understood. Pretty much all
* of the definitions here are from reverse-engineering the Espressif SDK code,
* many are just educated guesses, and almost certainly some are misleading or
* wrong. If you can improve on any of this, please contribute!
*/
struct SAR_REGS {
uint32_t volatile _unknown0[18]; // 0x00 - 0x44
uint32_t volatile UNKNOWN_48; // 0x48 : used by sdk_system_restart_in_nmi()
} __attribute__ (( packed ));
_Static_assert(sizeof(struct SAR_REGS) == 0x4c, "SAR_REGS is the wrong size");
#endif /* _ESP_SAR_REGS_H */