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Honour values of configCPU_CLOCK_HZ & configTICK_RATE_HZ for tick rate

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Fixes #147

* Can vary tick rate from 100Hz via configTICK_RATE_HZ. Note that the
  SDK binary libraries are hard-coded to assume the tick rate is 100Hz,
  so changing the tick rate may have unexpected consequences for lower
  layer WiFi behaviour (such as certain kinds of timeouts happening
  faster/slower.)

* Setting configCPU_CLOCK_HZ to 160MHz means ESP will set 160MHz during
  initialisation. Only 80MHz and 160MHz are supported.

* Timing of tasks is no longer affected by current CPU freq (whether set
  via configCPU_CLOCK_HZ or via sdk_system_update_cpu_freq().)
  Previously doubling the CPU frequency would double the tick rate.
This commit is contained in:
Angus Gratton 2016-06-30 09:22:17 +10:00
parent 701a4c4284
commit 678b59babf
5 changed files with 19 additions and 2 deletions
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5
open_esplibs/libmain/os_cpu_a.c
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@ -7,6 +7,7 @@
#include "task.h"
#include "xtensa_ops.h"
#include "common_macros.h"
#include "esplibs/libmain.h"
// xPortSysTickHandle is defined in FreeRTOS/Source/portable/esp8266/port.c but
// does not exist in any header files.
@ -66,7 +67,7 @@ void IRAM sdk__xt_int_exit(void) {
void IRAM sdk__xt_timer_int(void) {
uint32_t trigger_ccount;
uint32_t current_ccount;
uint32_t ccount_interval = portTICK_RATE_MS * 80000; //FIXME
uint32_t ccount_interval = portTICK_RATE_MS * sdk_os_get_cpu_frequency() * 1000;
do {
RSR(trigger_ccount, ccompare0);
@ -87,7 +88,7 @@ void IRAM sdk__xt_timer_int1(void) {
void IRAM sdk__xt_tick_timer_init(void) {
uint32_t ints_enabled;
uint32_t current_ccount;
uint32_t ccount_interval = portTICK_RATE_MS * 80000; //FIXME
uint32_t ccount_interval = portTICK_RATE_MS * sdk_os_get_cpu_frequency() * 1000;
RSR(current_ccount, ccount);
WSR(current_ccount + ccount_interval, ccompare0);