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Clean up rest of port.c function

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This commit is contained in:
Angus Gratton 2015-05-07 14:00:46 +10:00
parent ee95fde5ec
commit 6369b4cefa
1 changed files with 26 additions and 32 deletions
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58
FreeRTOS/Source/portable/esp8266/port.c
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@ -82,10 +82,9 @@ char level1_int_disabled;
/* /*
* Stack initialization * Stack initialization
*/ */
portSTACK_TYPE * portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
{ {
#define SET_STKREG(r,v) sp[(r) >> 2] = (portSTACK_TYPE)(v) #define SET_STKREG(r,v) sp[(r) >> 2] = (portSTACK_TYPE)(v)
portSTACK_TYPE *sp, *tp; portSTACK_TYPE *sp, *tp;
/* Create interrupt stack frame aligned to 16 byte boundary */ /* Create interrupt stack frame aligned to 16 byte boundary */
@ -173,36 +172,26 @@ void xPortSysTickHandle (void)
/* /*
* See header file for description. * See header file for description.
*/ */
portBASE_TYPE ICACHE_FLASH_ATTR portBASE_TYPE xPortStartScheduler( void )
xPortStartScheduler( void )
{ {
//set SV and systemtick as lowest priority ISR.
_xt_isr_attach(ETS_SOFT_INUM, SV_ISR); _xt_isr_attach(ETS_SOFT_INUM, SV_ISR);
_xt_isr_unmask(1<<ETS_SOFT_INUM); _xt_isr_unmask(1<<ETS_SOFT_INUM);
/* Initialize system tick timer interrupt and schedule the first tick. */ /* Initialize system tick timer interrupt and schedule the first tick. */
_xt_tick_timer_init(); _xt_tick_timer_init();
printf("xPortStartScheduler\n");
vTaskSwitchContext(); vTaskSwitchContext();
// REG_SET_BIT(0x3ff2006c, BIT(4)); _xt_int_exit();
/* Restore the context of the first task that is going to run. */
XT_RTOS_INT_EXIT(); /* Should not get here as the tasks are now running! */
return pdTRUE;
/* Should not get here as the tasks are now running! */
return pdTRUE;
} }
void ICACHE_FLASH_ATTR void vPortEndScheduler( void )
vPortEndScheduler( void )
{ {
/* It is unlikely that the CM3 port will require this function as there /* No-op, nothing to return to */
is nothing to return to. */
} }
/*-----------------------------------------------------------*/
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
@ -226,6 +215,12 @@ void vPortExitCritical( void )
/*-----------------------------------------------------------*/ /*-----------------------------------------------------------*/
/* Main ISR handler for FreeRTOS side of the ESP libs?
As far as I can tell, the "real" Xtensa ISRs ("Exceptions") are
handled in libmain.a (xtensa_vectors.o) which then can call into here
passing an interrupt mask.
*/
_xt_isr isr[16]; _xt_isr isr[16];
void _xt_isr_attach(uint8_t i, _xt_isr func) void _xt_isr_attach(uint8_t i, _xt_isr func)
@ -235,22 +230,21 @@ void _xt_isr_attach(uint8_t i, _xt_isr func)
uint16_t _xt_isr_handler(uint16_t i) uint16_t _xt_isr_handler(uint16_t i)
{ {
uint8_t index; uint8_t index;
if (i & (1 << ETS_WDT_INUM)) { if (i & (1 << ETS_WDT_INUM)) {
// printf("i %x %u\n", i, REG_READ(0x3ff20c00)); index = ETS_WDT_INUM;
index = ETS_WDT_INUM; }
} else if (i & (1 << ETS_GPIO_INUM)) {
else if (i & (1 << ETS_GPIO_INUM)) { index = ETS_GPIO_INUM;
index = ETS_GPIO_INUM; }else {
}else { index = __builtin_ffs(i) - 1;
index = __builtin_ffs(i) - 1;
if (index == ETS_MAX_INUM) { if (index == ETS_MAX_INUM) {
i &= ~(1 << ETS_MAX_INUM); i &= ~(1 << ETS_MAX_INUM);
index = __builtin_ffs(i) - 1; index = __builtin_ffs(i) - 1;
}
} }
}
_xt_clear_ints(1<<index); _xt_clear_ints(1<<index);