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Code formatted, minor fixes (#466)

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Ruslan V. Uss 2017-10-19 00:25:48 +05:00 • committed by Johan Kanflo
parent 8a474d749d
commit 5fa48d0298
28 changed files with 623 additions and 608 deletions
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88
extras/ina3221/ina3221.c
View file

@ -18,20 +18,20 @@
#define debug(fmt, ...)
#endif
static int _wireWriteRegister (const i2c_dev_t* dev, uint8_t reg, uint16_t value)
static int _wireWriteRegister(const i2c_dev_t *dev, uint8_t reg, uint16_t value)
{
uint8_t d[2] = { 0 , 0 };
d[1] = value & 0x00FF;
uint8_t d[2] = { 0, 0 };
d[1] = value & 0x00FF;
d[0] = (value >> 8) & 0x00FF;
debug("Data write to bus %u at %02X : %02X+%04X\n",dev->bus, dev->addr, reg, value);
debug("Data write to bus %u at %02X : %02X+%04X\n", dev->bus, dev->addr, reg, value);
return i2c_slave_write(dev->bus, dev->addr, &reg, d, sizeof(d));
}
static int _wireReadRegister(const i2c_dev_t* dev, uint8_t reg, uint16_t *value)
static int _wireReadRegister(const i2c_dev_t *dev, uint8_t reg, uint16_t *value)
{
uint8_t d[] = {0, 0};
int error = i2c_slave_read(dev->bus, dev->addr, &reg, d, sizeof(d))
debug("Data read from bus %u at %02X: %02X+%04X\n",dev->bus, dev->addr, reg, *value);
uint8_t d[] = { 0, 0 };
int error = i2c_slave_read(dev->bus, dev->addr, &reg, d, sizeof(d));
debug("Data read from bus %u at %02X: %02X+%04X\n", dev->bus, dev->addr, reg, *value);
*value = d[1] | (d[0] << 8);
return error;
}
@ -53,21 +53,23 @@ int ina3221_sync(ina3221_t *dev)
//////////////////////// Sync config register
if ((err = _wireReadRegister(&dev->i2c_dev, INA3221_REG_CONFIG, &ptr_data))) // Read config
return err;
if( ptr_data != dev->config.config_register) {
if (ptr_data != dev->config.config_register)
{
if ((err = _wireWriteRegister(&dev->i2c_dev, INA3221_REG_CONFIG, dev->config.config_register))) // Update config
return err;
}
//////////////////////// Sync mask register config
if ((err = _wireReadRegister(&dev->i2c_dev, INA3221_REG_MASK, &ptr_data))) // Read mask
return err;
if( (ptr_data & INA3221_MASK_CONFIG) != (dev->mask.mask_register & INA3221_MASK_CONFIG)) {
if ((ptr_data & INA3221_MASK_CONFIG) != (dev->mask.mask_register & INA3221_MASK_CONFIG))
{
if ((err = _wireWriteRegister(&dev->i2c_dev, INA3221_REG_MASK, dev->mask.mask_register & INA3221_MASK_CONFIG))) // Update config
return err;
}
return 0;
}
int ina3221_setting(ina3221_t *dev ,bool mode, bool bus, bool shunt)
int ina3221_setting(ina3221_t *dev, bool mode, bool bus, bool shunt)
{
dev->config.mode = mode;
dev->config.ebus = bus;
@ -75,7 +77,7 @@ int ina3221_setting(ina3221_t *dev ,bool mode, bool bus, bool shunt)
return _wireWriteRegister(&dev->i2c_dev, INA3221_REG_CONFIG, dev->config.config_register);
}
int ina3221_enableChannel(ina3221_t *dev ,bool ch1, bool ch2, bool ch3)
int ina3221_enableChannel(ina3221_t *dev, bool ch1, bool ch2, bool ch3)
{
dev->config.ch1 = ch1;
dev->config.ch2 = ch2;
@ -83,7 +85,7 @@ int ina3221_enableChannel(ina3221_t *dev ,bool ch1, bool ch2, bool ch3)
return _wireWriteRegister(&dev->i2c_dev, INA3221_REG_CONFIG, dev->config.config_register);
}
int ina3221_enableChannelSum(ina3221_t *dev ,bool ch1, bool ch2, bool ch3)
int ina3221_enableChannelSum(ina3221_t *dev, bool ch1, bool ch2, bool ch3)
{
dev->mask.scc1 = ch1;
dev->mask.scc2 = ch2;
@ -91,7 +93,7 @@ int ina3221_enableChannelSum(ina3221_t *dev ,bool ch1, bool ch2, bool ch3)
return _wireWriteRegister(&dev->i2c_dev, INA3221_REG_MASK, dev->mask.mask_register & INA3221_MASK_CONFIG);
}
int ina3221_enableLatchPin(ina3221_t *dev ,bool warning, bool critical)
int ina3221_enableLatchPin(ina3221_t *dev, bool warning, bool critical)
{
dev->mask.wen = warning;
dev->mask.cen = critical;
@ -104,13 +106,13 @@ int ina3221_setAverage(ina3221_t *dev, ina3221_avg_t avg)
return _wireWriteRegister(&dev->i2c_dev, INA3221_REG_CONFIG, dev->config.config_register);
}
int ina3221_setBusConversionTime(ina3221_t *dev,ina3221_ct_t ct)
int ina3221_setBusConversionTime(ina3221_t *dev, ina3221_ct_t ct)
{
dev->config.vbus = ct;
return _wireWriteRegister(&dev->i2c_dev, INA3221_REG_CONFIG, dev->config.config_register);
}
int ina3221_setShuntConversionTime(ina3221_t *dev,ina3221_ct_t ct)
int ina3221_setShuntConversionTime(ina3221_t *dev, ina3221_ct_t ct)
{
dev->config.vsht = ct;
return _wireWriteRegister(&dev->i2c_dev, INA3221_REG_CONFIG, dev->config.config_register);
@ -118,9 +120,9 @@ int ina3221_setShuntConversionTime(ina3221_t *dev,ina3221_ct_t ct)
int ina3221_reset(ina3221_t *dev)
{
dev->config.config_register = INA3221_DEFAULT_CONFIG ; //dev reset
dev->mask.mask_register = INA3221_DEFAULT_CONFIG ; //dev reset
dev->config.rst = 1 ;
dev->config.config_register = INA3221_DEFAULT_CONFIG; //dev reset
dev->mask.mask_register = INA3221_DEFAULT_CONFIG; //dev reset
dev->config.rst = 1;
return _wireWriteRegister(&dev->i2c_dev, INA3221_REG_CONFIG, dev->config.config_register); // send reset to device
}
@ -128,74 +130,74 @@ int ina3221_getBusVoltage(ina3221_t *dev, ina3221_channel_t channel, float *volt
{
int16_t raw_value;
int err = 0;
if ((err = _wireReadRegister(&dev->i2c_dev,INA3221_REG_BUSVOLTAGE_1+channel*2, (uint16_t*)&raw_value)))
if ((err = _wireReadRegister(&dev->i2c_dev, INA3221_REG_BUSVOLTAGE_1 + channel * 2, (uint16_t*)&raw_value)))
return err;
*voltage = raw_value*0.001 ; //V 8mV step
return 0;
*voltage = raw_value * 0.001; //V 8mV step
return 0;
}
int ina3221_getShuntValue(ina3221_t *dev, ina3221_channel_t channel, float *voltage, float *current)
{
int16_t raw_value;
int err = 0;
if ((err = _wireReadRegister(&dev->i2c_dev,INA3221_REG_SHUNTVOLTAGE_1+channel*2, (uint16_t*)&raw_value)))
int err = 0;
if ((err = _wireReadRegister(&dev->i2c_dev, INA3221_REG_SHUNTVOLTAGE_1 + channel * 2, (uint16_t*)&raw_value)))
return err;
*voltage = raw_value*0.005; //mV 40uV step
if(!dev->shunt[channel])
*voltage = raw_value * 0.005; //mV 40uV step
if (!dev->shunt[channel])
{
debug("No shunt configured for channel %u. Dev:%u:%X\n",channel+1, dev->bus, dev->addr);
debug("No shunt configured for channel %u. Dev:%u:%X\n", channel+1, dev->bus, dev->addr);
return -EINVAL;
}
*current = (*voltage*1000.0)/dev->shunt[channel] ; //mA
return 0;
*current = (*voltage * 1000.0) / dev->shunt[channel]; //mA
return 0;
}
int ina3221_getSumShuntValue(ina3221_t *dev, float *voltage)
{
int16_t raw_value;
int err = 0;
if ((err = _wireReadRegister(&dev->i2c_dev,INA3221_REG_SHUNT_VOLTAGE_SUM, (uint16_t*)&raw_value)))
if ((err = _wireReadRegister(&dev->i2c_dev, INA3221_REG_SHUNT_VOLTAGE_SUM, (uint16_t*)&raw_value)))
return err;
*voltage = raw_value*0.02; //uV 40uV step
*voltage = raw_value * 0.02; //uV 40uV step
return 0;
}
int ina3221_setCriticalAlert(ina3221_t *dev, ina3221_channel_t channel, float current)
{
int16_t raw_value = current*dev->shunt[channel]*0.2; // format
return _wireWriteRegister(&dev->i2c_dev,INA3221_REG_CRITICAL_ALERT_1+channel*2, *(uint16_t*)&raw_value);
int16_t raw_value = current * dev->shunt[channel] * 0.2; // format
return _wireWriteRegister(&dev->i2c_dev, INA3221_REG_CRITICAL_ALERT_1 + channel * 2, *(uint16_t*)&raw_value);
}
int ina3221_setWarningAlert(ina3221_t *dev, ina3221_channel_t channel, float current)
{
int16_t raw_value = current*dev->shunt[channel]*0.2 ; // format
return _wireWriteRegister(&dev->i2c_dev,INA3221_REG_WARNING_ALERT_1+channel*2, *(uint16_t*)&raw_value);
int16_t raw_value = current * dev->shunt[channel] * 0.2; // format
return _wireWriteRegister(&dev->i2c_dev, INA3221_REG_WARNING_ALERT_1 + channel * 2, *(uint16_t*)&raw_value);
}
int ina3221_setSumWarningAlert(ina3221_t *dev, float voltage)
{
int16_t raw_value = voltage*50.0 ; // format
return _wireWriteRegister(&dev->i2c_dev,INA3221_REG_SHUNT_VOLTAGE_SUM_LIMIT, *(uint16_t*)&raw_value);
int16_t raw_value = voltage * 50.0; // format
return _wireWriteRegister(&dev->i2c_dev, INA3221_REG_SHUNT_VOLTAGE_SUM_LIMIT, *(uint16_t*)&raw_value);
}
int ina3221_setPowerValidUpperLimit(ina3221_t *dev, float voltage)
{
if(!dev->config.ebus)
if (!dev->config.ebus)
{
debug("Bus not enable. Dev:%u:%X\n", dev->bus, dev->addr);
return -ENOTSUP;
}
int16_t raw_value = voltage*1000.0; //format
return _wireWriteRegister(&dev->i2c_dev,INA3221_REG_VALID_POWER_UPPER_LIMIT, *(uint16_t*)&raw_value);
int16_t raw_value = voltage * 1000.0; //format
return _wireWriteRegister(&dev->i2c_dev, INA3221_REG_VALID_POWER_UPPER_LIMIT, *(uint16_t*)&raw_value);
}
int ina3221_setPowerValidLowerLimit(ina3221_t *dev, float voltage)
{
if(!dev->config.ebus)
if (!dev->config.ebus)
{
debug("Bus not enable. Dev:%u:%X\n", dev->bus, dev->addr);
return -ENOTSUP;
}
int16_t raw_value = voltage*1000.0; // round and format
return _wireWriteRegister(&dev->i2c_dev,INA3221_REG_VALID_POWER_LOWER_LIMIT, *(uint16_t*)&raw_value);
int16_t raw_value = voltage * 1000.0; // round and format
return _wireWriteRegister(&dev->i2c_dev, INA3221_REG_VALID_POWER_LOWER_LIMIT, *(uint16_t*)&raw_value);
}

87
extras/ina3221/ina3221.h
View file

@ -19,14 +19,14 @@
extern "C" {
#endif
#include "i2c/i2c.h"
#include <i2c/i2c.h>
#define INA3221_ADDR_0 (0x40) // A0 to GND
#define INA3221_ADDR_1 (0x41) // A0 to Vs+
#define INA3221_ADDR_2 (0x42) // A0 to SDA
#define INA3221_ADDR_3 (0x43) // A0 to SCL
#define INA3221_ADDR_0 (0x40) ///< A0 to GND
#define INA3221_ADDR_1 (0x41) ///< A0 to Vs+
#define INA3221_ADDR_2 (0x42) ///< A0 to SDA
#define INA3221_ADDR_3 (0x43) ///< A0 to SCL
#define BUS_NUMBER 3 //Number of shunt available
#define BUS_NUMBER 3 ///< Number of shunt available
#define INA3221_REG_CONFIG (0x00)
#define INA3221_REG_SHUNTVOLTAGE_1 (0x01)
@ -39,7 +39,7 @@ extern "C" {
#define INA3221_REG_VALID_POWER_UPPER_LIMIT (0x10)
#define INA3221_REG_VALID_POWER_LOWER_LIMIT (0x11)
/*
/**
* Default register after reset
*/
#define INA3221_DEFAULT_CONFIG (0x7127)
@ -48,11 +48,12 @@ extern "C" {
#define INA3221_DEFAULT_POWER_LOWER_LIMIT (0x2328) //9V
#define INA3221_MASK_CONFIG (0x7C00)
/*
* Numbrer of samples
/**
* Number of samples
*/
typedef enum {
INA3221_AVG_1 = 0, //Default
INA3221_AVG_1 = 0, ///< Default
INA3221_AVG_4,
INA3221_AVG_16,
INA3221_AVG_64,
@ -62,7 +63,7 @@ typedef enum {
INA3221_AVG_1024,
} ina3221_avg_t;
/*
/**
* Channel selection list
*/
typedef enum {
@ -71,7 +72,7 @@ typedef enum {
CHANNEL_3,
} ina3221_channel_t;
/*
/**
* Conversion time in us
*/
typedef enum {
@ -79,63 +80,63 @@ typedef enum {
INA3221_CT_204,
INA3221_CT_332,
INA3221_CT_588,
INA3221_CT_1100, //Default
INA3221_CT_1100, ///< Default
INA3221_CT_2116,
INA3221_CT_4156,
INA3221_CT_8244,
} ina3221_ct_t ;
} ina3221_ct_t;
/*
/**
* Config description register
*/
typedef union
{
struct {
uint16_t esht : 1; // Enable/Disable shunt measure // LSB
uint16_t ebus : 1; // Enable/Disable bus measure
uint16_t mode : 1; // Single shot measure or continious mode
uint16_t vsht : 3; // Shunt voltage conversion time
uint16_t vbus : 3; // Bus voltage conversion time
uint16_t avg : 3; // number of sample collected and averaged together
uint16_t ch3 : 1; // Enable/Disable channel 3
uint16_t ch2 : 1; // Enable/Disable channel 2
uint16_t ch1 : 1; // Enable/Disable channel 1
uint16_t rst : 1; //Set this bit to 1 to reset device // MSB
uint16_t esht : 1; ///< Enable/Disable shunt measure // LSB
uint16_t ebus : 1; ///< Enable/Disable bus measure
uint16_t mode : 1; ///< Single shot measure or continious mode
uint16_t vsht : 3; ///< Shunt voltage conversion time
uint16_t vbus : 3; ///< Bus voltage conversion time
uint16_t avg : 3; ///< number of sample collected and averaged together
uint16_t ch3 : 1; ///< Enable/Disable channel 3
uint16_t ch2 : 1; ///< Enable/Disable channel 2
uint16_t ch1 : 1; ///< Enable/Disable channel 1
uint16_t rst : 1; ///< Set this bit to 1 to reset device // MSB
};
uint16_t config_register;
} ina3221_config_t;
/*
/**
* Mask/enable description register
*/
typedef union
{
struct {
uint16_t cvrf : 1 ; // Conversion ready flag (1: ready) // LSB
uint16_t tcf : 1 ; // Timing control flag
uint16_t pvf : 1 ; // Power valid flag
uint16_t wf : 3 ; // Warning alert flag (Read mask to clear) (order : Channel1:channel2:channel3)
uint16_t sf : 1 ; // Sum alert flag (Read mask to clear)
uint16_t cf : 3 ; // Critical alert flag (Read mask to clear) (order : Channel1:channel2:channel3)
uint16_t cen : 1 ; // Critical alert latch (1:enable)
uint16_t wen : 1 ; // Warning alert latch (1:enable)
uint16_t scc3 : 1 ; // channel 3 sum (1:enable)
uint16_t scc2 : 1 ; // channel 2 sum (1:enable)
uint16_t scc1 : 1 ; // channel 1 sum (1:enable)
uint16_t : 1 ; //Reserved //MSB
uint16_t cvrf : 1; ///< Conversion ready flag (1: ready) // LSB
uint16_t tcf : 1; ///< Timing control flag
uint16_t pvf : 1; ///< Power valid flag
uint16_t wf : 3; ///< Warning alert flag (Read mask to clear) (order : Channel1:channel2:channel3)
uint16_t sf : 1; ///< Sum alert flag (Read mask to clear)
uint16_t cf : 3; ///< Critical alert flag (Read mask to clear) (order : Channel1:channel2:channel3)
uint16_t cen : 1; ///< Critical alert latch (1:enable)
uint16_t wen : 1; ///< Warning alert latch (1:enable)
uint16_t scc3 : 1; ///< channel 3 sum (1:enable)
uint16_t scc2 : 1; ///< channel 2 sum (1:enable)
uint16_t scc1 : 1; ///< channel 1 sum (1:enable)
uint16_t : 1; ///< Reserved //MSB
};
uint16_t mask_register;
} ina3221_mask_t;
/*
/**
* Device description
*/
typedef struct {
const i2c_dev_t i2c_dev; // ina3221 I2C address
const uint16_t shunt[BUS_NUMBER]; //Memory of shunt value (mOhm)
ina3221_config_t config; //Memory of ina3221 config
ina3221_mask_t mask; //Memory of mask_config
const i2c_dev_t i2c_dev; ///< ina3221 I2C address
const uint16_t shunt[BUS_NUMBER]; ///< Memory of shunt value (mOhm)
ina3221_config_t config; ///< Memory of ina3221 config
ina3221_mask_t mask; ///< Memory of mask_config
} ina3221_t;
/**