SPI3 support
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parent
762f73515b
commit
546504f14c
3 changed files with 38 additions and 6 deletions
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@ -9,4 +9,8 @@
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#define SSD1306_SPI4_SUPPORT 1
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#define SSD1306_SPI4_SUPPORT 1
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#endif
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#endif
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#ifndef SSD1306_SPI3_SUPPORT
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#define SSD1306_SPI3_SUPPORT 1
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#endif
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#endif /* _EXTRAS_SSD1306_CONFIG_H_ */
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#endif /* _EXTRAS_SSD1306_CONFIG_H_ */
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@ -107,6 +107,15 @@ int ssd1306_command(const ssd1306_t *dev, uint8_t cmd)
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spi_transfer_8(SPI_BUS, cmd);
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spi_transfer_8(SPI_BUS, cmd);
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gpio_write(dev->cs_pin, true);
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gpio_write(dev->cs_pin, true);
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break;
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break;
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#endif
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#if (SSD1306_SPI3_SUPPORT)
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case SSD1306_PROTO_SPI3:
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gpio_write(dev->cs_pin, false);
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spi_set_command(SPI_BUS,1,0); // command mode
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spi_transfer_8(SPI_BUS, cmd);
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spi_clear_command(SPI_BUS);
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gpio_write(dev->cs_pin, true);
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break;
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#endif
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#endif
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default:
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default:
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debug("Unsupported protocol");
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debug("Unsupported protocol");
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@ -146,6 +155,13 @@ int ssd1306_init(const ssd1306_t *dev)
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gpio_enable(dev->dc_pin, GPIO_OUTPUT);
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gpio_enable(dev->dc_pin, GPIO_OUTPUT);
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spi_init(SPI_BUS, SPI_MODE0, SPI_FREQ_DIV_8M, true, SPI_LITTLE_ENDIAN, true);
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spi_init(SPI_BUS, SPI_MODE0, SPI_FREQ_DIV_8M, true, SPI_LITTLE_ENDIAN, true);
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break;
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break;
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#endif
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#if (SSD1306_SPI3_SUPPORT)
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case SSD1306_PROTO_SPI3:
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gpio_enable(dev->cs_pin, GPIO_OUTPUT);
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gpio_write(dev->cs_pin, true);
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spi_init(SPI_BUS, SPI_MODE0, SPI_FREQ_DIV_8M, true, SPI_LITTLE_ENDIAN, true);
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break;
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#endif
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#endif
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default:
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default:
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debug("Unsupported protocol");
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debug("Unsupported protocol");
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@ -221,9 +237,19 @@ int ssd1306_load_frame_buffer(const ssd1306_t *dev, uint8_t buf[])
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if (buf)
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if (buf)
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spi_transfer(SPI_BUS, buf, NULL, len, SPI_8BIT);
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spi_transfer(SPI_BUS, buf, NULL, len, SPI_8BIT);
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else
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else
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for (i = 0; i < len; i ++) {
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spi_repeat_send_8(SPI_BUS,0,len);
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spi_transfer_8(SPI_BUS, 0);
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gpio_write(dev->cs_pin, true);
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}
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break;
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#endif
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#if (SSD1306_SPI3_SUPPORT)
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case SSD1306_PROTO_SPI3:
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spi_set_command(SPI_BUS,1,1); // data mode
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gpio_write(dev->cs_pin, false);
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if (buf)
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spi_transfer(SPI_BUS, buf, NULL, len, SPI_8BIT);
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else
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spi_repeat_send_8(SPI_BUS,0,len);
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spi_clear_command(SPI_BUS);
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gpio_write(dev->cs_pin, true);
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gpio_write(dev->cs_pin, true);
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break;
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break;
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#endif
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#endif
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@ -33,7 +33,7 @@ typedef enum
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{
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{
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SSD1306_PROTO_I2C = 0, //!< I2C
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SSD1306_PROTO_I2C = 0, //!< I2C
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SSD1306_PROTO_SPI4, //!< SPI 8 bits + D/C pin
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SSD1306_PROTO_SPI4, //!< SPI 8 bits + D/C pin
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SSD1306_PROTO_SPI3 //!< SPI 9 bits, currently not supported
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SSD1306_PROTO_SPI3 //!< SPI 9 bits
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} ssd1306_protocol_t;
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} ssd1306_protocol_t;
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/**
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/**
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@ -42,11 +42,13 @@ typedef enum
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typedef struct
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typedef struct
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{
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{
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ssd1306_protocol_t protocol;
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ssd1306_protocol_t protocol;
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union {
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#if (SSD1306_I2C_SUPPORT)
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#if (SSD1306_I2C_SUPPORT)
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uint8_t addr; //!< I2C address, used by SSD1306_PROTO_I2C
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uint8_t addr ; //!< I2C address, used by SSD1306_PROTO_I2C
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#endif
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#endif
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uint8_t cs_pin ; //!< Chip Select GPIO pin, used by SSD1306_PROTO_SPI3, SSD1306_PROTO_SPI4
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} ;
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#if (SSD1306_SPI4_SUPPORT)
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#if (SSD1306_SPI4_SUPPORT)
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uint8_t cs_pin; //!< Chip Select GPIO pin, used by SSD1306_PROTO_SPI3, SSD1306_PROTO_SPI4
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uint8_t dc_pin; //!< Data/Command GPIO pin, used by SSD1306_PROTO_SPI4
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uint8_t dc_pin; //!< Data/Command GPIO pin, used by SSD1306_PROTO_SPI4
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#endif
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#endif
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uint8_t width; //!< Screen width, currently supported 128px, 96px
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uint8_t width; //!< Screen width, currently supported 128px, 96px
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