xtensa_interrupts: Add esync after writing intenable/intclear, add comment about non-interrupt-safe mask/unmask
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2c1b1ab141
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1 changed files with 6 additions and 3 deletions
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@ -11,18 +11,21 @@
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#define _XTENSA_INTERRUPTS_H
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#define _XTENSA_INTERRUPTS_H
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#include <stdint.h>
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#include <stdint.h>
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#include <xtensa/hal.h>
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#include <xtensa/hal.h>
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#include <common_macros.h>
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void sdk__xt_int_exit (void);
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void sdk__xt_int_exit (void);
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void sdk__xt_user_exit (void);
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void sdk__xt_user_exit (void);
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void sdk__xt_tick_timer_init (void);
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void sdk__xt_tick_timer_init (void);
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void sdk__xt_timer_int1(void);
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void sdk__xt_timer_int1(void);
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/* ESPTODO: the mask/unmask functions aren't thread safe */
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INLINED void _xt_isr_unmask (uint32_t unmask)
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INLINED void _xt_isr_unmask (uint32_t unmask)
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{
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{
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uint32_t intenable;
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uint32_t intenable;
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asm volatile ("rsr %0, intenable" : "=a" (intenable));
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asm volatile ("rsr %0, intenable" : "=a" (intenable));
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intenable |= unmask;
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intenable |= unmask;
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asm volatile ("wsr %0, intenable" :: "a" (intenable));
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asm volatile ("wsr %0, intenable; esync" :: "a" (intenable));
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}
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}
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INLINED void _xt_isr_mask (uint32_t mask)
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INLINED void _xt_isr_mask (uint32_t mask)
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@ -30,7 +33,7 @@ INLINED void _xt_isr_mask (uint32_t mask)
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uint32_t intenable;
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uint32_t intenable;
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asm volatile ("rsr %0, intenable" : "=a" (intenable));
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asm volatile ("rsr %0, intenable" : "=a" (intenable));
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intenable &= ~mask;
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intenable &= ~mask;
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asm volatile ("wsr %0, intenable" :: "a" (intenable));
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asm volatile ("wsr %0, intenable; esync" :: "a" (intenable));
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}
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}
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INLINED uint32_t _xt_read_ints (void)
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INLINED uint32_t _xt_read_ints (void)
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@ -42,7 +45,7 @@ INLINED uint32_t _xt_read_ints (void)
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INLINED void _xt_clear_ints(uint32_t mask)
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INLINED void _xt_clear_ints(uint32_t mask)
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{
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{
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asm volatile ("wsr %0, intclear" :: "a" (mask));
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asm volatile ("wsr %0, intclear; esync" :: "a" (mask));
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}
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}
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typedef void (* _xt_isr)(void);
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typedef void (* _xt_isr)(void);
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