Interrupt driven stdin UART driver
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8 changed files with 161 additions and 71 deletions
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# Component makefile for extras/serial-driver
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#
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# See examples/terminal for usage
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INC_DIRS += $(ROOT)extras/serial-driver
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# args for passing into compile rule generation
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extras/serial-driver_INC_DIR = $(ROOT)extras/serial-driver
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extras/serial-driver_SRC_DIR = $(ROOT)extras/serial-driver
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$(eval $(call component_compile_rules,extras/serial-driver))
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11
extras/stdin_uart_interrupt/README.txt
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11
extras/stdin_uart_interrupt/README.txt
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This module adds interrupt driven receive on UART 0. Using semaphores, a thread
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calling read(...) when no data is available will block in an RTOS expected
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manner until data arrives.
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This allows for a background thread running a serial terminal in your program
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for debugging and state inspection consuming no CPU cycles at all. Not using
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this module will make that thread while(1) until data arrives.
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No code changes are needed for adding this module, all you need to do is to add
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it to EXTRA_COMPONENTS and add the directive configUSE_COUNTING_SEMAPHORES from
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FreeRTOSConfig.h in examples/terminal to your project.
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13
extras/stdin_uart_interrupt/component.mk
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13
extras/stdin_uart_interrupt/component.mk
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# Component makefile for extras/stdin_uart_interrupt
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#
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# See examples/terminal for usage. Well, actually there is no need to see it
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# for 'usage' as this module is a drop-in replacement for the original polled
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# version of reading from the UART.
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INC_DIRS += $(ROOT)extras/stdin_uart_interrupt
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# args for passing into compile rule generation
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extras/stdin_uart_interrupt_INC_DIR = $(ROOT)extras/stdin_uart_interrupt
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extras/stdin_uart_interrupt_SRC_DIR = $(ROOT)extras/stdin_uart_interrupt
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$(eval $(call component_compile_rules,extras/stdin_uart_interrupt))
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@ -23,8 +23,6 @@
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*/
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#include <esp8266.h>
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#include <espressif/esp8266/esp8266.h>
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#include <espressif/esp8266/uart_register.h>
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#include <FreeRTOS.h>
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#include <semphr.h>
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@ -35,36 +33,36 @@
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// IRQ driven UART RX driver for ESP8266 written for use with esp-open-rtos
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// TODO: Handle UART1
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#define UART0_RX_SIZE (81)
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#ifndef UART0
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#define UART0 (0)
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#endif
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#define UART0_RX_SIZE (128) // ESP8266 UART HW FIFO size
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static xSemaphoreHandle uart0_sem = NULL;
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static char rx_buf[UART0_RX_SIZE];
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static uint8_t rd_pos = 0;
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static uint8_t wr_pos = 0;
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static bool inited = false;
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static void uart0_rx_init(void);
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IRAM void uart0_rx_handler(void)
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{
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// TODO: Handle UART1, see reg 0x3ff20020, bit2, bit0 represents uart1 and uart0 respectively
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if (UART_RXFIFO_FULL_INT_ST != (READ_PERI_REG(UART_INT_ST(UART0)) & UART_RXFIFO_FULL_INT_ST)) {
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if (!UART(UART0).INT_STATUS & UART_INT_STATUS_RXFIFO_FULL) {
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return;
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}
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WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_FULL_INT_CLR);
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while (READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) {
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char ch = READ_PERI_REG(UART_FIFO(UART0)) & 0xff;
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uint8_t wr_next = (wr_pos+1) % UART0_RX_SIZE;
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if (wr_next != rd_pos) {
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rx_buf[wr_pos] = ch;
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wr_pos = (wr_pos+1) % UART0_RX_SIZE;
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xSemaphoreGiveFromISR(uart0_sem, NULL);
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// printf(" [%08x (%d)]\n", READ_PERI_REG(UART_INT_ST(UART0)), READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S));
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if (UART(UART0).INT_STATUS & UART_INT_STATUS_RXFIFO_FULL) {
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UART(UART0).INT_CLEAR = UART_INT_CLEAR_RXFIFO_FULL;
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if (UART(UART0).STATUS & (UART_STATUS_RXFIFO_COUNT_M << UART_STATUS_RXFIFO_COUNT_S)) {
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long int xHigherPriorityTaskWoken;
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_xt_isr_mask(1 << INUM_UART);
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_xt_clear_ints(1<<INUM_UART);
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xSemaphoreGiveFromISR(uart0_sem, &xHigherPriorityTaskWoken);
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if(xHigherPriorityTaskWoken) {
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portYIELD();
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}
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}
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} else {
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printf("Error: unexpected uart irq, INT_STATUS 0x%02x\n", UART(UART0).INT_STATUS);
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}
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}
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@ -72,26 +70,23 @@ uint32_t uart0_num_char(void)
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{
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uint32_t count;
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if (!inited) uart0_rx_init();
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_xt_isr_mask(1 << INUM_UART);
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if (rd_pos > wr_pos) count = rd_pos - wr_pos;
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else count = wr_pos - rd_pos;
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_xt_isr_unmask(1 << INUM_UART);
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count = UART(UART0).STATUS & (UART_STATUS_RXFIFO_COUNT_M << UART_STATUS_RXFIFO_COUNT_S);
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return count;
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}
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// _read_r in core/newlib_syscalls.c will be skipped in favour of this function
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// _read_r in core/newlib_syscalls.c will be skipped by the linker in favour
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// of this function
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long _read_r(struct _reent *r, int fd, char *ptr, int len)
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{
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if (!inited) uart0_rx_init();
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for(int i = 0; i < len; i++) {
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char ch;
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if (xSemaphoreTake(uart0_sem, portMAX_DELAY)) {
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_xt_isr_mask(1 << INUM_UART);
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ch = rx_buf[rd_pos];
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rd_pos = (rd_pos+1) % UART0_RX_SIZE;
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if (!(UART(UART0).STATUS & (UART_STATUS_RXFIFO_COUNT_M << UART_STATUS_RXFIFO_COUNT_S))) {
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_xt_isr_unmask(1 << INUM_UART);
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ptr[i] = ch;
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if (!xSemaphoreTake(uart0_sem, portMAX_DELAY)) {
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printf("\nFailed to get sem\n");
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}
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}
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ptr[i] = UART(UART0).FIFO & (UART_FIFO_DATA_M << UART_FIFO_DATA_S);
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}
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return len;
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}
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@ -104,16 +99,19 @@ static void uart0_rx_init(void)
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_xt_isr_attach(INUM_UART, uart0_rx_handler);
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_xt_isr_unmask(1 << INUM_UART);
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//clear rx and tx fifo,not ready
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SET_PERI_REG_MASK(UART_CONF0(UART0), UART_RXFIFO_RST | UART_TXFIFO_RST);
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CLEAR_PERI_REG_MASK(UART_CONF0(UART0), UART_RXFIFO_RST | UART_TXFIFO_RST);
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// clear rx and tx fifo,not ready
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uint32_t conf = UART(UART0).CONF0;
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UART(UART0).CONF0 = conf | UART_CONF0_RXFIFO_RESET | UART_CONF0_TXFIFO_RESET;
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UART(UART0).CONF0 = conf & ~(UART_CONF0_RXFIFO_RESET | UART_CONF0_TXFIFO_RESET);
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//set rx fifo trigger
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WRITE_PERI_REG(UART_CONF1(UART0), (trig_lvl & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S);
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// set rx fifo trigger
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UART(UART0).CONF1 |= (trig_lvl & UART_CONF1_RXFIFO_FULL_THRESHOLD_M) << UART_CONF1_RXFIFO_FULL_THRESHOLD_S;
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// clear all interrupts
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UART(UART0).INT_CLEAR = 0x1ff;
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// enable rx_interrupt
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UART(UART0).INT_ENABLE = UART_INT_ENABLE_RXFIFO_FULL;
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//clear all interrupt
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WRITE_PERI_REG(UART_INT_CLR(UART0), 0xffff);
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//enable rx_interrupt
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SET_PERI_REG_MASK(UART_INT_ENA(UART0), UART_RXFIFO_FULL_INT_ENA);
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inited = true;
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}
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* THE SOFTWARE.
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*/
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#ifndef __I2C_H__
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#define __I2C_H__
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#endif
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#ifndef __STDIN_UART_INTERRUPT_H__
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#define __STDIN_UART_INTERRUPT_H__
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#include <stdint.h>
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#include <stdbool.h>
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// Return number of characters waiting in UART0
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uint32_t uart0_num_char(void);
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#endif
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