diff --git a/core/include/esp/registers.h b/core/include/esp/registers.h
index d133b64..dfbc2e3 100644
--- a/core/include/esp/registers.h
+++ b/core/include/esp/registers.h
@@ -22,6 +22,7 @@
 #include "esp/gpio_regs.h"
 #include "esp/timer_regs.h"
 #include "esp/wdt_regs.h"
+#include "esp/rtcmem_regs.h"
 #include "esp/dport_regs.h"
 
 /* Register base addresses
@@ -41,8 +42,8 @@
 //#define WDT_BASE   (MMIO_BASE + 0x0900)
 #define I2C_BASE   (MMIO_BASE + 0x0d00)
 //#define UART1_BASE (MMIO_BASE + 0x0F00)
-#define RTCB_BASE  (MMIO_BASE + 0x1000)
-#define RTCS_BASE  (MMIO_BASE + 0x1100)
-#define RTCU_BASE  (MMIO_BASE + 0x1200)
+//#define RTCB_BASE  (MMIO_BASE + 0x1000)
+//#define RTCS_BASE  (MMIO_BASE + 0x1100)
+//#define RTCU_BASE  (MMIO_BASE + 0x1200)
 
 #endif
diff --git a/core/include/esp/rtcmem_regs.h b/core/include/esp/rtcmem_regs.h
new file mode 100644
index 0000000..8462b0e
--- /dev/null
+++ b/core/include/esp/rtcmem_regs.h
@@ -0,0 +1,44 @@
+/* esp/rtcmem_regs.h
+ *
+ * ESP8266 RTC semi-persistent memory register definitions
+ *
+ * Not compatible with ESP SDK register access code.
+ */
+
+#ifndef _ESP_RTCMEM_REGS_H
+#define _ESP_RTCMEM_REGS_H
+
+#include "esp/types.h"
+#include "common_macros.h"
+
+/* The RTC memory is a range of 256 words (1 KB) of general-purpose memory
+ * within the Real Time Clock peripheral.  Because it's part of the RTC, it
+ * continues to be powered (and retains its contents) even when the ESP8266 is
+ * in its deepest sleep mode (and other RAM is lost).  It can therefore be
+ * useful for keeping data which must be persisted through sleep or a reset.
+ *
+ * Note, however, that it is not "battery backed", or flash memory, and thus
+ * will not keep its contents if power is removed entirely.
+ */
+
+// We could just define these as 'volatile uint32_t *', but doing things this
+// way means that the RTCMEM* defines will include array size information, so
+// the C compiler can do bounds-checking for static arguments.
+
+typedef volatile uint32_t rtcmem_array64_t[64];
+typedef volatile uint32_t rtcmem_array128_t[128];
+typedef volatile uint32_t rtcmem_array256_t[256];
+
+#define RTCMEM_BASE 0x60001000
+
+/* RTCMEM is an array covering the entire semi-persistent memory range */
+#define RTCMEM (*(rtcmem_array256_t *)(RTCMEM_BASE))
+
+/* RTCMEM_BACKUP / RTCMEM_SYSTEM / RTCMEM_USER are the same range, divided up
+ * into chunks by application/use, as defined by Espressif */
+
+#define RTCMEM_BACKUP (*(rtcmem_array64_t *)(RTCMEM_BASE))
+#define RTCMEM_SYSTEM (*(rtcmem_array64_t *)(RTCMEM_BASE + 0x100))
+#define RTCMEM_USER (*(rtcmem_array128_t *)(RTCMEM_BASE + 0x200))
+
+#endif /* _ESP_RTCMEM_REGS_H */