Basic support for GPIOs 0-15.
Start new 'core' component for low-level parts Progress towards #8
This commit is contained in:
Angus Gratton
parent
b01e7a89bd
commit
2c46be9825
15 changed files with 704 additions and 14 deletions
6
core/component.mk
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6
core/component.mk
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INC_DIRS += $(core_ROOT)include
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# args for passing into compile rule generation
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core_ROOT = $(ROOT)core/
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core_SRC_DIR = $(core_ROOT)
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$(eval $(call component_compile_rules,core))
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20
core/esp_iomux.c
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20
core/esp_iomux.c
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/* Compiler-level implementation for esp/iomux.h and esp/iomux_private.h
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*
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* Part of esp-open-rtos
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* Copyright (C) 2015 Superhouse Automation Pty Ltd
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* BSD Licensed as described in the file LICENSE
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*/
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#include "esp/iomux.h"
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#include "common_macros.h"
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/* These are non-static versions of the GPIO mapping tables in
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iomux.h, so if they need to be linked only one copy is linked for
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the entire program.
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These are only ever linked in if the arguments to gpio_to_ionum
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or ionum_to_gpio are not known at compile time.
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Arrays are declared as 32-bit integers in IROM to save RAM.
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*/
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const IROM uint32_t GPIO_TO_IOMUX_MAP[] = _GPIO_TO_IOMUX;
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const IROM uint32_t IOMUX_TO_GPIO_MAP[] = _IOMUX_TO_GPIO;
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33
core/include/common_macros.h
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33
core/include/common_macros.h
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/* Some common compiler macros
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*
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* Not esp8266-specific.
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*
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* Part of esp-open-rtos
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* Copyright (C) 2015 Superhouse Automation Pty Ltd
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* BSD Licensed as described in the file LICENSE
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*/
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#ifndef _COMMON_MACROS_H
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#define _COMMON_MACROS_H
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#define UNUSED __attributed((unused))
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#ifndef BIT
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#define BIT(X) (1<<X)
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#endif
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/* Use this macro to store constant values in IROM flash instead
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of having them loaded into rodata (which resides in DRAM)
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Unlike the ESP8266 SDK you don't need an attribute like this for
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standard functions. They're stored in flash by default. But
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variables need them.
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Important to note: IROM flash can only be accessed via 32-bit word
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aligned reads. It's up to the user of this attribute to ensure this.
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*/
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#define IROM __attribute__((section(".irom0"))) const
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#define INLINED inline static __attribute__((always_inline)) __attribute__((unused))
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#endif
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84
core/include/esp/gpio.h
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84
core/include/esp/gpio.h
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@ -0,0 +1,84 @@
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/** esp_iomux.h
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*
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* GPIO functions.
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*
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* Part of esp-open-rtos
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* Copyright (C) 2015 Superhouse Automation Pty Ltd
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* BSD Licensed as described in the file LICENSE
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*/
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#ifndef _ESP_GPIO_H
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#include <stdbool.h>
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#include "esp/registers.h"
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#include "esp/iomux.h"
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typedef enum {
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GPIO_INPUT = 0,
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GPIO_OUTPUT = IOMUX_OE,
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GPIO_INPUT_PULLUP = IOMUX_PU,
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} gpio_direction_t;
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/* Enable GPIO on the specified pin, and set it to input/output/ with
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* pullup as needed
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*/
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INLINED void gpio_enable(const uint8_t gpio_num, const gpio_direction_t direction)
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{
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iomux_set_gpio_function(gpio_num, (uint8_t)direction);
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if(direction == GPIO_OUTPUT)
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GPIO_DIR_SET = BIT(gpio_num);
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else
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GPIO_DIR_CLEAR = BIT(gpio_num);
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}
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/* Disable GPIO on the specified pin, and set it Hi-Z.
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*
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* If later muxing this pin to a different function, make sure to set
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* IOMUX_OE if necessary to enable the output buffer.
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*/
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INLINED void gpio_disable(const uint8_t gpio_num)
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{
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GPIO_DIR_CLEAR = BIT(gpio_num);
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*gpio_iomux_reg(gpio_num) &= ~IOMUX_OE;
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}
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/* Set output of a pin high or low.
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*
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* Only works if pin has been set to GPIO_OUTPUT via gpio_enable()
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*/
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INLINED void gpio_write(const uint8_t gpio_num, const uint32_t set)
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{
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if(set)
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GPIO_OUT_SET = BIT(gpio_num);
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else
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GPIO_OUT_CLEAR = BIT(gpio_num);
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}
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/* Toggle output of a pin
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*
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* Only works if pin has been set to GPIO_OUTPUT via gpio_enable()
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*/
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INLINED void gpio_toggle(const uint8_t gpio_num)
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{
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/* Why implement like this instead of GPIO_OUT_REG ^= xxx?
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Concurrency. If an interrupt or higher priority task writes to
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GPIO_OUT between reading and writing, only the gpio_num pin can
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get an invalid value. Prevents one task from clobbering another
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task's pins, without needing to disable/enable interrupts.
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*/
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if(GPIO_OUT_REG & BIT(gpio_num))
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GPIO_OUT_CLEAR = BIT(gpio_num);
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else
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GPIO_OUT_SET = BIT(gpio_num);
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}
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/* Read input value of a GPIO pin.
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*
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* If pin is set as an input, this reads the value on the pin.
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* If pin is set as an output, this reads the last value written to the pin.
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*/
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INLINED bool gpio_read(const uint8_t gpio_num)
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{
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return GPIO_IN_REG & BIT(gpio_num);
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}
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#endif
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199
core/include/esp/iomux.h
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199
core/include/esp/iomux.h
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/** esp/iomux.h
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*
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* Configuration of iomux registers.
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*
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* Part of esp-open-rtos
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* Copyright (C) 2015 Superhouse Automation Pty Ltd
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* BSD Licensed as described in the file LICENSE
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*/
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#ifndef _ESP_IOMUX_H
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#define _ESP_IOMUX_H
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#include <stdint.h>
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#include "esp/registers.h"
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/**
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* Convert a GPIO pin number to an iomux register index.
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*
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* This function should evaluate to a constant if the gpio_number is
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* known at compile time, or return the result from a lookup table if not.
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*
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*/
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inline static uint8_t gpio_to_iomux(const uint8_t gpio_number);
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/**
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* Convert an iomux register index to a GPIO pin number.
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*
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* This function should evaluate to a constant if the iomux_num is
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* known at compile time, or return the result from a lookup table if not.
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*
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*/
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inline static uint8_t iomux_to_gpio(const uint8_t iomux_num);
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/**
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* Directly get the IOMUX register for a particular gpio number
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*
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* ie *gpio_iomux_reg(3) is equivalent to IOMUX_GP03
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*/
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inline static esp_reg_t gpio_iomux_reg(const uint8_t gpio_number)
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{
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return &IOMUX_REG(gpio_to_iomux(gpio_number));
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}
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/**
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* Set a pin to the GPIO function.
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*
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* This allows you to set pins to GPIO without knowing in advance the
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* exact register masks to use.
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*
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* flags can be any of IOMUX_OE, IOMUX_PU, IOMUX_PD, etc. Any other flags will be cleared.
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*
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* Equivalent to a direct register operation if gpio_number is known at compile time.
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* ie the following are equivalent:
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*
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* iomux_set_gpio_function(12, IOMUX_OE);
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* IOMUX_GP12 = (IOMUX_GP12 & ~IOMUX_FUNC_MASK) | IOMUX_GP12_GPIO | IOMUX_OE;
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*/
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inline static void iomux_set_gpio_function(const uint8_t gpio_number, const uint8_t flags)
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{
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const uint8_t reg_idx = gpio_to_iomux(gpio_number);
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const esp_reg_t reg = &IOMUX_REG(reg_idx);
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const uint32_t func = (reg_idx > 11 ? IOMUX_FUNC_A : IOMUX_FUNC_D) | flags;
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const uint32_t val = *reg & ~(IOMUX_FUNC_MASK | IOMUX_FLAG_MASK);
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*reg = val | func;
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}
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/**
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* Set an IOMUX register directly
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*
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* Shortcut for
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* IOMUX_GPxx = (IOMUX_GPxx & ~IOMUX_FUNC_MASK) | IOMUX_GPxx_func
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*
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* instead call
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* IOMUX_SET_FN(GPxx, func);
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* can also do
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* IOMUX_SET_FN(GP12, GPIO)|IOMUX_OE;
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* ... to set the OE flag if it was previously cleared.
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*
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* but a better option is:
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* IOMUX_SET(GP12, GPIO, IOMUX_OE);
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* ...which clears any other flags at the same time.
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*/
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#define IOMUX_SET_FN(GP,FN) IOMUX_##GP = ((IOMUX_##GP & ~IOMUX_FUNC_MASK) | IOMUX_##GP##_##FN)
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#define IOMUX_SET(GP,FN,FLAGS) IOMUX_##GP = ((IOMUX_##GP & ~(IOMUX_FUNC_MASK|IOMUX_FLAG_MASK)) | IOMUX_##GP##_##FN|FLAGS)
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/* IOMUX register index 0, GPIO 12 */
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#define IOMUX_GP12 IOMUX_REG(0)
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#define IOMUX_GP12_MTDI IOMUX_FUNC_A
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#define IOMUX_GP12_I2S_DIN IOMUX_FUNC_B
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#define IOMUX_GP12_HSPI_MISO IOMUX_FUNC_C
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#define IOMUX_GP12_GPIO IOMUX_FUNC_D
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#define IOMUX_GP12_UART0_DTR IOMUX_FUNC_E
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/* IOMUX register index 1, GPIO 13 */
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#define IOMUX_GP13 IOMUX_REG(1)
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#define IOMUX_GP13_MTCK IOMUX_FUNC_A
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#define IOMUX_GP13_I2SI_BCK IOMUX_FUNC_B
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#define IOMUX_GP13_HSPI_MOSI IOMUX_FUNC_C
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#define IOMUX_GP13_GPIO IOMUX_FUNC_D
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#define IOMUX_GP13_UART0_CTS IOMUX_FUNC_E
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/* IOMUX register index 2, GPIO 14 */
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#define IOMUX_GP14 IOMUX_REG(2)
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#define IOMUX_GP14_MTMS IOMUX_FUNC_A
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#define IOMUX_GP14_I2SI_WS IOMUX_FUNC_B
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#define IOMUX_GP14_HSPI_CLK IOMUX_FUNC_C
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#define IOMUX_GP14_GPIO IOMUX_FUNC_D
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#define IOMUX_GP14_UART0_DSR IOMUX_FUNC_E
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/* IOMUX register index 3, GPIO 15 */
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#define IOMUX_GP15 IOMUX_REG(3)
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#define IOMUX_GP15_MTDO IOMUX_FUNC_A
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#define IOMUX_GP15_I2SO_BCK IOMUX_FUNC_B
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#define IOMUX_GP15_HSPI_CS0 IOMUX_FUNC_C
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#define IOMUX_GP15_GPIO IOMUX_FUNC_D
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#define IOMUX_GP15_UART0_RTS IOMUX_FUNC_E
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/* IOMUX register index 4, GPIO 3 */
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#define IOMUX_GP03 IOMUX_REG(4)
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#define IOMUX_GP03_UART0_RX IOMUX_FUNC_A
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#define IOMUX_GP03_I2SO_DATA IOMUX_FUNC_B
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#define IOMUX_GP03_GPIO IOMUX_FUNC_D
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#define IOMUX_GP03_CLK_XTAL_BK IOMUX_FUNC_E
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/* IOMUX register index 5, GPIO 1 */
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#define IOMUX_GP01 IOMUX_REG(5)
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#define IOMUX_GP01_UART0_TX IOMUX_FUNC_A
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#define IOMUX_GP01_SPICS1 IOMUX_FUNC_B
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#define IOMUX_GP01_GPIO IOMUX_FUNC_D
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#define IOMUX_GP01_CLK_RTC_BK IOMUX_FUNC_E
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/* IOMUX register index 6, GPIO 6 */
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#define IOMUX_GP06 IOMUX_REG(6)
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#define IOMUX_GP06_SD_CLK IOMUX_FUNC_A
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#define IOMUX_GP06_SP_ICLK IOMUX_FUNC_B
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#define IOMUX_GP06_GPIO IOMUX_FUNC_D
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#define IOMUX_GP06_UART1_CTS IOMUX_FUNC_E
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/* IOMUX register index 7, GPIO 7 */
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#define IOMUX_GP07 IOMUX_REG(7)
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#define IOMUX_GP07_SD_DATA0 IOMUX_FUNC_A
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#define IOMUX_GP07_SPIQ_MISO IOMUX_FUNC_B
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#define IOMUX_GP07_GPIO IOMUX_FUNC_D
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#define IOMUX_GP07_UART1_TX IOMUX_FUNC_E
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/* IOMUX register index 8, GPIO 8 */
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#define IOMUX_GP08 IOMUX_REG(8)
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#define IOMUX_GP08_SD_DATA1 IOMUX_FUNC_A
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#define IOMUX_GP08_SPID_MOSI IOMUX_FUNC_B
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#define IOMUX_GP08_GPIO IOMUX_FUNC_D
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#define IOMUX_GP08_UART1_RX IOMUX_FUNC_E
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/* IOMUX register index 9, GPIO 9 */
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#define IOMUX_GP09 IOMUX_REG(9)
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#define IOMUX_GP09_SD_DATA2 IOMUX_FUNC_A
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#define IOMUX_GP09_SPI_HD IOMUX_FUNC_B
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#define IOMUX_GP09_GPIO IOMUX_FUNC_D
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#define IOMUX_GP09_UFNC_HSPIHD IOMUX_FUNC_E
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/* IOMUX register index 10, GPIO 10 */
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#define IOMUX_GP10 IOMUX_REG(10)
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#define IOMUX_GP10_SD_DATA3 IOMUX_FUNC_A
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#define IOMUX_GP10_SPI_WP IOMUX_FUNC_B
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#define IOMUX_GP10_GPIO IOMUX_FUNC_D
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#define IOMUX_GP10_HSPIWP IOMUX_FUNC_E
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/* IOMUX register index 11, GPIO 11 */
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#define IOMUX_GP11 IOMUX_REG(11)
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#define IOMUX_GP11_SD_CMD IOMUX_FUNC_A
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#define IOMUX_GP11_SPI_CS0 IOMUX_FUNC_B
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#define IOMUX_GP11_GPIO IOMUX_FUNC_D
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#define IOMUX_GP11_UART1_RTS IOMUX_FUNC_E
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/* IOMUX register index 12, GPIO 0 */
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#define IOMUX_GP00 IOMUX_REG(12)
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#define IOMUX_GP00_GPIO IOMUX_FUNC_A
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#define IOMUX_GP00_SPI_CS2 IOMUX_FUNC_B
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#define IOMUX_GP00_CLK_OUT IOMUX_FUNC_E
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/* IOMUX register index 13, GPIO 2 */
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#define IOMUX_GP02 IOMUX_REG(13)
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#define IOMUX_GP02_GPIO IOMUX_FUNC_A
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#define IOMUX_GP02_I2SO_WS IOMUX_FUNC_B
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#define IOMUX_GP02_UART1_TX IOMUX_FUNC_C
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#define IOMUX_GP02_UART0_TX IOMUX_FUNC_E
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/* IOMUX register index 14, GPIO 4 */
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#define IOMUX_GP04 IOMUX_REG(14)
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#define IOMUX_GP04_GPIO4 IOMUX_FUNC_A
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#define IOMUX_GP04_CLK_XTAL IOMUX_FUNC_B
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/* IOMUX register index 15, GPIO 5 */
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#define IOMUX_GP05 IOMUX_REG(15)
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#define IOMUX_GP05_GPIO5 IOMUX_FUNC_A
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#define IOMUX_GP05_CLK_RTC IOMUX_FUNC_B
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/* esp_iomux_private contains implementation parts of the inline functions
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declared above */
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#include "esp/iomux_private.h"
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#endif
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47
core/include/esp/iomux_private.h
Normal file
47
core/include/esp/iomux_private.h
Normal file
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/** esp/iomux_private.h
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*
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* Private implementation parts of iomux registers. In headers to
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* allow compile-time optimisations.
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*
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* Part of esp-open-rtos
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* Copyright (C) 2015 Superhouse Automation Pty Ltd
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* BSD Licensed as described in the file LICENSE
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*/
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/* Mapping from register index to GPIO and from GPIO index to register
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number. DO NOT USE THESE IN YOUR CODE, call gpio_to_iomux(xxx) or
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iomux_to_gpio(xxx) instead.
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*/
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#ifndef _IOMUX_PRIVATE
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#define _IOMUX_PRIVATE
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#include "common_macros.h"
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#define _IOMUX_TO_GPIO { 12, 13, 14, 15, 3, 1, 6, 7, 8, 9, 10, 11, 0, 2, 4, 5 }
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#define _GPIO_TO_IOMUX { 12, 5, 13, 4, 14, 15, 6, 7, 8, 9, 10, 11, 0, 1, 2, 3 }
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extern const IROM uint32_t GPIO_TO_IOMUX_MAP[];
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extern const IROM uint32_t IOMUX_TO_GPIO_MAP[];
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INLINED uint8_t gpio_to_iomux(const uint8_t gpio_number)
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{
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if(__builtin_constant_p(gpio_number)) {
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static const uint8_t _regs[] = _GPIO_TO_IOMUX;
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return _regs[gpio_number];
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} else {
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return GPIO_TO_IOMUX_MAP[gpio_number];
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}
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}
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INLINED uint8_t iomux_to_gpio(const uint8_t iomux_number)
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{
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if(__builtin_constant_p(iomux_number)) {
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static const uint8_t _regs[] = _IOMUX_TO_GPIO;
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return _regs[iomux_number];
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} else {
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return IOMUX_TO_GPIO_MAP[iomux_number];
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}
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}
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#endif
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116
core/include/esp/registers.h
Normal file
116
core/include/esp/registers.h
Normal file
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@ -0,0 +1,116 @@
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/* esp/registers.h
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*
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* ESP8266 register addresses and bitmasks.
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*
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* Not compatible with ESP SDK register access code.
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*
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* Based on register map documentation:
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* https://github.com/esp8266/esp8266-wiki/wiki/Memory-Map
|
||||
*
|
||||
* Part of esp-open-rtos
|
||||
* Copyright (C) 2015 Superhouse Automation Pty Ltd
|
||||
* BSD Licensed as described in the file LICENSE
|
||||
*/
|
||||
#ifndef _ESP_REGISTERS
|
||||
#define _ESP_REGISTERS
|
||||
#include "common_macros.h"
|
||||
|
||||
typedef volatile uint32_t *esp_reg_t;
|
||||
|
||||
/* Register base addresses
|
||||
|
||||
You shouldn't need to use these directly.
|
||||
*/
|
||||
#define MMIO_BASE 0x60000000
|
||||
|
||||
#define UART0_BASE (MMIO_BASE + 0)
|
||||
#define SPI1_BASE (MMIO_BASE + 0x0100)
|
||||
#define SPI_BASE (MMIO_BASE + 0x0200)
|
||||
#define GPIO0_BASE (MMIO_BASE + 0x0300)
|
||||
#define TIMER_BASE (MMIO_BASE + 0x0600)
|
||||
#define RTC_BASE (MMIO_BASE + 0x0700)
|
||||
#define IOMUX_BASE (MMIO_BASE + 0x0800)
|
||||
#define WDT_BASE (MMIO_BASE + 0x0900)
|
||||
#define I2C_BASE (MMIO_BASE + 0x0d00)
|
||||
#define UART1_BASE (MMIO_BASE + 0x0F00)
|
||||
#define RTCB_BASE (MMIO_BASE + 0x1000)
|
||||
#define RTCS_BASE (MMIO_BASE + 0x1100)
|
||||
#define RTCU_BASE (MMIO_BASE + 0x1200)
|
||||
|
||||
/*
|
||||
* iomux registers, apply to pin functions.
|
||||
*
|
||||
* Note that IOMUX register order is _not_ the same as GPIO order. See
|
||||
* esp_iomux.h for programmer-friendly IOMUX configuration options
|
||||
*/
|
||||
#define IOMUX_REG(X) *(esp_reg_t)(IOMUX_BASE+4*(X+1))
|
||||
|
||||
#define IOMUX_OE BIT(0) /* iomux Output enable bit */
|
||||
#define IOMUX_OE_SLEEP BIT(1) /* iomux Output during sleep bit */
|
||||
|
||||
#define IOMUX_PD BIT(6) /* iomux soft pulldown bit */
|
||||
#define IOMUX_PD_SLEEP BIT(2) /* iomux soft pulldown during sleep bit */
|
||||
#define IOMUX_PU BIT(7) /* iomux soft pullup bit */
|
||||
#define IOMUX_PU_SLEEP BIT(3) /* iomux soft pullup during sleep bit */
|
||||
|
||||
#define IOMUX_FLAG_WAKE_MASK (IOMUX_OE|IOMUX_PD|IOMUX_PU)
|
||||
#define IOMUX_FLAG_SLEEP_MASK (IOMUX_OE_SLEEP|IOMUX_PD_SLEEP|IOMUX_PU_SLEEP)
|
||||
#define IOMUX_FLAG_MASK (IOMUX_FLAG_WAKE_MASK|IOMUX_FLAG_SLEEP_MASK)
|
||||
|
||||
#define IOMUX_FUNC_MASK (BIT(4)|BIT(5)|BIT(12))
|
||||
|
||||
/* All pins have FUNC_A on reset (unconfirmed) */
|
||||
#define IOMUX_FUNC_A (0)
|
||||
#define IOMUX_FUNC_B BIT(4)
|
||||
#define IOMUX_FUNC_C BIT(5)
|
||||
#define IOMUX_FUNC_D BIT(4)|BIT(5)
|
||||
#define IOMUX_FUNC_E BIT(12)
|
||||
|
||||
|
||||
/*
|
||||
* Based on descriptions by mamalala at https://github.com/esp8266/esp8266-wiki/wiki/gpio-registers
|
||||
*/
|
||||
|
||||
/** GPIO OUTPUT registers GPIO_OUT_REG, GPIO_OUT_SET, GPIO_OUT_CLEAR
|
||||
*
|
||||
* Registers for pin outputs.
|
||||
*
|
||||
* _SET and _CLEAR write-only registers set and clear bits in _REG,
|
||||
* respectively.
|
||||
*
|
||||
* ie
|
||||
* GPIO_OUT_REG |= BIT(3);
|
||||
* and
|
||||
* GPIO_OUT_SET = BIT(3);
|
||||
*
|
||||
* ... are equivalent, but latter uses less CPU cycles.
|
||||
*/
|
||||
#define GPIO_OUT_REG *(esp_reg_t)(GPIO0_BASE)
|
||||
#define GPIO_OUT_SET *(esp_reg_t)(GPIO0_BASE+0x04)
|
||||
#define GPIO_OUT_CLEAR *(esp_reg_t)(GPIO0_BASE+0x08)
|
||||
|
||||
/* GPIO DIR registers GPIO_DIR_REG, GPIO_DIR_SET, GPIO_DIR_CLEAR
|
||||
*
|
||||
* Set bit in DIR register for output pins. Writing to _SET and _CLEAR
|
||||
* registers set and clear bits in _REG, respectively.
|
||||
*/
|
||||
#define GPIO_DIR_REG *(esp_reg_t)(GPIO0_BASE+0x0C)
|
||||
#define GPIO_DIR_SET *(esp_reg_t)(GPIO0_BASE+0x10)
|
||||
#define GPIO_DIR_CLEAR *(esp_reg_t)(GPIO0_BASE+0x14)
|
||||
|
||||
/* GPIO IN register GPIO_IN_REG
|
||||
*
|
||||
* Reads current input values.
|
||||
*/
|
||||
#define GPIO_IN_REG *(esp_reg_t)(GPIO0_BASE+0x18)
|
||||
|
||||
|
||||
/* WDT register(s)
|
||||
|
||||
Not fully understood yet. Writing 0 here disables wdt.
|
||||
|
||||
See ROM functions esp_wdt_xxx
|
||||
*/
|
||||
#define WDT_CTRL *(esp_reg_t)(WDT_BASE)
|
||||
|
||||
#endif
|
||||
19
core/include/esp8266.h
Normal file
19
core/include/esp8266.h
Normal file
|
|
@ -0,0 +1,19 @@
|
|||
/* esp8266.h
|
||||
*
|
||||
* ESP-specific SoC-level addresses, macros, etc.
|
||||
*
|
||||
* Part of esp-open-rtos
|
||||
* Copyright (C) 2015 Superhouse Automation Pty Ltd
|
||||
* BSD Licensed as described in the file LICENSE
|
||||
*/
|
||||
#include <stdint.h>
|
||||
|
||||
#ifndef _ESP8266_H
|
||||
#define _ESP8266_H
|
||||
|
||||
#include "common_macros.h"
|
||||
#include "esp/registers.h"
|
||||
#include "esp/iomux.h"
|
||||
#include "esp/gpio.h"
|
||||
|
||||
#endif
|
||||
Loading…
Add table
Add a link
Reference in a new issue