Fix sign extension as suggested by @foogod
Also removes a branch from l8ui path, saves some cycles
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259c9b643f
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26e1ce325e
1 changed files with 7 additions and 10 deletions
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@ -301,11 +301,7 @@ InnerLoadStoreExceptionHandler:
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srl a3, a3 /* shift right correct distance */
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and a4, a3, a5 /* mask off bits we need for an l8/l16 */
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bbci a5, 14, .Lafter_extend_sign /* 8-bit, no sign extension */
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bbsi a5, 15, .Lafter_extend_sign /* 16-bit unsigned, no sign extension */
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bbci a3, 15, .Lafter_extend_sign /* sign bit not set, no sign extension */
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movi a3, (1<<31)
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or a4, a3, a4 /* set 32-bit sign bit */
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bbsi a5, 14, .Lmaybe_extend_sign
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.Lafter_extend_sign:
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/* a2 holds instruction, a4 holds the correctly read value */
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extui a2, a2, 4, 4 /* a2 now destination register 0-15 */
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@ -347,11 +343,12 @@ InnerLoadStoreExceptionHandler:
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rsr.excsave2 a0 // restore a0 saved in exception vector
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j .Lafter_increment_PC
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.Lextend_sign: /* apply 16-bit sign extension if necessary
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.Lmaybe_extend_sign: /* apply 16-bit sign extension if necessary
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a3 holds raw value, a4 holds masked */
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bbci a3, 15, .Lafter_extend_sign /* sign bit not set, do nothing */
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movi a3, (1<<31)
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or a4, a3, a4 /* set sign bit */
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bbsi a5, 15, .Lafter_extend_sign /* 16-bit unsigned, no sign extension */
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bbci a3, 15, .Lafter_extend_sign /* sign bit not set, no sign extension */
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movi a3, 0xFFFF0000
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or a4, a3, a4 /* set 32-bit sign bits */
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j .Lafter_extend_sign
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.Lwrite_value_direct_reg:
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