First batch of opensdk additions
Replacements for:
libmain/misc.o
libmain/os_cpu_a.o
libmain/spi_flash.o
libmain/timers.o
libmain/uart.o
libmain/xtensa_context.o
This commit is contained in:
Alex Stewart
parent
8bcec7eea1
commit
1da996ee10
16 changed files with 699 additions and 44 deletions
11
opensdk/component.mk
Normal file
11
opensdk/component.mk
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@ -0,0 +1,11 @@
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# Component makefile for "open sdk libs"
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# args for passing into compile rule generation
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opensdk_libmain_ROOT = $(opensdk_libmain_DEFAULT_ROOT)libmain
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opensdk_libmain_INC_DIR =
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opensdk_libmain_SRC_DIR = $(opensdk_libmain_ROOT)
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opensdk_libmain_EXTRA_SRC_FILES =
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opensdk_libmain_CFLAGS = $(CFLAGS)
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$(eval $(call component_compile_rules,opensdk_libmain))
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59
opensdk/libmain/misc.c
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59
opensdk/libmain/misc.c
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#include "espressif/esp_misc.h"
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#include "esp/gpio_regs.h"
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#include "esp/rtc_regs.h"
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#include "sdk_internal.h"
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#include "xtensa/hal.h"
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static int cpu_freq = 80;
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void (*sdk__putc1)(char);
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int IRAM sdk_os_get_cpu_frequency(void) {
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return cpu_freq;
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}
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void sdk_os_update_cpu_frequency(int freq) {
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cpu_freq = freq;
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}
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void sdk_ets_update_cpu_frequency(int freq) __attribute__ (( alias ("sdk_os_update_cpu_frequency") ));
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void sdk_os_delay_us(uint16_t us) {
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uint32_t start_ccount = xthal_get_ccount();
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uint32_t delay_ccount = cpu_freq * us;
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while (xthal_get_ccount() - start_ccount < delay_ccount) {}
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}
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void sdk_ets_delay_us(uint16_t us) __attribute__ (( alias ("sdk_os_delay_us") ));
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void sdk_os_install_putc1(void (*p)(char)) {
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sdk__putc1 = p;
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}
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void sdk_os_putc(char c) {
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sdk__putc1(c);
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}
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void sdk_gpio_output_set(uint32_t set_mask, uint32_t clear_mask, uint32_t enable_mask, uint32_t disable_mask) {
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GPIO.OUT_SET = set_mask;
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GPIO.OUT_CLEAR = clear_mask;
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GPIO.ENABLE_OUT_SET = enable_mask;
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GPIO.ENABLE_OUT_CLEAR = disable_mask;
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}
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uint8_t sdk_rtc_get_reset_reason(void) {
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uint8_t reason;
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reason = FIELD2VAL(RTC_RESET_REASON1_CODE, RTC.RESET_REASON1);
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if (reason == 5) {
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if (FIELD2VAL(RTC_RESET_REASON2_CODE, RTC.RESET_REASON2) == 1) {
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reason = 6;
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} else {
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if (FIELD2VAL(RTC_RESET_REASON2_CODE, RTC.RESET_REASON2) != 8) {
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reason = 0;
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}
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}
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}
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RTC.RESET_REASON0 &= ~RTC_RESET_REASON0_SOMETHING;
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return reason;
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}
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121
opensdk/libmain/os_cpu_a.c
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121
opensdk/libmain/os_cpu_a.c
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#include "esp/types.h"
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#include "FreeRTOS.h"
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#include "task.h"
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#include "xtensa_ops.h"
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#include "common_macros.h"
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// xPortSysTickHandle is defined in FreeRTOS/Source/portable/esp8266/port.c but
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// does not exist in any header files.
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void xPortSysTickHandle(void);
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/* The following "functions" manipulate the stack at a low level and thus cannot be coded directly in C */
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void IRAM vPortYield(void) {
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asm(" wsr a0, excsave1 \n\
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addi sp, sp, -80 \n\
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s32i a0, sp, 4 \n\
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addi a0, sp, 80 \n\
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s32i a0, sp, 16 \n\
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rsr a0, ps \n\
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s32i a0, sp, 8 \n\
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rsr a0, excsave1 \n\
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s32i a0, sp, 12 \n\
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movi a0, _xt_user_exit \n\
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s32i a0, sp, 0 \n\
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call0 sdk__xt_int_enter \n\
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call0 vPortEnterCritical \n\
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call0 vTaskSwitchContext \n\
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call0 vPortExitCritical \n\
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call0 sdk__xt_int_exit \n\
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");
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}
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void IRAM sdk__xt_int_enter(void) {
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asm(" s32i a12, sp, 60 \n\
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s32i a13, sp, 64 \n\
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mov a12, a0 \n\
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call0 sdk__xt_context_save \n\
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movi a0, pxCurrentTCB \n\
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l32i a0, a0, 0 \n\
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s32i sp, a0, 0 \n\
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mov a0, a12 \n\
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");
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}
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void IRAM sdk__xt_int_exit(void) {
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asm(" s32i a14, sp, 68 \n\
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s32i a15, sp, 72 \n\
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movi sp, pxCurrentTCB \n\
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l32i sp, sp, 0 \n\
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l32i sp, sp, 0 \n\
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movi a14, pxCurrentTCB \n\
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l32i a14, a14, 0 \n\
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addi a15, sp, 80 \n\
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s32i a15, a14, 0 \n\
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call0 sdk__xt_context_restore \n\
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l32i a14, sp, 68 \n\
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l32i a15, sp, 72 \n\
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l32i a0, sp, 0 \n\
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");
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}
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void IRAM sdk__xt_timer_int(void) {
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uint32_t trigger_ccount;
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uint32_t current_ccount;
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uint32_t ccount_interval = portTICK_RATE_MS * 80000; //FIXME
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do {
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RSR(trigger_ccount, ccompare0);
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WSR(trigger_ccount + ccount_interval, ccompare0);
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ESYNC();
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xPortSysTickHandle();
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ESYNC();
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RSR(current_ccount, ccount);
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} while (current_ccount - trigger_ccount > ccount_interval);
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}
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void IRAM sdk__xt_timer_int1(void) {
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vTaskSwitchContext();
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}
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#define INTENABLE_CCOMPARE BIT(6)
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void IRAM sdk__xt_tick_timer_init(void) {
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uint32_t ints_enabled;
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uint32_t current_ccount;
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uint32_t ccount_interval = portTICK_RATE_MS * 80000; //FIXME
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RSR(current_ccount, ccount);
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WSR(current_ccount + ccount_interval, ccompare0);
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ints_enabled = 0;
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XSR(ints_enabled, intenable);
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WSR(ints_enabled | INTENABLE_CCOMPARE, intenable);
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}
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void IRAM sdk__xt_isr_unmask(uint32_t mask) {
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uint32_t ints_enabled;
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ints_enabled = 0;
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XSR(ints_enabled, intenable);
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WSR(ints_enabled | mask, intenable);
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}
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void IRAM sdk__xt_isr_mask(uint32_t mask) {
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uint32_t ints_enabled;
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ints_enabled = 0;
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XSR(ints_enabled, intenable);
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WSR(ints_enabled & mask, intenable);
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}
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uint32_t IRAM sdk__xt_read_ints(void) {
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uint32_t ints_enabled;
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RSR(ints_enabled, intenable);
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return ints_enabled;
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}
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void IRAM sdk__xt_clear_ints(uint32_t mask) {
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WSR(mask, intclear);
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}
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183
opensdk/libmain/spi_flash.c
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183
opensdk/libmain/spi_flash.c
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#include "FreeRTOS.h"
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#include "common_macros.h"
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#include "esp/spi_regs.h"
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#include "esp/rom.h"
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#include "sdk_internal.h"
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#include "espressif/spi_flash.h"
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sdk_flashchip_t sdk_flashchip = {
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0x001640ef, // device_id
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4 * 1024 * 1024, // chip_size
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65536, // block_size
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4096, // sector_size
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256, // page_size
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0x0000ffff, // status_mask
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};
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// NOTE: This routine appears to be completely unused in the SDK
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int IRAM sdk_SPIReadModeCnfig(uint32_t mode) {
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uint32_t ctrl_bits;
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SPI(0).CTRL0 &= ~(SPI_CTRL0_FASTRD_MODE | SPI_CTRL0_DOUT_MODE | SPI_CTRL0_QOUT_MODE | SPI_CTRL0_DIO_MODE | SPI_CTRL0_QIO_MODE);
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if (mode == 0) {
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ctrl_bits = SPI_CTRL0_FASTRD_MODE | SPI_CTRL0_QIO_MODE;
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} else if (mode == 1) {
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ctrl_bits = SPI_CTRL0_FASTRD_MODE | SPI_CTRL0_QOUT_MODE;
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} else if (mode == 2) {
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ctrl_bits = SPI_CTRL0_FASTRD_MODE | SPI_CTRL0_DIO_MODE;
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} else if (mode == 3) {
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ctrl_bits = SPI_CTRL0_FASTRD_MODE | SPI_CTRL0_DOUT_MODE;
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} else if (mode == 4) {
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ctrl_bits = SPI_CTRL0_FASTRD_MODE;
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} else {
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ctrl_bits = 0;
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}
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if (mode == 0 || mode == 1) {
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Enable_QMode(&sdk_flashchip);
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} else {
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Disable_QMode(&sdk_flashchip);
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}
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SPI(0).CTRL0 |= ctrl_bits;
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return 0;
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}
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sdk_SpiFlashOpResult IRAM sdk_SPIWrite(uint32_t des_addr, uint32_t *src_addr, uint32_t size) {
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uint32_t first_page_portion;
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uint32_t pos;
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uint32_t full_pages;
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uint32_t bytes_remaining;
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if (des_addr + size <= sdk_flashchip.chip_size) {
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first_page_portion = sdk_flashchip.page_size - (des_addr % sdk_flashchip.page_size);
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if (size < first_page_portion) {
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if (SPI_page_program(&sdk_flashchip, des_addr, src_addr, size)) {
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return SPI_FLASH_RESULT_ERR;
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} else {
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return SPI_FLASH_RESULT_OK;
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}
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}
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} else {
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return SPI_FLASH_RESULT_ERR;
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}
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if (SPI_page_program(&sdk_flashchip, des_addr, src_addr, first_page_portion)) {
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return SPI_FLASH_RESULT_ERR;
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}
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pos = first_page_portion;
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bytes_remaining = size - first_page_portion;
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full_pages = bytes_remaining / sdk_flashchip.page_size;
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if (full_pages) {
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for (int i = 0; i != full_pages; i++) {
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if (SPI_page_program(&sdk_flashchip, des_addr + pos, src_addr + (pos / 4), sdk_flashchip.page_size)) {
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return SPI_FLASH_RESULT_ERR;
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}
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pos += sdk_flashchip.page_size;
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}
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bytes_remaining = size - pos;
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}
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if (SPI_page_program(&sdk_flashchip, des_addr + pos, src_addr + (pos / 4), bytes_remaining)) {
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return SPI_FLASH_RESULT_ERR;
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}
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return SPI_FLASH_RESULT_OK;
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}
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sdk_SpiFlashOpResult IRAM sdk_SPIRead(uint32_t src_addr, uint32_t *des_addr, uint32_t size) {
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if (SPI_read_data(&sdk_flashchip, src_addr, des_addr, size)) {
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return SPI_FLASH_RESULT_ERR;
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} else {
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return SPI_FLASH_RESULT_OK;
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}
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}
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sdk_SpiFlashOpResult IRAM sdk_SPIEraseSector(uint16_t sec) {
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if (sec >= sdk_flashchip.chip_size / sdk_flashchip.sector_size) {
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return SPI_FLASH_RESULT_ERR;
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}
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if (SPI_write_enable(&sdk_flashchip)) {
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return SPI_FLASH_RESULT_ERR;
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}
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if (SPI_sector_erase(&sdk_flashchip, sdk_flashchip.sector_size * sec)) {
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return SPI_FLASH_RESULT_ERR;
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}
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return SPI_FLASH_RESULT_OK;
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}
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uint32_t IRAM sdk_spi_flash_get_id(void) {
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uint32_t result;
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portENTER_CRITICAL();
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Cache_Read_Disable();
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Wait_SPI_Idle(&sdk_flashchip);
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SPI(0).W[0] = 0;
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SPI(0).CMD = SPI_CMD_READ_ID;
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while (SPI(0).CMD != 0) {}
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result = SPI(0).W[0] & 0x00ffffff;
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Cache_Read_Enable(0, 0, 1);
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portEXIT_CRITICAL();
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return result;
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}
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sdk_SpiFlashOpResult IRAM sdk_spi_flash_read_status(uint32_t *status) {
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sdk_SpiFlashOpResult result;
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portENTER_CRITICAL();
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Cache_Read_Disable();
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result = SPI_read_status(&sdk_flashchip, status);
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Cache_Read_Enable(0, 0, 1);
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portEXIT_CRITICAL();
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return result;
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}
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sdk_SpiFlashOpResult IRAM sdk_spi_flash_write_status(uint32_t status) {
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sdk_SpiFlashOpResult result;
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portENTER_CRITICAL();
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Cache_Read_Disable();
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result = SPI_write_status(&sdk_flashchip, status);
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Cache_Read_Enable(0, 0, 1);
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portEXIT_CRITICAL();
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return result;
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}
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sdk_SpiFlashOpResult IRAM sdk_spi_flash_erase_sector(uint16_t sec) {
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sdk_SpiFlashOpResult result;
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portENTER_CRITICAL();
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Cache_Read_Disable();
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result = sdk_SPIEraseSector(sec);
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Cache_Read_Enable(0, 0, 1);
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portEXIT_CRITICAL();
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return result;
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}
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sdk_SpiFlashOpResult IRAM sdk_spi_flash_write(uint32_t des_addr, uint32_t *src_addr, uint32_t size) {
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sdk_SpiFlashOpResult result;
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if (!src_addr) {
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return SPI_FLASH_RESULT_ERR;
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}
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if (size & 3) {
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size = (size & ~3) + 4;
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}
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portENTER_CRITICAL();
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Cache_Read_Disable();
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result = sdk_SPIWrite(des_addr, src_addr, size);
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Cache_Read_Enable(0, 0, 1);
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portEXIT_CRITICAL();
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return result;
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}
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sdk_SpiFlashOpResult IRAM sdk_spi_flash_read(uint32_t src_addr, uint32_t *des_addr, uint32_t size) {
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sdk_SpiFlashOpResult result;
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if (!des_addr) {
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return SPI_FLASH_RESULT_ERR;
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}
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portENTER_CRITICAL();
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Cache_Read_Disable();
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result = sdk_SPIRead(src_addr, des_addr, size);
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Cache_Read_Enable(0, 0, 1);
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portEXIT_CRITICAL();
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return result;
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}
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89
opensdk/libmain/timers.c
Normal file
89
opensdk/libmain/timers.c
Normal file
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#include "etstimer.h"
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struct timer_list_st {
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struct timer_list_st *next;
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ETSTimer *timer;
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};
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static struct timer_list_st *timer_list;
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static uint8_t armed_timer_count;
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void sdk_os_timer_setfn(ETSTimer *ptimer, ETSTimerFunc *pfunction, void *parg) {
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struct timer_list_st *entry = 0;
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struct timer_list_st *new_entry;
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struct timer_list_st **tailptr;
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if (timer_list) {
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for (entry = timer_list; ; entry = entry->next) {
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if (entry->timer == ptimer) {
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if (ptimer->timer_arg == parg && ptimer->timer_func == pfunction) {
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return;
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}
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if (ptimer->timer_handle) {
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if (!xTimerDelete(ptimer->timer_handle, 50)) {
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printf("Timer Delete Failed\n");
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}
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armed_timer_count--;
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}
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ptimer->timer_func = pfunction;
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ptimer->timer_arg = parg;
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ptimer->timer_handle = 0;
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ptimer->timer_ms = 0;
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return;
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}
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if (!entry->next) {
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break;
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}
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}
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}
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ptimer->timer_func = pfunction;
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ptimer->timer_arg = parg;
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ptimer->timer_handle = 0;
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ptimer->timer_ms = 0;
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new_entry = (struct timer_list_st *)pvPortMalloc(8);
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new_entry->timer = ptimer;
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new_entry->next = 0;
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tailptr = &entry->next;
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if (!timer_list) {
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tailptr = &timer_list;
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}
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*tailptr = new_entry;
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}
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void sdk_os_timer_arm(ETSTimer *ptimer, uint32_t milliseconds, bool repeat_flag) {
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if (!ptimer->timer_handle) {
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ptimer->timer_repeat = repeat_flag;
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ptimer->timer_ms = milliseconds;
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ptimer->timer_handle = xTimerCreate(0, milliseconds/10, repeat_flag, ptimer->timer_arg, ptimer->timer_func);
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armed_timer_count++;
|
||||
if (!ptimer->timer_handle) {
|
||||
//FIXME: should print an error? (original code doesn't)
|
||||
return;
|
||||
}
|
||||
}
|
||||
if (ptimer->timer_repeat != repeat_flag) {
|
||||
ptimer->timer_repeat = repeat_flag;
|
||||
// FIXME: This is wrong. The original code is directly modifying
|
||||
// internal FreeRTOS structures to try to change the uxAutoReload of an
|
||||
// existing timer. The correct way to do this is probably to use
|
||||
// xTimerDelete and then xTimerCreate to recreate the timer with a
|
||||
// different uxAutoReload setting.
|
||||
((uint32_t *)ptimer->timer_handle)[7] = repeat_flag;
|
||||
}
|
||||
if (ptimer->timer_ms != milliseconds) {
|
||||
ptimer->timer_ms = milliseconds;
|
||||
xTimerChangePeriod(ptimer->timer_handle, milliseconds/10, 10);
|
||||
}
|
||||
if (!xTimerStart(ptimer->timer_handle, 50)) {
|
||||
printf("Timer Start Failed\n");
|
||||
}
|
||||
}
|
||||
|
||||
void sdk_os_timer_disarm(ETSTimer *ptimer) {
|
||||
if (ptimer->timer_handle) {
|
||||
if (!xTimerStop(ptimer->timer_handle, 50)) {
|
||||
printf("Timer Stop Failed\n");
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
17
opensdk/libmain/uart.c
Normal file
17
opensdk/libmain/uart.c
Normal file
|
|
@ -0,0 +1,17 @@
|
|||
#include "espressif/sdk_private.h"
|
||||
#include "esp/uart_regs.h"
|
||||
|
||||
void sdk_uart_buff_switch(void) {
|
||||
/* No-Op */
|
||||
}
|
||||
|
||||
void sdk_uart_div_modify(uint32_t uart_no, uint32_t new_divisor) {
|
||||
UART(uart_no).CLOCK_DIVIDER = new_divisor;
|
||||
UART(uart_no).CONF0 |= (UART_CONF0_TXFIFO_RESET | UART_CONF0_RXFIFO_RESET);
|
||||
UART(uart_no).CONF0 &= ~(UART_CONF0_TXFIFO_RESET | UART_CONF0_RXFIFO_RESET);
|
||||
}
|
||||
|
||||
void sdk_Uart_Init(void) {
|
||||
/* No-Op */
|
||||
}
|
||||
|
||||
41
opensdk/libmain/xtensa_context.S
Normal file
41
opensdk/libmain/xtensa_context.S
Normal file
|
|
@ -0,0 +1,41 @@
|
|||
.section .iram1.text, "ax", @progbits
|
||||
|
||||
.balign 4
|
||||
.global sdk__xt_context_save
|
||||
.type sdk__xt_context_save, @function
|
||||
sdk__xt_context_save:
|
||||
|
||||
s32i a2, sp, 20
|
||||
s32i a3, sp, 24
|
||||
s32i a4, sp, 28
|
||||
s32i a5, sp, 32
|
||||
s32i a6, sp, 36
|
||||
s32i a7, sp, 40
|
||||
s32i a8, sp, 44
|
||||
s32i a9, sp, 48
|
||||
s32i a10, sp, 52
|
||||
s32i a11, sp, 56
|
||||
rsr a3, sar
|
||||
s32i a3, sp, 76
|
||||
ret
|
||||
|
||||
.balign 4
|
||||
.global sdk__xt_context_restore
|
||||
.type sdk__xt_context_restore, @function
|
||||
sdk__xt_context_restore:
|
||||
l32i a3, sp, 76
|
||||
l32i a2, sp, 20
|
||||
wsr a3, sar
|
||||
l32i a3, sp, 24
|
||||
l32i a4, sp, 28
|
||||
l32i a5, sp, 32
|
||||
l32i a6, sp, 36
|
||||
l32i a7, sp, 40
|
||||
l32i a8, sp, 44
|
||||
l32i a9, sp, 48
|
||||
l32i a10, sp, 52
|
||||
l32i a11, sp, 56
|
||||
l32i a12, sp, 60
|
||||
l32i a13, sp, 64
|
||||
ret
|
||||
|
||||
Loading…
Add table
Add a link
Reference in a new issue