Timer FRC1 & FRC2 registers

Mostly determined from reverse engineering and poking around.

Includes first "experiments" program with random bits and pieces for
poking at registers, may be useful to keep in source control but not
useful for writing actual programs.
This commit is contained in:
Angus Gratton 2015-06-12 17:04:17 +10:00
parent 8f3111c5e1
commit 1b0124cf05
6 changed files with 456 additions and 2 deletions

View file

@ -16,10 +16,16 @@ typedef enum {
INUM_SPI = 2,
INUM_GPIO = 4,
INUM_UART = 5,
INUM_MAX = 6,
INUM_MAX = 6, /* in some places this is documented as timer0 CCOMPARE0 interrupt */
INUM_SOFT = 7,
INUM_WDT = 8,
INUM_FRC_TIMER1 = 9,
INUM_TIMER_FRC1 = 9,
/* FRC2 default handler. Configured by sdk_ets_timer_init, which
runs as part of default libmain.a startup code, assigns
interrupt handler to sdk_vApplicationTickHook+0x68
*/
INUM_TIMER_FRC2 = 10,
} xt_isr_num_t;
#endif