Timer FRC1 & FRC2 registers

Mostly determined from reverse engineering and poking around.

Includes first "experiments" program with random bits and pieces for
poking at registers, may be useful to keep in source control but not
useful for writing actual programs.
This commit is contained in:
Angus Gratton 2015-06-12 17:04:17 +10:00
parent 8f3111c5e1
commit 1b0124cf05
6 changed files with 456 additions and 2 deletions

26
core/include/esp/clocks.h Normal file
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/* esp/clocks.h
*
* ESP8266 internal clock values
*
* At the moment there's not a lot known about varying clock speeds
* apart from doubling the CPU clock. It may be possible to set clock
* domains differently somehow.
*
* Part of esp-open-rtos
* Copyright (C) 2015 Superhouse Automation Pty Ltd
* BSD Licensed as described in the file LICENSE
*/
#ifndef _ESP_CLOCKS_H
#define _ESP_CLOCKS_H
/* CPU clock, can be overclocked to 160MHz via a dport register setting */
#define CPU_CLK_FREQ 80*1000000
/* Main peripheral clock
This is also the master frequency for the UART and the TIMER module
(before divisors applied to either.)
*/
#define APB_CLK_FREQ CPU_CLK_FREQ
#endif