Flush the uart tx fifo before a restart. (#274)
Also comment the point at which the bus clock that drives the uart changes on startup and comment out the change in the uart divisor. This at least allows a consistent uart baud rate during a restart if using the rate 115200.
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2 changed files with 27 additions and 6 deletions
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@ -254,12 +254,25 @@ static void zero_bss(void) {
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// .Lfunc006 -- .irom0.text+0x70
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static void init_networking(sdk_phy_info_t *phy_info, uint8_t *mac_addr) {
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// The call to sdk_register_chipv6_phy appears to change the bus clock,
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// perhaps from 40MHz to 26MHz, at least it has such an effect on the uart
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// baud rate. The caller flushes the TX fifos.
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if (sdk_register_chipv6_phy(phy_info)) {
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printf("FATAL: sdk_register_chipv6_phy failed");
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abort();
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}
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uart_set_baud(0, 74906);
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uart_set_baud(1, 74906);
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// The boot rom initializes uart0 for a 115200 baud rate but the bus clock
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// does not appear to be as expected so the initial baud rate is actually
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// 74906. On a cold boot, to keep the 74906 baud rate the uart0 divisor
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// would need to changed here to 74906. On a warm boot the bus clock is
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// expected to have already been set so the boot baud rate is 115200.
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// Reset the rate here and settle on a 115200 baud rate.
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if (sdk_rst_if.reason > 0) {
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uart_set_baud(0, 115200);
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uart_set_baud(1, 115200);
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}
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sdk_phy_disable_agc();
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sdk_ieee80211_phy_init(sdk_g_ic.s.phy_mode);
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sdk_lmacInit();
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