From 0d6af96f2dd115f694fbbd77d9a5943434db2ce5 Mon Sep 17 00:00:00 2001
From: Alex Stewart <Alexander.Stewart@consensuscorp.com>
Date: Wed, 19 Aug 2015 16:50:56 -0700
Subject: [PATCH] Cleanup a few comments in *_regs.h files

---
 core/include/esp/gpio_regs.h  | 11 ++++-------
 core/include/esp/iomux_regs.h | 13 ++-----------
 2 files changed, 6 insertions(+), 18 deletions(-)

diff --git a/core/include/esp/gpio_regs.h b/core/include/esp/gpio_regs.h
index e775cec..d2b0770 100644
--- a/core/include/esp/gpio_regs.h
+++ b/core/include/esp/gpio_regs.h
@@ -59,12 +59,9 @@ struct GPIO_REGS {
     uint32_t volatile RTC_CALIB_RESULT; // 0x70
 } __attribute__ (( packed ));
 
-/* Double-check the structure size to make sure the compiler hasn't done
- * something strange (or somebody typoed in the struct definition, etc)
- */
 _Static_assert(sizeof(struct GPIO_REGS) == 0x74, "GPIO_REGS is the wrong size");
 
-/* Bit mapping for CONF[i] registers */
+/* Details for CONF[i] registers */
 
 /* GPIO.CONF[i] control the pin behavior for the corresponding GPIO in/output.
  *
@@ -109,7 +106,7 @@ typedef enum {
     GPIO_INTTYPE_LEVEL_HIGH = 5,
 } gpio_inttype_t;
 
-/* Bit mapping for PWM register */
+/* Details for PWM register */
 
 #define GPIO_PWM_ENABLE          BIT(16)
 #define GPIO_PWM_PRESCALER_M     0x000000ff
@@ -117,13 +114,13 @@ typedef enum {
 #define GPIO_PWM_TARGET_M        0x000000ff
 #define GPIO_PWM_TARGET_S        0
 
-/* Bit mapping for RTC_CALIB register */
+/* Details for RTC_CALIB register */
 
 #define GPIO_RTC_CALIB_START     BIT(31)
 #define GPIO_RTC_CALIB_PERIOD_M  0x000003ff
 #define GPIO_RTC_CALIB_PERIOD_S  0
 
-/* Bit mapping for RTC_CALIB_RESULT register */
+/* Details for RTC_CALIB_RESULT register */
 
 #define GPIO_RTC_CALIB_RESULT_READY       BIT(31)
 #define GPIO_RTC_CALIB_RESULT_READY_REAL  BIT(30)
diff --git a/core/include/esp/iomux_regs.h b/core/include/esp/iomux_regs.h
index 0e67a9c..d3b9653 100644
--- a/core/include/esp/iomux_regs.h
+++ b/core/include/esp/iomux_regs.h
@@ -22,17 +22,14 @@ struct IOMUX_REGS {
     uint32_t volatile PIN[16]; // 0x04 - 0x40
 } __attribute__ (( packed ));
 
-/* Double-check the structure size to make sure the compiler hasn't done
- * something strange (or somebody typoed in the struct definition, etc)
- */
 _Static_assert(sizeof(struct IOMUX_REGS) == 0x44, "IOMUX_REGS is the wrong size");
 
-/* Bit mapping for CONF register */
+/* Details for CONF register */
 
 #define IOMUX_CONF_SPI0_CLOCK_EQU_SYS_CLOCK  BIT(8)
 #define IOMUX_CONF_SPI1_CLOCK_EQU_SYS_CLOCK  BIT(9)
 
-/* Bit mapping for PIN registers */
+/* Details for PIN registers */
 
 #define IOMUX_PIN_OUTPUT_ENABLE        BIT(0)
 #define IOMUX_PIN_OUTPUT_ENABLE_SLEEP  BIT(1)
@@ -55,12 +52,6 @@ _Static_assert(sizeof(struct IOMUX_REGS) == 0x44, "IOMUX_REGS is the wrong size"
 
 #define IOMUX_SET_FUNC(regbits, funcval) (((regbits) & ~IOMUX_PIN_FUNC_MASK) | (funcval))
 
-#define IOMUX_FUNC_A  IOMUX_FUNC(0)
-#define IOMUX_FUNC_B  IOMUX_FUNC(1)
-#define IOMUX_FUNC_C  IOMUX_FUNC(2)
-#define IOMUX_FUNC_D  IOMUX_FUNC(3)
-#define IOMUX_FUNC_E  IOMUX_FUNC(4)
-
 #define IOMUX_GPIO0   IOMUX.PIN[12]
 #define IOMUX_GPIO1   IOMUX.PIN[5]
 #define IOMUX_GPIO2   IOMUX.PIN[13]