120 lines
4 KiB
C
120 lines
4 KiB
C
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/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2015 Johan Kanflo (github.com/kanflo)
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <esp8266.h>
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#include <espressif/esp8266/esp8266.h>
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#include <espressif/esp8266/uart_register.h>
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#include <FreeRTOS.h>
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#include <semphr.h>
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#if (configUSE_COUNTING_SEMAPHORES == 0)
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#error "You need to define configUSE_COUNTING_SEMAPHORES in a local FreeRTOSConfig.h, see examples/terminal/FreeRTOSConfig.h"
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#endif
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// IRQ driven UART RX driver for ESP8266 written for use with esp-open-rtos
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// TODO: Handle UART1
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#define UART0_RX_SIZE (81)
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#ifndef UART0
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#define UART0 (0)
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#endif
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static xSemaphoreHandle uart0_sem = NULL;
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static char rx_buf[UART0_RX_SIZE];
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static uint8_t rd_pos = 0;
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static uint8_t wr_pos = 0;
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static bool inited = false;
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static void uart0_rx_init(void);
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IRAM void uart0_rx_handler(void)
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{
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// TODO: Handle UART1, see reg 0x3ff20020, bit2, bit0 represents uart1 and uart0 respectively
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if (UART_RXFIFO_FULL_INT_ST != (READ_PERI_REG(UART_INT_ST(UART0)) & UART_RXFIFO_FULL_INT_ST)) {
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return;
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}
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WRITE_PERI_REG(UART_INT_CLR(UART0), UART_RXFIFO_FULL_INT_CLR);
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while (READ_PERI_REG(UART_STATUS(UART0)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) {
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char ch = READ_PERI_REG(UART_FIFO(UART0)) & 0xff;
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uint8_t wr_next = (wr_pos+1) % UART0_RX_SIZE;
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if (wr_next != rd_pos) {
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rx_buf[wr_pos] = ch;
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wr_pos = (wr_pos+1) % UART0_RX_SIZE;
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xSemaphoreGiveFromISR(uart0_sem, NULL);
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}
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}
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}
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uint32_t uart0_num_char(void)
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{
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uint32_t count;
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if (!inited) uart0_rx_init();
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_xt_isr_mask(1 << INUM_UART);
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if (rd_pos > wr_pos) count = rd_pos - wr_pos;
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else count = wr_pos - rd_pos;
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_xt_isr_unmask(1 << INUM_UART);
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return count;
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}
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// _read_r in core/newlib_syscalls.c will be skipped in favour of this function
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long _read_r(struct _reent *r, int fd, char *ptr, int len)
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{
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if (!inited) uart0_rx_init();
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for(int i = 0; i < len; i++) {
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char ch;
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if (xSemaphoreTake(uart0_sem, portMAX_DELAY)) {
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_xt_isr_mask(1 << INUM_UART);
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ch = rx_buf[rd_pos];
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rd_pos = (rd_pos+1) % UART0_RX_SIZE;
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_xt_isr_unmask(1 << INUM_UART);
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ptr[i] = ch;
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}
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}
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return len;
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}
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static void uart0_rx_init(void)
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{
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int trig_lvl = 1;
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uart0_sem = xSemaphoreCreateCounting(UART0_RX_SIZE, 0);
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_xt_isr_attach(INUM_UART, uart0_rx_handler);
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_xt_isr_unmask(1 << INUM_UART);
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//clear rx and tx fifo,not ready
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SET_PERI_REG_MASK(UART_CONF0(UART0), UART_RXFIFO_RST | UART_TXFIFO_RST);
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CLEAR_PERI_REG_MASK(UART_CONF0(UART0), UART_RXFIFO_RST | UART_TXFIFO_RST);
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//set rx fifo trigger
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WRITE_PERI_REG(UART_CONF1(UART0), (trig_lvl & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S);
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//clear all interrupt
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WRITE_PERI_REG(UART_INT_CLR(UART0), 0xffff);
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//enable rx_interrupt
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SET_PERI_REG_MASK(UART_INT_ENA(UART0), UART_RXFIFO_FULL_INT_ENA);
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inited = true;
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}
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