75 lines
1.8 KiB
C
75 lines
1.8 KiB
C
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/* esp/phy_regs.h
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*
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* ESP8266 PHY register definitions
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*
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* Not compatible with ESP SDK register access code.
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*/
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#ifndef _ESP_PHY_REGS_H
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#define _ESP_PHY_REGS_H
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#include "esp/types.h"
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#include "common_macros.h"
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#define PHY_BASE 0x60000500
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#define PHY (*(struct PHY_REGS *)(PHY_BASE))
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struct PHY_REGS {
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// 0x00 — 0x60
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uint32_t volatile _gap0[24];
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// TX digital predistortion control
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// 0x60
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uint32_t volatile TX_DPD;
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// 0x64 — 0x7c
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uint32_t volatile _gap1[6];
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// IQ imbalance estimation control
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// 0x7c
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uint32_t volatile IQ_EST;
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// Looks like RSSI,
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// may be per OFDM subcarrier
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// 0x80
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uint32_t volatile RX_IQ_0;
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// 0x84
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uint32_t volatile RX_IQ_1;
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// 0x88
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uint32_t volatile RX_IQ_2;
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// 0x8c
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uint32_t volatile RX_IQ_3;
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// RX gain control
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// 0x90
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uint32_t volatile RX_GAIN_CTL;
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// Whatever pbus is, these registers controls it
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// 0x94
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uint32_t volatile PBUS_CTL_0;
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// 0x98
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uint32_t volatile PBUS_CTL_1;
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// 0x9C
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uint32_t volatile PBUS_CTL_2;
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// 0xA0
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uint32_t volatile PBUS_CTL_3;
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uint32_t volatile _gap2[5];
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// Looks like baseband synthesizer control regs
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// 0xB8
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uint32_t volatile BB_CTL_0;
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// 0xBC
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uint32_t volatile BB_CTL_1;
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// 0xC0
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uint32_t volatile BB_CTL_2;
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// 0xC4
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uint32_t volatile BB_CTL_3;
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// These registers do exist but I don't know
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// what they are for.
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// 0xC8
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uint32_t volatile UNK_0;
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uint32_t volatile UNK_1;
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uint32_t volatile UNK_2;
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uint32_t volatile UNK_3;
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uint32_t volatile UNK_4;
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};
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_Static_assert((uintptr_t) &PHY.TX_DPD == 0x60000560, "RF PHY TX_DPD address");
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_Static_assert((uintptr_t) &PHY.IQ_EST == 0x6000057C, "RF PHY IQ_EST address");
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_Static_assert((uintptr_t) &PHY.BB_CTL_3 == 0x600005C4, "RF PHY BB_CTL_3 address");
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#endif /* _ESP_PHY_REGS_H */
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