2015-08-25 16:34:37 +00:00
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/** xtensa_ops.h
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*
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* Special macros/etc which deal with Xtensa-specific architecture/CPU
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* considerations.
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*
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* Part of esp-open-rtos
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* Copyright (C) 2015 Superhouse Automation Pty Ltd
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* BSD Licensed as described in the file LICENSE
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*/
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#ifndef _XTENSA_OPS_H
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#define _XTENSA_OPS_H
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2016-05-07 08:21:13 +00:00
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/* Read stack pointer to variable.
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*
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* Note that the compiler will push a stack frame (minimum 16 bytes)
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* in the prelude of a C function that calls any other functions.
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*/
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2016-05-15 00:36:33 +00:00
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#define SP(var) asm volatile ("mov %0, a1" : "=r" (var))
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2016-05-07 08:21:13 +00:00
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/* Read the function return address to a variable.
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*
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* Depends on the containing function being simple enough that a0 is
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* being used as a working register.
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*/
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#define RETADDR(var) asm volatile ("mov %0, a0" : "=r" (var))
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2016-06-29 23:09:27 +00:00
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/* GCC macros for reading, writing, and exchanging Xtensa processor special
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* registers:
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*/
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2015-08-25 16:34:37 +00:00
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#define RSR(var, reg) asm volatile ("rsr %0, " #reg : "=r" (var));
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#define WSR(var, reg) asm volatile ("wsr %0, " #reg : : "r" (var));
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#define XSR(var, reg) asm volatile ("xsr %0, " #reg : "+r" (var));
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2016-06-29 23:09:27 +00:00
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// GCC macros for performing associated "*sync" opcodes
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#define ISYNC() asm volatile ( "isync" )
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#define RSYNC() asm volatile ( "rsync" )
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#define ESYNC() asm volatile ( "esync" )
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#define DSYNC() asm volatile ( "dsync" )
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2015-08-25 16:34:37 +00:00
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#endif /* _XTENSA_OPS_H */
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