first commit

This commit is contained in:
jeffrey 2015-11-17 10:30:14 +08:00
parent 48de61fed7
commit 28cd8da44d
1181 changed files with 784669 additions and 0 deletions

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<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\aes.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\aesni.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\arc4.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\asn1parse.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\asn1write.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\base64.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\bignum.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\blowfish.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\camellia.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\ccm.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\certs.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\cipher.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\cipher_wrap.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\ctr_drbg.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\debug.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\des.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\dhm.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\ecdh.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\ecdsa.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\ecp.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\ecp_curves.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\entropy.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\entropy_poll.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\error.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\gcm.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\havege.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\hmac_drbg.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\md.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\md2.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\md4.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\md5.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\md_wrap.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\memory_buffer_alloc.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\net.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\oid.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\padlock.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\pbkdf2.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\pem.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\pk.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\pk_wrap.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\pkcs11.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\pkcs12.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\pkcs5.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\pkparse.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\pkwrite.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\platform.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\ripemd160.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\rsa.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\sha1.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\sha256.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\sha512.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\ssl_cache.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\ssl_ciphersuites.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\ssl_cli.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\ssl_srv.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\ssl_tls.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\threading.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\timing.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\version.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\version_features.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\x509.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\x509_create.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\x509_crl.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\x509_crt.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\x509_csr.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\x509write_crt.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\x509write_csr.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\network\ssl\polarssl-1.3.8\library\xtea.c</name>
</file>
</group>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\api\platform\stdlib_patch.c</name>
</file>
<configuration>
<name>Debug</name>
</configuration>
</group>
<group>
<name>user</name>
<file>
<name>$PROJ_DIR$\..\src\main.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\src\ws2812b.c</name>
</file>
</group>
<group>
<name>utilities</name>
<group>
<name>example</name>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\example\example_entry.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\example\googlenest\example_google.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\example\mcast\example_mcast.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\example\mdns\example_mdns.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\example\wlan_fast_connect\example_wlan_fast_connect.c</name>
</file>
</group>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\utilities\cJSON.c</name>
</file>
<file>
<name>$PROJ_DIR$\..\..\..\component\common\utilities\webserver.c</name>
</file>
</group>
</project>

View file

@ -0,0 +1,10 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\Project.ewp</path>
</project>
<batchBuild/>
</workspace>

View file

@ -0,0 +1,190 @@
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
//define symbol __ICFEDIT_intvec_start__ = 0x00000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
define symbol __ICFEDIT_region_ROM_end__ = 0x000FFFFF;
define symbol __ICFEDIT_region_TCM_start__ = 0x1FFF0000;
define symbol __ICFEDIT_region_TCM_end__ = 0x1FFFFFFF;
define symbol __ICFEDIT_region_ROM_USED_RAM_start__ = 0x10000000;
define symbol __ICFEDIT_region_ROM_USED_RAM_end__ = 0x10003FFF;
//define symbol __ICFEDIT_region_RECY_RAM_start__ = 0x10002090;
//define symbol __ICFEDIT_region_RECY_RAM_end__ = 0x100037FF;
define symbol __ICFEDIT_region_BD_RAM_start__ = 0x10004000;
define symbol __ICFEDIT_region_BD_RAM_end__ = 0x1006FFFF;
define symbol __ICFEDIT_region_SDRAM_RAM_start__ = 0x30000000;
define symbol __ICFEDIT_region_SDRAM_RAM_end__ = 0x301FFFFF;
/*-Sizes-*/
/*define symbol __ICFEDIT_size_cstack__ = 0x400;*/
/*define symbol __ICFEDIT_size_heap__ = 0x800;*/
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region TCM_region = mem:[from __ICFEDIT_region_TCM_start__ to __ICFEDIT_region_TCM_end__];
define region ROM_USED_RAM_region = mem:[from __ICFEDIT_region_ROM_USED_RAM_start__ to __ICFEDIT_region_ROM_USED_RAM_end__];
//define region RECY_RAM_region = mem:[from __ICFEDIT_region_RECY_RAM_start__ to __ICFEDIT_region_RECY_RAM_end__];
define region BD_RAM_region = mem:[from __ICFEDIT_region_BD_RAM_start__ to __ICFEDIT_region_BD_RAM_end__];
define region SDRAM_RAM_region = mem:[from __ICFEDIT_region_SDRAM_RAM_start__ to __ICFEDIT_region_SDRAM_RAM_end__];
/*define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };*/
/*define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };*/
//initialize by copy { readwrite };
//initialize by copy with packing = none { section __DLIB_PERTHREAD }; // Required in a multi-threaded application
//do not initialize { section * };
//place at address mem:__ICFEDIT_intvec_start__ { readonly section .vectors_table };
/*place in RAM_region { readwrite, block CSTACK, block HEAP };*/
place in TCM_region { readwrite };
/****************************************
* ROM Section config *
****************************************/
keep { section .rom };
place at start of ROM_region { readonly, section .rom };
/****************************************
* BD RAM Section config *
****************************************/
keep { section .ram_dedecated_vector_table* };
define block .vector_table with fixed order{section .ram_dedecated_vector_table*};
keep { section .ram_user_define_irq_table* };
define block .user_vector_table with fixed order{section .ram_user_define_irq_table*};
keep { section .ram_user_define_data_table* };
define block .user_data_table with fixed order{section .ram_user_define_data_table*};
define block .rom.bss with fixed order{ section .hal.ram.bss* object hal_misc.o,
section .hal.ram.bss* object hal_pinmux.o,
section .hal.ram.bss* object diag.o,
section .hal.ram.bss* object rtl8195a_ssi_rom.o,
section .hal.ram.bss* object rtl8195a_gpio.o,
section .hal.ram.bss*,
section .timer2_7_vector_table.data*,
section .infra.ram.bss*,
section .mon.ram.bss*,
section .wlan_ram_map* object rom_wlan_ram_map.o,
section .wlan_ram_map*,
section .libc.ram.bss*,
};
keep { section .start.ram.data* };
define block .ram.start.table with fixed order{ section .start.ram.data* };
keep { section .image1.validate.rodata* };
keep { section .infra.ram.data* };
keep { section .timer.ram.data* };
keep { section .hal.ram.data* };
define block .ram_image1.data with fixed order{ section .image1.validate.rodata*,
section .infra.ram.data*,
section .timer.ram.data*,
section .cutb.ram.data*,
section .hal.ram.data* object rom.o, // for standard libaray __impure_data_ptr
section .cutc.ram.data*,
section .hal.ram.data*
};
define block .ram_image1.bss with fixed order{ //section .hal.flash.data*,
section .hal.sdrc.data*
};
define block .ram_image1.text with fixed order{ section .hal.ram.text*,
section .hal.sdrc.text*,
//section .text* object startup.o,
section .infra.ram.text*,
};
define block IMAGE1 with fixed order { section LOADER };
define block IMAGE1_DBG with fixed order { block .ram.start.table, block .ram_image1.data, block .ram_image1.bss, block .ram_image1.text };
place at start of ROM_USED_RAM_region { readwrite,
block .vector_table,
block .user_vector_table,
block .user_data_table,
block .rom.bss,
block IMAGE1
};
keep { section .image2.ram.data* };
define block .image2.start.table1 with fixed order{ section .image2.ram.data* };
keep { section .image2.validate.rodata*, section .custom.validate.rodata* };
define block .image2.start.table2 with fixed order{ section .image2.validate.rodata*, section .custom.validate.rodata* };
define block SHT$$PREINIT_ARRAY { preinit_array };
define block SHT$$INIT_ARRAY { init_array };
define block CPP_INIT with fixed order { block SHT$$PREINIT_ARRAY,
block SHT$$INIT_ARRAY };
define block .ram_image2.text with fixed order{ section .infra.ram.start*,
section .rodata*,
block CPP_INIT,
section .mon.ram.text*,
section .hal.flash.text*,
section .hal.gpio.text*,
section .text*,
section CODE,
section Veneer object startup.o,
section __DLIB_PERTHREAD
};
define block .ram.data with fixed order{ section .data*, section DATA, section .iar.init_table };
define block IMAGE2 with fixed order { block .image2.start.table1, block .image2.start.table2, block .ram_image2.text, block .ram.data };
define block .ram.bss with fixed order{ section .bss*,
section .hal.flash.data*,
section .hal.gpio.data*,
section COMMON,
section .bdsram.data*,
section .bss* object heap_4.o
};
define block .bf_data with fixed order{ section .bfsram.data* };
define block .heap with fixed order{ section .heap* };
define block .stack_dummy with fixed order { section .stack };
place at start of BD_RAM_region { readwrite,
block IMAGE2,
//block IMAGE1_DBG,
block .ram.bss,
//block .bf_data,
};
//place at address mem:0x10052b00 { readwrite,
place at end of BD_RAM_region { readwrite,
block .bf_data,
};
define block SDRAM with fixed order{ section .sdram.text*, section .sdram.data*};
place at start of SDRAM_RAM_region { readwrite,
block SDRAM,
//block IMAGE1_DBG
};
/* TCM placement */
define overlay TCM_overlay { section .tcm.heap,
section .bss object mem.o,
section .bss object memp.o,
block .heap,
block .stack_dummy
};
/* dummy code placement */
define overlay TCM_overlay { block IMAGE1_DBG };
place at start of TCM_region { readwrite,
overlay TCM_overlay
};
define exported symbol __rom_bss_start__ = 0x10000300; // use in rom
define exported symbol __rom_bss_end__ = 0x10000bc8; // use in rom
define exported symbol __ram_start_table_start__= 0x10000bc8; // use in rom
define exported symbol __image1_validate_code__= 0x10000bdc; // needed by ram code
define exported symbol _rtl_impure_ptr = 0x10001c60; // for standard library

View file

@ -0,0 +1,24 @@
@REM This batch file has been generated by the IAR Embedded Workbench
@REM C-SPY Debugger, as an aid to preparing a command line for running
@REM the cspybat command line utility using the appropriate settings.
@REM
@REM Note that this file is generated every time a new debug session
@REM is initialized, so you may want to move or rename the file before
@REM making changes.
@REM
@REM You can launch cspybat by typing the name of this batch file followed
@REM by the name of the debug file (usually an ELF/DWARF or UBROF file).
@REM
@REM Read about available command line parameters in the C-SPY Debugging
@REM Guide. Hints about additional command line parameters that may be
@REM useful in specific cases:
@REM --download_only Downloads a code image without starting a debug
@REM session afterwards.
@REM --silent Omits the sign-on message.
@REM --timeout Limits the maximum allowed execution time.
@REM
"C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\common\bin\cspybat" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armproc.dll" "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armJET.dll" %1 --plugin "C:\Program Files (x86)\IAR Systems\Embedded Workbench 7.0\arm\bin\armbat.dll" --macro "D:\ameba_ws2812b\project\realtek_ameba1_va0_example\EWARM-RELEASE\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\preload.mac" --flash_loader "D:\ameba_ws2812b\project\realtek_ameba1_va0_example\EWARM-RELEASE\tmp.board" --backend -B "--endian=little" "--cpu=Cortex-M3" "--fpu=None" "-p" "D:\ameba_ws2812b\project\realtek_ameba1_va0_example\EWARM-RELEASE\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\8195a.ddf" "--semihosting=none" "--multicore_nr_of_cores=1" "--jet_probe=cmsisdap" "--jet_standard_reset=4,0,0" "--reset_style="0,-,0,Disabled__no_reset_"" "--reset_style="1,-,0,Software"" "--reset_style="2,-,0,Hardware"" "--reset_style="3,-,0,Core"" "--reset_style="4,-,1,System"" "--jet_interface=SWD" "--drv_restore_breakpoints=main" "--drv_catch_exceptions=0x7f0"

View file

@ -0,0 +1,16 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<crun>
<version>1</version>
<filter_entries>
<filter index="0" type="default">
<type>*</type>
<start_file>*</start_file>
<end_file>*</end_file>
<action_debugger>0</action_debugger>
<action_log>1</action_log>
</filter>
</filter_entries>
</crun>

View file

@ -0,0 +1,5 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<Project/>

View file

@ -0,0 +1,49 @@
[Jet]
JetConnSerialNo=64507
JetConnFoundProbes=
DisableInterrupts=0
MultiCoreRunAll=0
[PlDriver]
FirstRun=0
MemConfigValue=D:\ameba_ws2812b\project\realtek_ameba1_va0_example\EWARM-RELEASE\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\8195a.ddf
[Exceptions]
StopOnUncaught=_ 0
StopOnThrow=_ 0
[Stack]
FillEnabled=0
OverflowWarningsEnabled=1
WarningThreshold=90
SpWarningsEnabled=1
WarnLogOnly=1
UseTrigger=1
TriggerName=main
LimitSize=0
ByteLimit=50
[SWOManager]
SamplingDivider=8192
OverrideClock=0
CpuClock=1944140800
SwoClock=4096
DataLogMode=0
ItmPortsEnabled=63
ItmTermIOPorts=1
ItmLogPorts=0
ItmLogFile=$PROJ_DIR$\ITM.log
PowerForcePC=1
PowerConnectPC=1
[ArmDriver]
EnableCache=1
[Log file]
LoggingEnabled=_ 0
LogFile=_ ""
Category=_ 0
[TermIOLog]
LoggingEnabled=_ 0
LogFile=_ ""
[Disassemble mode]
mode=0
[Breakpoints2]
Count=0
[Aliases]
Count=0
SuppressDialog=0

View file

@ -0,0 +1,77 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<Workspace>
<ConfigDictionary>
<CurrentConfigs><Project>Project/Debug</Project></CurrentConfigs></ConfigDictionary>
<Desktop>
<Static>
<Debug-Log>
<ColumnWidth0>20</ColumnWidth0><ColumnWidth1>1155</ColumnWidth1></Debug-Log>
<Workspace>
<ColumnWidths>
<Column0>199</Column0><Column1>0</Column1><Column2>27</Column2><Column3>0</Column3></ColumnWidths>
</Workspace>
<Build>
<ColumnWidth0>20</ColumnWidth0><ColumnWidth1>866</ColumnWidth1><ColumnWidth2>231</ColumnWidth2><ColumnWidth3>57</ColumnWidth3></Build>
<TerminalIO/>
</Static>
<Windows>
<Wnd0>
<Tabs>
<Tab>
<Identity>TabID-17985-28802</Identity>
<TabName>Workspace</TabName>
<Factory>Workspace</Factory>
<Session>
<NodeDict><ExpandedNode>Project</ExpandedNode><ExpandedNode>Project/user</ExpandedNode><ExpandedNode>Project/utilities</ExpandedNode></NodeDict></Session>
</Tab>
</Tabs>
<SelectedTab>0</SelectedTab></Wnd0><Wnd1>
<Tabs>
<Tab>
<Identity>TabID-28734-28805</Identity>
<TabName>Debug Log</TabName>
<Factory>Debug-Log</Factory>
<Session/>
</Tab>
<Tab>
<Identity>TabID-16940-28821</Identity>
<TabName>Build</TabName>
<Factory>Build</Factory>
<Session/>
</Tab>
</Tabs>
<SelectedTab>1</SelectedTab></Wnd1></Windows>
<Editor>
<Pane/><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>
<Positions>
<Top><Row0><Sizes><Toolbar-05268110><key>iaridepm.enu1</key></Toolbar-05268110></Sizes></Row0></Top><Left><Row0><Sizes><Wnd0><Rect><Top>-2</Top><Left>-2</Left><Bottom>532</Bottom><Right>246</Right><x>-2</x><y>-2</y><xscreen>200</xscreen><yscreen>200</yscreen><sizeHorzCX>164745</sizeHorzCX><sizeHorzCY>258065</sizeHorzCY><sizeVertCX>204283</sizeVertCX><sizeVertCY>689032</sizeVertCY></Rect></Wnd0></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd1><Rect><Top>-2</Top><Left>-2</Left><Bottom>198</Bottom><Right>1216</Right><x>-2</x><y>-2</y><xscreen>1218</xscreen><yscreen>200</yscreen><sizeHorzCX>1003295</sizeHorzCX><sizeHorzCY>258065</sizeHorzCY><sizeVertCX>164745</sizeVertCX><sizeVertCY>258065</sizeVertCY></Rect></Wnd1></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>
</Desktop>
</Workspace>

View file

@ -0,0 +1,2 @@
[MainWindow]
WindowPlacement=_ 185 18 1415 852 1

View file

@ -0,0 +1,21 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<flash_board>
<pass>
<range>CODE 0x10000bc8 0x10003FFF</range>
<loader>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash</loader>
<abs_offset>0x00000000</abs_offset>
<args>--head
--img2_addr
0xB000</args>
</pass>
<pass>
<range>CODE 0x10004000 0x10046EA7</range>
<loader>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash</loader>
<abs_offset>0xB000</abs_offset>
</pass>
<ignore>CODE 0x00000000 0x000FFFFF</ignore>
<ignore>CODE 0x10000000 0x10000bc7</ignore>
<ignore>CODE 0x10046ea8 0x1006FFFF</ignore>
<ignore>CODE 0x1FFF0000 0x1FFFFFFF</ignore>
</flash_board>