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first commit and add gitignore, README.md

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ChesterTseng 2016-06-04 19:09:35 +08:00
commit 760756ba2c
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component/soc/realtek/8195a/misc/bsp/image/ram_1.p.bin Executable file
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component/soc/realtek/8195a/misc/bsp/image/ram_1.r.bin Executable file
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component/soc/realtek/8195a/misc/bsp/lib/common/IAR/lib_mdns.a Executable file
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component/soc/realtek/8195a/misc/bsp/lib/common/IAR/lib_platform.a Executable file
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component/soc/realtek/8195a/misc/bsp/lib/common/IAR/lib_rtlstd.a Executable file
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component/soc/realtek/8195a/misc/bsp/lib/common/IAR/lib_wlan.a Executable file
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component/soc/realtek/8195a/misc/bsp/lib/common/IAR/lib_wlan_mp.a Executable file
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component/soc/realtek/8195a/misc/bsp/lib/common/IAR/lib_wps.a Executable file
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component/soc/realtek/8195a/misc/bsp/lib/va0/rom.a Executable file
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component/soc/realtek/8195a/misc/driver/low_level_io.c Executable file
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#include <stdio.h>
#include "hal_api.h"
#if !defined (__ICCARM__)
extern u8 RAM_IMG1_VALID_PATTEN[];
void *tmp = RAM_IMG1_VALID_PATTEN;
#endif
#if defined ( __ICCARM__ )
size_t __write(int Handle, const unsigned char * Buf, size_t Bufsize)
{
int nChars = 0;
/* Check for stdout and stderr
(only necessary if file descriptors are enabled.) */
if (Handle != 1 && Handle != 2)
{
return -1;
}
for (/*Empty */; Bufsize > 0; --Bufsize)
{
DiagPutChar(*Buf++);
++nChars;
}
return nChars;
}
size_t __read(int Handle, unsigned char * Buf, size_t Bufsize)
{
int nChars = 0;
/* Check for stdin
(only necessary if FILE descriptors are enabled) */
if (Handle != 0)
{
return -1;
}
for (/*Empty*/; Bufsize > 0; --Bufsize)
{
int c = DiagGetChar(_FALSE);
if (c < 0)
break;
*(Buf++) = c;
++nChars;
}
return nChars;
}
#endif

337
component/soc/realtek/8195a/misc/driver/rtl_consol.c Executable file
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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#include "rtl8195a.h"
//#include <stdarg.h>
#include "rtl_consol.h"
#include "osdep_api.h"
#if defined(configUSE_WAKELOCK_PMU) && (configUSE_WAKELOCK_PMU == 1)
#include "freertos_pmu.h"
#endif
MON_RAM_BSS_SECTION
volatile UART_LOG_CTL UartLogCtl;
MON_RAM_BSS_SECTION
volatile UART_LOG_CTL *pUartLogCtl;
MON_RAM_BSS_SECTION
u8 *ArgvArray[MAX_ARGV];
MON_RAM_BSS_SECTION
UART_LOG_BUF UartLogBuf;
#ifdef CONFIG_UART_LOG_HISTORY
MON_RAM_BSS_SECTION
u8 UartLogHistoryBuf[UART_LOG_HISTORY_LEN][UART_LOG_CMD_BUFLEN];
#endif
_LONG_CALL_
extern u8
UartLogCmdChk(
IN u8 RevData,
IN UART_LOG_CTL *prvUartLogCtl,
IN u8 EchoFlag
);
_LONG_CALL_
extern VOID
ArrayInitialize(
IN u8 *pArrayToInit,
IN u8 ArrayLen,
IN u8 InitValue
);
_LONG_CALL_
extern VOID
UartLogHistoryCmd(
IN u8 RevData,
IN UART_LOG_CTL *prvUartLogCtl,
IN u8 EchoFlag
);
_LONG_CALL_
extern VOID
UartLogCmdExecute(
IN PUART_LOG_CTL pUartLogCtlExe
);
//=================================================
/* Minimum and maximum values a `signed long int' can hold.
(Same as `int'). */
#ifndef __LONG_MAX__
#if defined (__alpha__) || (defined (__sparc__) && defined(__arch64__)) || defined (__sparcv9) || defined (__s390x__)
#define __LONG_MAX__ 9223372036854775807L
#else
#define __LONG_MAX__ 2147483647L
#endif /* __alpha__ || sparc64 */
#endif
#undef LONG_MIN
#define LONG_MIN (-LONG_MAX-1)
#undef LONG_MAX
#define LONG_MAX __LONG_MAX__
/* Maximum value an `unsigned long int' can hold. (Minimum is 0). */
#undef ULONG_MAX
#define ULONG_MAX (LONG_MAX * 2UL + 1)
#ifndef __LONG_LONG_MAX__
#define __LONG_LONG_MAX__ 9223372036854775807LL
#endif
//======================================================
//<Function>: UartLogIrqHandleRam
//<Usage >: To deal with Uart-Log RX IRQ
//<Argus >: VOID
//<Return >: VOID
//<Notes >: NA
//======================================================
MON_RAM_TEXT_SECTION
VOID
UartLogIrqHandleRam
(
VOID * Data
)
{
u8 UartReceiveData = 0;
//For Test
BOOL PullMode = _FALSE;
u32 IrqEn = DiagGetIsrEnReg();
DiagSetIsrEnReg(0);
UartReceiveData = DiagGetChar(PullMode);
if (UartReceiveData == 0) {
goto exit;
}
//KB_ESC chk is for cmd history, it's a special case here.
if (UartReceiveData == KB_ASCII_ESC) {
//4 Esc detection is only valid in the first stage of boot sequence (few seconds)
if (pUartLogCtl->ExecuteEsc != _TRUE)
{
pUartLogCtl->ExecuteEsc = _TRUE;
(*pUartLogCtl).EscSTS = 0;
}
else
{
//4 the input commands are valid only when the task is ready to execute commands
if ((pUartLogCtl->BootRdy == 1)
#ifdef CONFIG_KERNEL
||(pUartLogCtl->TaskRdy == 1)
#endif
)
{
if ((*pUartLogCtl).EscSTS==0)
{
(*pUartLogCtl).EscSTS = 1;
}
}
else
{
(*pUartLogCtl).EscSTS = 0;
}
}
}
else if ((*pUartLogCtl).EscSTS==1){
if (UartReceiveData != KB_ASCII_LBRKT){
(*pUartLogCtl).EscSTS = 0;
}
else{
(*pUartLogCtl).EscSTS = 2;
}
}
else{
if ((*pUartLogCtl).EscSTS==2){
(*pUartLogCtl).EscSTS = 0;
#ifdef CONFIG_UART_LOG_HISTORY
if ((UartReceiveData=='A')|| UartReceiveData=='B'){
UartLogHistoryCmd(UartReceiveData,(UART_LOG_CTL *)pUartLogCtl,1);
}
#endif
}
else{
if (UartLogCmdChk(UartReceiveData,(UART_LOG_CTL *)pUartLogCtl,1)==2)
{
//4 check UartLog buffer to prevent from incorrect access
if (pUartLogCtl->pTmpLogBuf != NULL)
{
pUartLogCtl->ExecuteCmd = _TRUE;
#if defined(CONFIG_KERNEL) && !TASK_SCHEDULER_DISABLED
if (pUartLogCtl->TaskRdy)
RtlUpSemaFromISR((_Sema *)&pUartLogCtl->Sema);
#endif
}
else
{
ArrayInitialize((u8 *)pUartLogCtl->pTmpLogBuf->UARTLogBuf, UART_LOG_CMD_BUFLEN, '\0');
}
}
}
}
exit:
DiagSetIsrEnReg(IrqEn);
}
MON_RAM_TEXT_SECTION
VOID
RtlConsolInitRam(
IN u32 Boot,
IN u32 TBLSz,
IN VOID *pTBL
)
{
UartLogBuf.BufCount = 0;
ArrayInitialize(&UartLogBuf.UARTLogBuf[0],UART_LOG_CMD_BUFLEN,'\0');
pUartLogCtl = &UartLogCtl;
pUartLogCtl->NewIdx = 0;
pUartLogCtl->SeeIdx = 0;
pUartLogCtl->RevdNo = 0;
pUartLogCtl->EscSTS = 0;
pUartLogCtl->BootRdy = 0;
pUartLogCtl->pTmpLogBuf = &UartLogBuf;
#ifdef CONFIG_UART_LOG_HISTORY
pUartLogCtl->CRSTS = 0;
pUartLogCtl->pHistoryBuf = &UartLogHistoryBuf[0];
#endif
pUartLogCtl->pfINPUT = (VOID*)&DiagPrintf;
pUartLogCtl->pCmdTbl = (PCOMMAND_TABLE) pTBL;
pUartLogCtl->CmdTblSz = TBLSz;
#ifdef CONFIG_KERNEL
pUartLogCtl->TaskRdy = 0;
#endif
//executing boot sequence
if (Boot == ROM_STAGE)
{
pUartLogCtl->ExecuteCmd = _FALSE;
pUartLogCtl->ExecuteEsc = _FALSE;
}
else
{
pUartLogCtl->ExecuteCmd = _FALSE;
pUartLogCtl->ExecuteEsc= _TRUE;//don't check Esc anymore
#if defined(CONFIG_KERNEL)
/* Create a Semaphone */
RtlInitSema((_Sema*)&(pUartLogCtl->Sema), 0);
pUartLogCtl->TaskRdy = 0;
#ifdef PLATFORM_FREERTOS
if (pdTRUE != xTaskCreate( RtlConsolTaskRam, (const signed char * const)"LOGUART_TASK", 128, NULL, tskIDLE_PRIORITY + 5 + PRIORITIE_OFFSET, NULL))
{
DiagPrintf("Create Log UART Task Err!!\n");
}
#endif
#endif
}
CONSOLE_8195A();
}
extern u8** GetArgv(const u8 *string);
#if SUPPORT_LOG_SERVICE
extern char log_buf[LOG_SERVICE_BUFLEN];
extern xSemaphoreHandle log_rx_interrupt_sema;
#endif
//======================================================
void console_cmd_exec(PUART_LOG_CTL pUartLogCtlExe)
{
u8 CmdCnt = 0;
u8 argc = 0;
u8 **argv;
//u32 CmdNum;
PUART_LOG_BUF pUartLogBuf = pUartLogCtlExe->pTmpLogBuf;
#if SUPPORT_LOG_SERVICE
strncpy(log_buf, (const u8*)&(*pUartLogBuf).UARTLogBuf[0], LOG_SERVICE_BUFLEN-1);
#endif
argc = GetArgc((const u8*)&((*pUartLogBuf).UARTLogBuf[0]));
argv = GetArgv((const u8*)&((*pUartLogBuf).UARTLogBuf[0]));
if(argc > 0){
#if SUPPORT_LOG_SERVICE
// if(log_handler(argv[0]) == NULL)
// legency_interactive_handler(argc, argv);
RtlUpSema((_Sema *)&log_rx_interrupt_sema);
#endif
ArrayInitialize(argv[0], sizeof(argv[0]) ,0);
}else{
#if defined(configUSE_WAKELOCK_PMU) && (configUSE_WAKELOCK_PMU == 1)
acquire_wakelock(WAKELOCK_LOGUART);
#endif
CONSOLE_8195A(); // for null command
}
(*pUartLogBuf).BufCount = 0;
ArrayInitialize(&(*pUartLogBuf).UARTLogBuf[0], UART_LOG_CMD_BUFLEN, '\0');
}
//======================================================
// overload original RtlConsolTaskRam
MON_RAM_TEXT_SECTION
VOID
RtlConsolTaskRam(
VOID *Data
)
{
#if SUPPORT_LOG_SERVICE
log_service_init();
#endif
//4 Set this for UartLog check cmd history
#ifdef CONFIG_KERNEL
pUartLogCtl->TaskRdy = 1;
#endif
#ifndef CONFIG_KERNEL
pUartLogCtl->BootRdy = 1;
#endif
do{
#if defined(CONFIG_KERNEL) && !TASK_SCHEDULER_DISABLED
RtlDownSema((_Sema *)&pUartLogCtl->Sema);
#endif
if (pUartLogCtl->ExecuteCmd) {
// Add command handler here
console_cmd_exec((PUART_LOG_CTL)pUartLogCtl);
//UartLogCmdExecute((PUART_LOG_CTL)pUartLogCtl);
pUartLogCtl->ExecuteCmd = _FALSE;
}
}while(1);
}
//======================================================
void console_init(void)
{
IRQ_HANDLE UartIrqHandle;
//4 Register Log Uart Callback function
UartIrqHandle.Data = NULL;//(u32)&UartAdapter;
UartIrqHandle.IrqNum = UART_LOG_IRQ;
UartIrqHandle.IrqFun = (IRQ_FUN) UartLogIrqHandleRam;
UartIrqHandle.Priority = 0;
//4 Register Isr handle
InterruptUnRegister(&UartIrqHandle);
InterruptRegister(&UartIrqHandle);
#if !TASK_SCHEDULER_DISABLED
RtlConsolInitRam((u32)RAM_STAGE,(u32)0,(VOID*)NULL);
#else
RtlConsolInitRam((u32)ROM_STAGE,(u32)0,(VOID*)NULL);
#endif
}

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component/soc/realtek/8195a/misc/driver/rtl_consol.h Executable file
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/*
* Routines to access hardware
*
* Copyright (c) 2013 Realtek Semiconductor Corp.
*
* This module is a confidential and proprietary property of RealTek and
* possession or use of this module requires written permission of RealTek.
*/
#ifndef _RTK_CONSOL_H_
#define _RTK_CONSOL_H_
/*
* Include user defined options first. Anything not defined in these files
* will be set to standard values. Override anything you dont like!
*/
#if defined(CONFIG_PLATFORM_8195A) || defined(CONFIG_PLATFORM_8711B)
#include "platform_opts.h"
#endif
#include "osdep_api.h"
#include "hal_diag.h"
#define CONSOLE_PREFIX "#"
//Log UART
//UART_LOG_CMD_BUFLEN: only 126 bytes could be used for keeping input
// cmd, the last byte is for string end ('\0').
#define UART_LOG_CMD_BUFLEN 127
#define MAX_ARGV 10
typedef u32 (*ECHOFUNC)(IN u8*,...); //UART LOG echo-function type.
typedef struct _UART_LOG_BUF_ {
u8 BufCount; //record the input cmd char number.
u8 UARTLogBuf[UART_LOG_CMD_BUFLEN]; //record the input command.
} UART_LOG_BUF, *PUART_LOG_BUF;
typedef struct _UART_LOG_CTL_ {
u8 NewIdx;
u8 SeeIdx;
u8 RevdNo;
u8 EscSTS;
u8 ExecuteCmd;
u8 ExecuteEsc;
u8 BootRdy;
u8 Resvd;
PUART_LOG_BUF pTmpLogBuf;
VOID *pfINPUT;
PCOMMAND_TABLE pCmdTbl;
u32 CmdTblSz;
#ifdef CONFIG_UART_LOG_HISTORY
u32 CRSTS;
#endif
#ifdef CONFIG_UART_LOG_HISTORY
u8 (*pHistoryBuf)[UART_LOG_CMD_BUFLEN];
#endif
#ifdef CONFIG_KERNEL
u32 TaskRdy;
_Sema Sema;
#else
// Since ROM code will reference this typedef, so keep the typedef same size
u32 TaskRdy;
void *Sema;
#endif
} UART_LOG_CTL, *PUART_LOG_CTL;
#define KB_ASCII_NUL 0x00
#define KB_ASCII_BS 0x08
#define KB_ASCII_TAB 0x09
#define KB_ASCII_LF 0x0A
#define KB_ASCII_CR 0x0D
#define KB_ASCII_ESC 0x1B
#define KB_ASCII_SP 0x20
#define KB_ASCII_BS_7F 0x7F
#define KB_ASCII_LBRKT 0x5B //[
#define KB_SPACENO_TAB 1
#ifdef CONFIG_UART_LOG_HISTORY
#define UART_LOG_HISTORY_LEN 5
#endif
#ifdef CONFIG_DEBUG_LOG
#define _ConsolePrint DiagPrintf
#else
#define _ConsolePrint
#endif
#ifndef CONSOLE_PREFIX
#define CONSOLE_PREFIX "<RTL8195A>"
#endif
#define CONSOLE_8195A(...) do {\
_ConsolePrint("\r"CONSOLE_PREFIX __VA_ARGS__);\
}while(0)
_LONG_CALL_ VOID
RtlConsolInit(
IN u32 Boot,
IN u32 TBLSz,
IN VOID *pTBL
);
#if defined(CONFIG_KERNEL)
_LONG_CALL_ VOID
RtlConsolTaskRam(
VOID *Data
);
#endif
_LONG_CALL_ VOID
RtlConsolTaskRom(
VOID *Data
);
_LONG_CALL_ u32
Strtoul(
IN const u8 *nptr,
IN u8 **endptr,
IN u32 base
);
void console_init(void);
#endif //_RTK_CONSOL_H_

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component/soc/realtek/8195a/misc/iar_utility/common/8195a.ddf Executable file
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;; Memory information ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
;; Used to define address zones within the ARM address space (Memory).
;;
;; Name may be almost anything
;; AdrSpace must be Memory
;; StartAdr start of memory block
;; EndAdr end of memory block
;; AccType type of access, read-only (R), read-write (RW) or SFR (W)
[Memory]
;; Name AdrSpace StartAdr EndAdr AccType Width
Memory = ROM Memory 0x00000000 0x003FFFFF RW
Memory = SRAM Memory 0x10000000 0x1FFFFFFF RW
Memory = DRAM Memory 0x30000000 0x30FFFFFF RW
Memory = SFR Memory 0x40000000 0x41FFFFFF RW
Memory = SFR_Bitband Memory 0x42000000 0x43FFFFFF RW
Memory = PPB Memory 0xE0000000 0xFFFFFFFF RW
TrustedRanges = true
UseSfrFilter = true
[SfrInclude]

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component/soc/realtek/8195a/misc/iar_utility/common/dram/EM6A6165TS_7G.mac Executable file
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__load_dram_param(){
//DRAM_INFO
DeviceType = 8; //DRAM_SDR
Page = 0; //DRAM_COLADDR_8B
Bank=0; //DRAM_BANK_2
DqWidth=0; //DRAM_DQ_1
//DRAM_MODE_REG_INFO
BstLen=0; //BST_LEN_4
BstType=0; //SENQUENTIAL
Mode0Cas=3;
Mode0Wr=0;
Mode1DllEnN=0;
Mode1AllLat=0;
Mode2Cwl=0;
//DRAM_TIMING_INFO
DramTimingTref = 64000;
DramRowNum = 8192;
//SDR 100MHZ==>10000, 50MHZ==>20000, 25MHZ==>40000, 12.5MHZ==>80000
Tck = 80000; //SDR 12.5MHZ
TrfcPs=60000;
TrefiPs=((DramTimingTref*1000)/DramRowNum)*1000;
WrMaxTck=2;
TrcdPs=15000;
TrpPs=15000;
TrasPs=42000;
TrrdTck=2;
TwrPs=Tck*2;
TwtrTck=0;
TmrdTck=2;
TrtpTck=0;
TccdTck=1;
TrcPs=60000;
//DRAM_DEVICE_INFO
DdrPeriodPs=Tck;
DfiRate=0; //DFI_RATIO_1
}

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component/soc/realtek/8195a/misc/iar_utility/common/dram/common.mac Executable file
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__load_dram_common(){
__registerMacroFile("$PROJ_DIR$\\..\\..\\..\\component\\soc\\realtek\\8195a\\misc\\iar_utility\\common\\dram\\EM6A6165TS_7G.mac");
}

4
component/soc/realtek/8195a/misc/iar_utility/common/dram/readme.txt Executable file
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To Change DRAM setting
1. Create and Fill content like EM6A6165TS_7G.mac
2. Change load file in common.mac

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component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP.board Executable file
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<?xml version="1.0" encoding="iso-8859-1"?>
<flash_board>
<pass>
<range>CODE 0x10000bc0 0x10003FFF</range>
<loader>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash</loader>
<abs_offset>0x00000000</abs_offset>
<args>--head</args>
</pass>
<pass>
<range>CODE 0x10004000 0x1006FFFF</range>
<loader>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash</loader>
<abs_offset>0x00000000</abs_offset>
<args>--cascade</args>
</pass>
<pass>
<range>CODE 0x30000000 0x301FFFFF</range>
<loader>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash</loader>
<abs_offset>0x00000000</abs_offset>
<args>--cascade</args>
</pass>
<ignore>CODE 0x00000000 0x000FFFFF</ignore>
<ignore>CODE 0x10000000 0x10000bbf</ignore>
</flash_board>

10
component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP.flash Executable file
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<?xml version="1.0" encoding="iso-8859-1"?>
<flash_device>
<exe>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.out</exe>
<flash_base>0x00000000</flash_base>
<page>8</page>
<block>256 0x1000</block>
<macro>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.mac</macro>
<aggregate>1</aggregate>
</flash_device>

69
component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP.mac Executable file
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setup()
{
__var tmp;
__hwResetWithStrategy(0, 2);
__hwReset(1);
tmp = __readMemory32(0x40000014,"Memory"); __delay(10);
__message "0x40000014=",tmp:%x;
__writeMemory32(0x21, 0x40000014, "Memory"); __delay(10);
__writeMemory32(0x1FC00002, 0x40000304, "Memory"); __delay(10);
__writeMemory32(0x400, 0x40000250, "Memory"); __delay(10);
__writeMemory32(0x0, 0x40000340, "Memory"); __delay(10);
__writeMemory32(0xc04, 0x40000230, "Memory"); __delay(10);
__writeMemory32(0x1157, 0x40000210, "Memory"); __delay(10);
__writeMemory32(0x110011, 0x400002c0, "Memory"); __delay(10);
__writeMemory32(0xffffffff, 0x40000320, "Memory"); __delay(10);
/*
__writeMemory32(0x1, 0x40005224, "Memory"); __delay(10);
__writeMemory32(0x2c8, 0x40005004, "Memory"); __delay(10);
__writeMemory32(0xffffd000, 0x40005008, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x22, 0x40005020, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x09032001, 0x40005010, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x2611, 0x40005014, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x68413, 0x40005018, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x42, 0x4000501c, "Memory"); __delay(10);
__delay(3);
// Enable
__writeMemory32(0x700, 0x4000500c, "Memory"); __delay(10);
__delay(20);
__writeMemory32(0x1, 0x40005000, "Memory"); __delay(10);
__delay(100);
tmp = __readMemory32(0x40005000,"Memory"); __delay(10);
__writeMemory32(0x600, 0x4000500c, "Memory"); __delay(10);
__delay(30);
*/
}
execUserPreload()
{
__var tmp;
setup();
tmp = __readMemory32(0x40000210, "Memory")|(1<<27);
__writeMemory32(tmp, 0x40000210, "Memory");
}
execUserSetup()
{
//execUserPreload();
//__loadImage("$TARGET_PATH$ ", 0, 0);
//__writeMemory32(0x80000000, 0x40000218, "Memory");
}
execUserFlashInit() // Called by debugger before loading flash loader in RAM.
{
__var tmp;
__message "----- Prepare hardware for Flashloader -----\n";
setup();
tmp = __readMemory32(0x40000210, "Memory")|(1<<27);
__writeMemory32(tmp, 0x40000210, "Memory");
}

BIN
component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP.out Executable file
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component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP_img1.board Executable file
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<?xml version="1.0" encoding="iso-8859-1"?>
<flash_board>
<pass>
<range>CODE 0x10000bc8 0x10005FFF</range>
<loader>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash</loader>
<abs_offset>0x00000000</abs_offset>
<args>--head
--img2_addr
0xB000</args>
</pass>
<ignore>CODE 0x00000000 0x000FFFFF</ignore>
<ignore>CODE 0x10000000 0x10000bbf</ignore>
<ignore>CODE 0x10006000 0x1006FFFF</ignore>
<ignore>CODE 0x30000000 0x301FFFFF</ignore>
</flash_board>

17
component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP_img1_v0.board Executable file
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<?xml version="1.0" encoding="iso-8859-1"?>
<flash_board>
<pass>
<range>CODE 0x10000bc0 0x10005FFF</range>
<loader>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash</loader>
<abs_offset>0x00000000</abs_offset>
<args>--head
--img2_addr
0xB000</args>
</pass>
<ignore>CODE 0x00000000 0x000FFFFF</ignore>
<ignore>CODE 0x10000000 0x10000bbf</ignore>
<ignore>CODE 0x10006000 0x1006FFFF</ignore>
<ignore>CODE 0x30000000 0x301FFFFF</ignore>
</flash_board>

26
component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aMP_img2.board Executable file
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@ -0,0 +1,26 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<flash_board>
<pass>
<range>CODE 0x10000bc8 0x10005FFF</range>
<loader>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash</loader>
<abs_offset>0x00000000</abs_offset>
<args>--head
--img2_addr
0xB000</args>
</pass>
<pass>
<range>CODE 0x10006000 0x1006FFFF</range>
<loader>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash</loader>
<abs_offset>0xB000</abs_offset>
</pass>
<pass>
<range>CODE 0x30000000 0x301FFFFF</range>
<loader>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash</loader>
<abs_offset>0x0000</abs_offset>
<args>--cascade</args>
</pass>
<ignore>CODE 0x00000000 0x000FFFFF</ignore>
<ignore>CODE 0x10000000 0x10000bc7</ignore>
<ignore>CODE 0x1FFF0000 0x1FFFFFFF</ignore>
</flash_board>

30
component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aQA.board Executable file
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<?xml version="1.0" encoding="iso-8859-1"?>
<flash_board>
<pass>
<range>CODE 0x200006b4 0x2002FFFF</range>
<loader>$PROJ_DIR$\flashloader\FlashRTL8195aQA.flash</loader>
<abs_offset>0x00000000</abs_offset>
</pass>
<pass>
<range>CODE 0x30000000 0x301FFFFF</range>
<loader>$PROJ_DIR$\flashloader\FlashRTL8195aQA.flash</loader>
<abs_offset>0x00010000</abs_offset>
<ignore>DATA_Z 0x30000000 0x301FFFFF</ignore>
</pass>
<pass>
<range>CODE 0x20080000 0x200BFFFF</range>
<loader>$PROJ_DIR$\flashloader\FlashRTL8195aQA.flash</loader>
<abs_offset>0x00020000</abs_offset>
<ignore>DATA_Z 0x20080000 0x200BFFFF</ignore>
</pass>
<pass>
<range>CODE 0x00000000 0x00000000</range>
<loader>$PROJ_DIR$\flashloader\FlashRTL8195aQA.flash</loader>
<abs_offset>0x00030000</abs_offset>
</pass>
<ignore>CODE 0x00000001 0x000BFFFF</ignore>
<ignore>CODE 0x20000000 0x200006b3</ignore>
</flash_board>

10
component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aQA.flash Executable file
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@ -0,0 +1,10 @@
<?xml version="1.0" encoding="iso-8859-1"?>
<flash_device>
<exe>$PROJ_DIR$\flashloader\FlashRTL8195aQA.out</exe>
<flash_base>0x00000000</flash_base>
<page>8</page>
<block>256 0x1000</block>
<macro>$PROJ_DIR$\flashloader\FlashRTL8195aQA.mac</macro>
<aggregate>1</aggregate>
</flash_device>

60
component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aQA.mac Executable file
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setup()
{
__var tmp;
__hwReset(1);
__writeMemory32(0x21, 0x40000014, "Memory"); __delay(10);
__writeMemory32(0x1FC00002, 0x40000304, "Memory"); __delay(10);
__writeMemory32(0x400, 0x40000250, "Memory"); __delay(10);
__writeMemory32(0x0, 0x40000340, "Memory"); __delay(10);
__writeMemory32(0xc04, 0x40000230, "Memory"); __delay(10);
__writeMemory32(0x1157, 0x40000210, "Memory"); __delay(10);
__writeMemory32(0x110011, 0x400002c0, "Memory"); __delay(10);
__writeMemory32(0xffffffff, 0x40000320, "Memory"); __delay(10);
__writeMemory32(0x1, 0x40005224, "Memory"); __delay(10);
__writeMemory32(0x2c8, 0x40005004, "Memory"); __delay(10);
__writeMemory32(0xffffd000, 0x40005008, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x22, 0x40005020, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x09032001, 0x40005010, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x2611, 0x40005014, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x68413, 0x40005018, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x42, 0x4000501c, "Memory"); __delay(10);
__delay(3);
// Enable
__writeMemory32(0x700, 0x4000500c, "Memory"); __delay(10);
__delay(20);
__writeMemory32(0x1, 0x40005000, "Memory"); __delay(10);
__delay(100);
tmp = __readMemory32(0x40005000,"Memory"); __delay(10);
__writeMemory32(0x600, 0x4000500c, "Memory"); __delay(10);
__delay(30);
}
execUserPreload()
{
__message "----- Prepare hardware for Flashloader -----\n";
setup();
__writeMemory32(0x80000000, 0x40000218, "Memory");
}
execUserSetup()
{
//execUserPreload();
//__loadImage("$TARGET_PATH$ ", 0, 0);
//__writeMemory32(0x80000000, 0x40000218, "Memory");
}
execUserFlashInit() // Called by debugger before loading flash loader in RAM.
{
__message "----- Prepare hardware for Flashloader -----\n";
setup();
__writeMemory32(0x80000000, 0x40000218, "Memory");
}

BIN
component/soc/realtek/8195a/misc/iar_utility/common/flashloader/FlashRTL8195aQA.out Executable file
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Binary file not shown.

53
component/soc/realtek/8195a/misc/iar_utility/common/gen_board.bat Executable file
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@ -0,0 +1,53 @@
@set /a tmp = %1-1
@call :toHex %tmp% end1
@set /a tmp2 = %2-1
@call :toHex %tmp2% end2
@set /a tmp3 = %3-1
@call :toHex %tmp3% end0
@echo echo image 2 start %1
@echo echo image 1 end 0x%end1%
@echo off
@echo ^<?xml version="1.0" encoding="iso-8859-1"?^> > tmp.board
@echo. >> tmp.board
@echo ^<flash_board^> >> tmp.board
@echo ^<pass^> >> tmp.board
@echo ^<range^>CODE %3 0x%end1%^</range^> >> tmp.board
@echo ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^> >> tmp.board
@echo ^<abs_offset^>0x00000000^</abs_offset^> >> tmp.board
@echo ^<args^>--head^</args^> >> tmp.board
@echo ^</pass^> >> tmp.board
@echo ^<pass^> >> tmp.board
@echo ^<range^>CODE %1 0x%end2%^</range^> >> tmp.board
@echo ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^> >> tmp.board
@echo ^<abs_offset^>0x00000000^</abs_offset^> >> tmp.board
@echo ^<args^>--cascade^</args^> >> tmp.board
@echo ^</pass^> >> tmp.board
@echo ^<pass^> >> tmp.board
@echo ^<range^>CODE 0x30000000 0x301FFFFF^</range^> >> tmp.board
@echo ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^> >> tmp.board
@echo ^<abs_offset^>0x00000000^</abs_offset^> >> tmp.board
@echo ^<args^>--cascade^</args^> >> tmp.board
@echo ^</pass^> >> tmp.board
@echo ^<ignore^>CODE 0x00000000 0x000FFFFF^</ignore^> >> tmp.board
@echo ^<ignore^>CODE 0x10000000 0x%end0%^</ignore^> >> tmp.board
@echo ^<ignore^>CODE %2 0x1006FFFF^</ignore^> >> tmp.board
@echo ^</flash_board^> >> tmp.board >> tmp.board
exit
:toHex dec hex -- convert a decimal number to hexadecimal, i.e. -20 to FFFFFFEC or 26 to 0000001A
@echo off
SETLOCAL ENABLEDELAYEDEXPANSION
set /a dec=%~1
set "hex="
set "map=0123456789ABCDEF"
for /L %%N in (1,1,8) do (
set /a "d=dec&15,dec>>=4"
for %%D in (!d!) do set "hex=!map:~%%D,1!!hex!"
)
( ENDLOCAL & REM RETURN VALUES
IF "%~2" NEQ "" (SET %~2=%hex%) ELSE ECHO.%hex%
)
EXIT /b

69
component/soc/realtek/8195a/misc/iar_utility/common/gen_board_img2.bat Executable file
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@set /a tmp = %1-1
@call :toHex %tmp% end1
@set /a tmp2 = %2-1
@call :toHex %tmp2% end2
@set /a tmp3 = %3-1
@call :toHex %tmp3% end3
@set /a tmp4 = %4
@call :toHex %tmp4% flash_run_start
@set /a tmp4 = %5-1
@call :toHex %tmp4% flash_run_end
@echo echo image 2 start %1
@echo echo image 1 end 0x%end1%
@echo off
@echo ^<?xml version="1.0" encoding="iso-8859-1"?^> > tmp.board
@echo. >> tmp.board
@echo ^<flash_board^> >> tmp.board
@echo ^<pass^> >> tmp.board
@echo ^<range^>CODE 0x10000bc8 0x%end1%^</range^> >> tmp.board
@echo ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^> >> tmp.board
@echo ^<abs_offset^>0x00000000^</abs_offset^> >> tmp.board
@echo ^<args^>--head >> tmp.board
@echo --img2_addr >> tmp.board
@echo 0xB000^</args^> >> tmp.board
@echo ^</pass^> >> tmp.board
@echo ^<pass^> >> tmp.board
@echo ^<range^>CODE %1 0x%end2%^</range^> >> tmp.board
@echo ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^> >> tmp.board
@echo ^<abs_offset^>0xB000^</abs_offset^> >> tmp.board
@echo ^</pass^> >> tmp.board
if NOT "%3"=="0xFFFFFFFF" (
@echo ^<pass^> >> tmp.board
@echo ^<range^>CODE 0x30000000 0x%end3%^</range^> >> tmp.board
@echo ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^> >> tmp.board
@echo ^<abs_offset^>0x0000^</abs_offset^> >> tmp.board
@echo ^<args^>--cascade^</args^> >> tmp.board
@echo ^</pass^> >> tmp.board
)
if NOT "%4"=="0xFFFFFFFF" (
@echo ^<pass^> >> tmp.board
@echo ^<range^>CODE 0x%flash_run_start% 0x%flash_run_end%^</range^> >> tmp.board
@echo ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^> >> tmp.board
@echo ^<abs_offset^>0xA4000^</abs_offset^> >> tmp.board
@echo ^</pass^> >> tmp.board
)
@echo ^<ignore^>CODE 0x00000000 0x000FFFFF^</ignore^> >> tmp.board
@echo ^<ignore^>CODE 0x10000000 0x10000bc7^</ignore^> >> tmp.board
@echo ^<ignore^>CODE %2 0x1006FFFF^</ignore^> >> tmp.board
@echo ^<ignore^>CODE 0x1FFF0000 0x1FFFFFFF^</ignore^> >> tmp.board
@echo ^</flash_board^> >> tmp.board >> tmp.board
exit
:toHex dec hex -- convert a decimal number to hexadecimal, i.e. -20 to FFFFFFEC or 26 to 0000001A
@echo off
SETLOCAL ENABLEDELAYEDEXPANSION
set /a dec=%~1
set "hex="
set "map=0123456789ABCDEF"
for /L %%N in (1,1,8) do (
set /a "d=dec&15,dec>>=4"
for %%D in (!d!) do set "hex=!map:~%%D,1!!hex!"
)
( ENDLOCAL & REM RETURN VALUES
IF "%~2" NEQ "" (SET %~2=%hex%) ELSE ECHO.%hex%
)
EXIT /b

47
component/soc/realtek/8195a/misc/iar_utility/common/postbuild.bat Executable file
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cd /D %2
set tooldir=%2\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\tools
del Debug/Exe/target.map Debug/Exe/target.asm *.bin
cmd /c "%tooldir%\nm Debug/Exe/target.axf | %tooldir%\sort > Debug/Exe/target.map"
cmd /c "%tooldir%\objdump -d Debug/Exe/target.axf > Debug/Exe/target.asm"
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE1 Debug/Exe/target.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram1_start=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE2 Debug/Exe/target.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram2_start=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep SDRAM Debug/Exe/target.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram3_start=0x%%i
::for /f "delims=" %%i in ('cmd /c "%tooldir%\grep .ram_image4 Debug/Exe/target.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram4_start=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE1 Debug/Exe/target.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram1_end=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE2 Debug/Exe/target.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram2_end=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep SDRAM Debug/Exe/target.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram3_end=0x%%i
::for /f "delims=" %%i in ('cmd /c "%tooldir%\grep .ram_image4 Debug/Exe/target.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram4_end=0x%%i
::echo %ram1_start% > tmp.txt
::echo %ram2_start% >> tmp.txt
::echo %ram3_start% >> tmp.txt
::echo %ram1_end% >> tmp.txt
::echo %ram2_end% >> tmp.txt
::echo %ram3_end% >> tmp.txt
%tooldir%\objcopy -j "A2 rw" -Obinary Debug/Exe/target.axf Debug/Exe/ram_1.bin
%tooldir%\objcopy -j "A3 rw" -Obinary Debug/Exe/target.axf Debug/Exe/sdram.bin
%tooldir%\pick %ram1_start% %ram1_end% Debug\Exe\ram_1.bin Debug\Exe\ram_1.p.bin head
%tooldir%\pick %ram2_start% %ram2_end% Debug\Exe\ram_1.bin Debug\Exe\ram_2.p.bin body
if defined %ram3_start (
%tooldir%\pick %ram3_start% %ram3_end% Debug\Exe\sdram.bin Debug\Exe\ram_3.p.bin body
)
:: SDRAM case
if defined %ram3_start (
copy /b Debug\Exe\ram_1.p.bin+Debug\Exe\ram_2.p.bin+Debug\Exe\ram_3.p.bin Debug\Exe\ram_all.bin
)
:: NO SDRAM case
if not defined %ram3_start (
copy /b Debug\Exe\ram_1.p.bin+Debug\Exe\ram_2.p.bin Debug\Exe\ram_all.bin
)
:: board generator
%tooldir%\..\gen_board.bat %ram2_start% %ram2_end% %ram1_start%
exit

5
component/soc/realtek/8195a/misc/iar_utility/common/postbuild.vbs Executable file
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Dim WshShell
Set WshShell = WScript.CreateObject("WScript.Shell")
WshShell.Run "cmd /c "+WScript.Arguments.Item(1)+"\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\postbuild.bat "+WScript.Arguments.Item(0)+" "+WScript.Arguments.Item(1), 0

33
component/soc/realtek/8195a/misc/iar_utility/common/postbuild_img1.bat Executable file
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@ -0,0 +1,33 @@
cd /D %2
set tooldir=%2\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\tools
set libdir=%2\..\..\..\component\soc\realtek\8195a\misc\bsp
del Debug/Exe/bootloader.map Debug/Exe/bootloader.asm *.bin
cmd /c "%tooldir%\nm Debug/Exe/bootloader.axf | %tooldir%\sort > Debug/Exe/bootloader.map"
cmd /c "%tooldir%\objdump -d Debug/Exe/bootloader.axf > Debug/Exe/bootloader.asm"
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE1 Debug/Exe/bootloader.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram1_start=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE1 Debug/Exe/bootloader.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram1_end=0x%%i
::echo %ram1_start% > tmp.txt
::echo %ram2_start% >> tmp.txt
::echo %ram3_start% >> tmp.txt
::echo %ram1_end% >> tmp.txt
::echo %ram2_end% >> tmp.txt
::echo %ram3_end% >> tmp.txt
%tooldir%\objcopy -j "A2 rw" -Obinary Debug/Exe/bootloader.axf Debug/Exe/ram_1.bin
::%tooldir%\objcopy -j "A3 rw" -Obinary Debug/Exe/bootloader.axf Debug/Exe/sdram.bin
%tooldir%\pick %ram1_start% %ram1_end% Debug\Exe\ram_1.bin Debug\Exe\ram_1.p.bin head 0xb000
%tooldir%\pick %ram1_start% %ram1_end% Debug\Exe\ram_1.bin Debug\Exe\ram_1.r.bin raw
:: update ram_1.p.bin, raw file for application
copy Debug\Exe\ram_1.p.bin %libdir%\image\ram_1.p.bin
copy Debug\Exe\ram_1.r.bin %libdir%\image\ram_1.r.bin
:: delete hal_spi_flash_ram.o object after image built
del Debug\Obj\hal_spi_flash_ram.*
exit

5
component/soc/realtek/8195a/misc/iar_utility/common/postbuild_img1.vbs Executable file
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@ -0,0 +1,5 @@
Dim WshShell
Set WshShell = WScript.CreateObject("WScript.Shell")
WshShell.Run "cmd /c "+WScript.Arguments.Item(1)+"\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\postbuild_img1.bat "+WScript.Arguments.Item(0)+" "+WScript.Arguments.Item(1), 0

77
component/soc/realtek/8195a/misc/iar_utility/common/postbuild_img2.bat Executable file
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@ -0,0 +1,77 @@
cd /D %2
set tooldir=%2\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\tools
set libdir=%2\..\..\..\component\soc\realtek\8195a\misc\bsp
set cfgdir=%3
echo config %3
del %cfgdir%/Exe/target.map %cfgdir%/Exe/application.asm *.bin
cmd /c "%tooldir%\nm %cfgdir%/Exe/application.axf | %tooldir%\sort > %cfgdir%/Exe/application.map"
cmd /c "%tooldir%\objdump -d %cfgdir%/Exe/application.axf > %cfgdir%/Exe/application.asm"
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE2 %cfgdir%/Exe/application.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram2_start=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep SDRAM %cfgdir%/Exe/application.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram3_start=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep FLASH_RUN %cfgdir%/Exe/application.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set flash_run_start=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE2 %cfgdir%/Exe/application.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram2_end=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep SDRAM %cfgdir%/Exe/application.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram3_end=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep FLASH_RUN %cfgdir%/Exe/application.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set flash_run_end=0x%%i
::echo %ram1_start% > tmp.txt
::echo %ram2_start% >> tmp.txt
::echo %ram3_start% >> tmp.txt
::echo %ram1_end% >> tmp.txt
::echo %ram2_end% >> tmp.txt
::echo %ram3_end% >> tmp.txt
%tooldir%\objcopy -j "A3 rw" -Obinary %cfgdir%/Exe/application.axf %cfgdir%/Exe/ram_2.bin
if defined %ram3_start (
%tooldir%\objcopy -j "A5 rw" -Obinary %cfgdir%/Exe/application.axf %cfgdir%/Exe/sdram.bin
)
if defined %flash_run_start (
%tooldir%\objcopy -j "A7 rw" -Obinary %cfgdir%/Exe/application.axf %cfgdir%/Exe/flash_run.bin
) else (
set flash_run_start=0xFFFFFFFF
set flash_run_end=0xFFFFFFFF
)
%tooldir%\pick %ram2_start% %ram2_end% %cfgdir%\Exe\ram_2.bin %cfgdir%\Exe\ram_2.p.bin body+reset_offset+sig
%tooldir%\pick %ram2_start% %ram2_end% %cfgdir%\Exe\ram_2.bin %cfgdir%\Exe\ram_2.ns.bin body+reset_offset
if defined %ram3_start (
%tooldir%\pick %ram3_start% %ram3_end% %cfgdir%\Exe\sdram.bin %cfgdir%\Exe\ram_3.p.bin body+reset_offset
)
:: force update ram_1.p.bin
del %cfgdir%\Exe\ram_1.p.bin
:: check ram_1.p.bin exist, copy default
if not exist %cfgdir%\Exe\ram_1.p.bin (
copy %libdir%\image\ram_1.p.bin %cfgdir%\Exe\ram_1.p.bin
)
::if not exist %cfgdir%\Exe\data.p.bin (
:: copy %tooldir%\..\image\data.p.bin %cfgdir%\Exe\data.p.bin
::)
::padding ram_1.p.bin to 32K+4K+4K+4K, LOADER/RSVD/SYSTEM/CALIBRATION
%tooldir%\padding 44k 0xFF %cfgdir%\Exe\ram_1.p.bin
:: SDRAM case
if defined %ram3_start (
copy /b %cfgdir%\Exe\ram_1.p.bin+%cfgdir%\Exe\ram_2.p.bin+%cfgdir%\Exe\ram_3.p.bin %cfgdir%\Exe\ram_all.bin
copy /b %cfgdir%\Exe\ram_2.ns.bin+%cfgdir%\Exe\ram_3.p.bin %cfgdir%\Exe\ota.bin
)
:: NO SDRAM case
if not defined %ram3_start (
copy /b %cfgdir%\Exe\ram_1.p.bin+%cfgdir%\Exe\ram_2.p.bin %cfgdir%\Exe\ram_all.bin
copy /b %cfgdir%\Exe\ram_2.ns.bin %cfgdir%\Exe\ota.bin
set ram3_end=0xFFFFFFFF
)
%tooldir%\checksum %cfgdir%\Exe\ota.bin
:: board generator
%tooldir%\..\gen_board_img2.bat %ram2_start% %ram2_end% %ram3_end% %flash_run_start% %flash_run_end%
exit

5
component/soc/realtek/8195a/misc/iar_utility/common/postbuild_img2.vbs Executable file
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Dim WshShell
Set WshShell = WScript.CreateObject("WScript.Shell")
WshShell.Run "cmd /c "+WScript.Arguments.Item(1)+"\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\postbuild_img2.bat "+WScript.Arguments.Item(0)+" "+WScript.Arguments.Item(1)+" "+WScript.Arguments.Item(2), 0

61
component/soc/realtek/8195a/misc/iar_utility/common/postbuild_img2_gcc.bat Executable file
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cd /D %2
set bindir=application/Debug/bin
set bindirw=application\Debug\bin
set tooldir=%2\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\tools
set libdir=%2\..\..\..\component\soc\realtek\8195a\misc\bsp
echo %tooldir%
echo %libdir%
::del Debug/Exe/target.map Debug/Exe/application.asm *.bin
cmd /c "%tooldir%\nm %bindir%/application.elf | %tooldir%\sort > %bindir%/application.nm.map"
cmd /c "%tooldir%\objdump -d %bindir%/application.elf > %bindir%/application.asm"
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep __ram_image2_text_start__ %bindir%/application.nm.map | %tooldir%\gawk '{print $1}'"') do set ram2_start=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep __sdram_data_start__ %bindir%/application.nm.map | %tooldir%\gawk '{print $1}'"') do set ram3_start=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep __ram_image2_text_end__ %bindir%/application.nm.map | %tooldir%\gawk '{print $1}'"') do set ram2_end=0x%%i
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep __sdram_data_end__ %bindir%/application.nm.map | %tooldir%\gawk '{print $1}'"') do set ram3_end=0x%%i
::echo %ram1_start% > tmp.txt
echo %ram2_start%
echo %ram3_start%
::echo %ram1_end% >> tmp.txt
echo %ram2_end%
echo %ram3_end%
%tooldir%\objcopy -j .image2.start.table -j .ram_image2.text -j .ram.data -Obinary %bindir%/application.elf %bindir%/ram_2.bin
if NOT %ram3_start% == %ram3_end% (
%tooldir%\objcopy -j .sdr_data -Obinary %bindir%/application.elf %bindir%/sdram.bin
)
%tooldir%\pick %ram2_start% %ram2_end% %bindirw%\ram_2.bin %bindirw%\ram_2.p.bin body+reset_offset+sig
if defined %ram3_start (
%tooldir%\pick %ram3_start% %ram3_end% %bindirw%\sdram.bin %bindirw%\ram_3.p.bin body+reset_offset
)
:: check ram_1.p.bin exist, copy default
if not exist %bindirw%\ram_1.p.bin (
copy %libdir%\image\ram_1.p.bin %bindirw%\ram_1.p.bin
)
::padding ram_1.p.bin to 32K+4K+4K+4K, LOADER/RSVD/SYSTEM/CALIBRATION
%tooldir%\padding 44k 0xFF %bindirw%\ram_1.p.bin
:: SDRAM case
if defined %ram3_start (
copy /b %bindirw%\ram_1.p.bin+%bindirw%\ram_2.p.bin+%bindirw%\ram_3.p.bin %bindirw%\ram_all.bin
copy /b %bindirw%\ram_2.p.bin+%bindirw%\ram_3.p.bin %bindirw%\ota.bin
)
%tooldir%\checksum Debug\Exe\ota.bin
:: NO SDRAM case
if not defined %ram3_start (
copy /b %bindirw%\ram_1.p.bin+%bindirw%\ram_2.p.bin %bindirw%\ram_all.bin
copy /b %bindirw%\ram_2.p.bin %bindirw%\ota.bin
)
exit

17
component/soc/realtek/8195a/misc/iar_utility/common/prebuild.bat Executable file
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cd /D %1
:: Generate build_info.h
echo off
::echo %date:~0,10%-%time:~0,8%
::echo %USERNAME%
for /f "usebackq" %%i in (`hostname`) do set hostname=%%i
::echo %hostname%
echo #define UTS_VERSION "%date:~0,10%-%time:~0,8%" > ..\inc\build_info.h
echo #define RTL8195AFW_COMPILE_TIME "%date:~0,10%-%time:~0,8%" >> ..\inc\build_info.h
echo #define RTL8195AFW_COMPILE_BY "%USERNAME%" >> ..\inc\build_info.h
echo #define RTL8195AFW_COMPILE_HOST "%hostname%" >> ..\inc\build_info.h
echo #define RTL8195AFW_COMPILE_DOMAIN >> ..\inc\build_info.h
echo #define RTL195AFW_COMPILER "IAR compiler" >> ..\inc\build_info.h
exit

5
component/soc/realtek/8195a/misc/iar_utility/common/prebuild.vbs Executable file
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Dim WshShell
Set WshShell = WScript.CreateObject("WScript.Shell")
WshShell.Run "cmd /c "+WScript.Arguments.Item(0)+"\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\prebuild.bat "+WScript.Arguments.Item(0), 0

372
component/soc/realtek/8195a/misc/iar_utility/common/preload.dap.mac Executable file
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//DRAM_INFO
__var DeviceType;
__var Page;
__var Bank;
__var DqWidth;
//DRAM_MODE_REG_INFO
__var BstLen;
__var BstType;
__var Mode0Cas;
__var Mode0Wr;
__var Mode1DllEnN;
__var Mode1AllLat;
__var Mode2Cwl;
//DRAM_TIMING_INFO, additional parameter, to config DRAM_TIMING INFO
__var DramTimingTref;
__var DramRowNum;
__var Tck;
//DRAM_TIMING_INFO
__var TrfcPs;
__var TrefiPs;
__var WrMaxTck;
__var TrcdPs;
__var TrpPs;
__var TrasPs;
__var TrrdTck;
__var TwrPs;
__var TwtrTck;
__var TmrdTck;
__var TrtpTck;
__var TccdTck;
__var TrcPs;
//DRAM_DEVICE_INFO
__var DdrPeriodPs;
__var DfiRate;
__config_dram_param(){
__var CsBstLen;
__var CasWr;
__var CasRd;
__var CasRdT;
__var ClrSrt;
__var AddLat;
__var DramEmr2;
__var DramMr0;
__var CrTwr;
__var DramMaxWr;
__var DramWr;
__var CrTrtw;
__var CrTrtwT;
__var DramPeriod;
__var DdrType;
//__var paDqWidth;
//__var paPage;
//__var paDfiRate
__var tmp;
// Register dram common.mac
//__registerMacroFile("$PROJ_DIR$\\..\\..\\..\\component\\soc\\realtek\\8195a\\misc\\iar_utility\\common\\dram\\common.mac");
__load_dram_common();
// Load parameter
__load_dram_param();
DfiRate = 1<<DfiRate;
DramPeriod = DdrPeriodPs*DfiRate;
DramMaxWr= (WrMaxTck)/(DfiRate) +1;
DramWr = ((TwrPs) / DramPeriod)+1;
CrTwr = ((TwrPs) / DramPeriod) + 3;
if (CrTwr < DramMaxWr) {
CrTwr = CrTwr;
}else {
CrTwr = DramMaxWr;
}
if(DeviceType==2){ // Case DDR2
DdrType = 2;
if (BstLen == 0){
CsBstLen = 0;
CrTrtwT = 4;
DramMr0 = 2;
}else{
CsBstLen = 1;
CrTrtwT = 6;
DramMr0 = 3;
}
CasRd = Mode0Cas;
AddLat = Mode1AllLat;
CasWr = CasRd + AddLat -1;
DramEmr2 = 0;
DramMr0 =(((DramWr%6)-1)<<(8+1))|(0<<8)|(Mode0Cas<<4)|(BstType<<3)|DramMr0;
}
if(DeviceType==3){ // Case DDR3
DdrType = 3;
if (BstLen==0){
CsBstLen = 0; //bst_4
DramMr0 = 2;
}else{
CsBstLen = 1; // bst_8
DramMr0 = 0;
}
CrlSrt = (Mode0Cas >> 1);
if (((Mode0Cas) & 0x1) ) {
CasRdT = CrlSrt+ 12;
}else{
CasRdT = CrlSrt+ 4;
}
AddLat = 0;
if (Mode1AllLat == 1) { // CL-1
AddLat = CasRd -1;
}
if (Mode1AllLat == 2){ // CL-2
AddLat = CasRd -2;
}
CasRd = CasRdT + AddLat;
CasWr = Mode2Cwl + 5 + AddLat;
DramEmr2 = Mode2Cwl << 3;
DramWr = (DramWr + 1) / 2;
if (DramWr == 16) {
DramWr = 0;
}
if (DramWr <= 9) { // 5< wr <= 9
DramWr = DramWr - 4;
}
DramMr0 =(DramWr<<(8+1))|(0<<8)|((Mode0Cas>>1)<<4)|(BstType<<3)|((Mode0Cas&0x1)<<2)|DramMr0;
CrTrtwT = (CasRdT + 6) - CasWr;
}
if (DeviceType == 8){
DdrType = 8;
if (BstLen == 0) {
DramMr0 = 2; // bst_4
CsBstLen = 0; //bst_4
CasRd = 0x2;
} else {
DramMr0 = 3; // bst_8
CsBstLen = 1; // bst_8
CasRd = 0x3;
}
CasWr = 0;
DramMr0 =(CasRd<<4)|(BstType<<3)|DramMr0;
CrTrtwT = 0; // tic: CasRd + rd_rtw + rd_pipe
}
// countting tRTW
if ((CrTrtwT & 0x1)) {
CrTrtw = (CrTrtwT+1) /(DfiRate);
} else {
CrTrtw = CrTrtwT /(DfiRate);
}
DqWidth = DqWidth;
Page = Page +1; // DQ16 -> memory:byte_unit *2
if (DqWidth == 1) { // paralle dq_16 => Page + 1
Page = Page +1;
}
// REG_SDR_MISC
tmp =(Page<<0)|(Bank<<4)|(CsBstLen<<6)|(DqWidth<<8);
__writeMemory32(tmp, 0x40005224, "Memory"); __delay(10);
// REG_SDR_DCR
tmp =(0x2<<8)|(DqWidth<<4)|(DdrType<<0);
__writeMemory32(tmp, 0x40005004, "Memory"); __delay(10);
// REG_SDR_IOCR
tmp =((CasRd-4)/(DfiRate)<<20)|(0<<17)|(((CasWr-3)/(DfiRate))<<12)|(0<<8);
__writeMemory32(tmp, 0x40005008, "Memory"); __delay(10);
if(DeviceType != 8){
tmp =DramEmr2;
__writeMemory32(tmp, 0x40005028, "Memory"); __delay(10);
tmp =(1<<2)|(1<<1)|(Mode1DllEnN);
__writeMemory32(tmp, 0x40005024, "Memory"); __delay(10);
}
tmp =DramMr0;
__writeMemory32(tmp, 0x40005020, "Memory"); __delay(10);
tmp =(0<<28)|(9<<24)|((((TrefiPs)/DramPeriod)+1)<<8)|((((TrfcPs)/DramPeriod)+1)<<0);
__writeMemory32(tmp, 0x40005010, "Memory"); __delay(10);
tmp =((((TrtpTck)/DfiRate)+1)<<13)|(CrTwr<<9)|((((TrasPs)/DramPeriod)+1)<<4)|((((TrpPs)/DramPeriod)+1)<<0);
__writeMemory32(tmp, 0x40005014, "Memory"); __delay(10);
tmp =(CrTrtw << 20) |
((((TwtrTck)/DfiRate)+3) << 17) |
((((TccdTck)/DfiRate)+1) << 14) |
((((TrcdPs)/DramPeriod)+1) << 10) |
((((TrcPs)/DramPeriod)+1) << 4 ) |
(((TrrdTck/DfiRate)+1) << 0);
__writeMemory32(tmp, 0x40005018, "Memory"); __delay(10);
tmp =(TmrdTck<<5)|(0<<4)|(2<<0);
__writeMemory32(tmp, 0x4000501c, "Memory"); __delay(10);
// Set Idle
__writeMemory32(0x700, 0x4000500c, "Memory"); __delay(10);
// start init
__writeMemory32(0x1, 0x40005000, "Memory"); __delay(100);
tmp = __readMemory32(0x40005000,"Memory"); __delay(10);
// enter memory mode
__writeMemory32(0x600, 0x4000500c, "Memory"); __delay(10);
}
__config_dram_param_fixed(){
__var tmp;
// Dram Attribute
__writeMemory32(0x1, 0x40005224, "Memory"); __delay(10);
__writeMemory32(0x2c8, 0x40005004, "Memory"); __delay(10);
__writeMemory32(0xffffd000, 0x40005008, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x22, 0x40005020, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x09032001, 0x40005010, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x2611, 0x40005014, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x68413, 0x40005018, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x42, 0x4000501c, "Memory"); __delay(10);
__delay(3);
// Enable
__writeMemory32(0x700, 0x4000500c, "Memory"); __delay(10);
__delay(20);
__writeMemory32(0x1, 0x40005000, "Memory"); __delay(10);
__delay(100);
tmp = __readMemory32(0x40005000,"Memory"); __delay(10);
__writeMemory32(0x600, 0x4000500c, "Memory"); __delay(10);
__delay(30);
}
__mem_test(){
__var i;
__var vaddr;
__var tmp;
i=0;
while(i<10){
vaddr = 0x30000000+((i*23)&0x1FFFFC);
__writeMemory32(0x55AA55AA, vaddr, "Memory");
tmp = __readMemory32(vaddr,"Memory");
if(tmp!=0x55AA55AA)
return 1;
i=i+1;
}
return 0;
}
__var ok_pipe_id0;
__var ok_pipe_id1;
__var ok_tpc_min0;
__var ok_tpc_max0;
__var ok_tpc_min1;
__var ok_tpc_max1;
__var tpc0_cnt;
__var tpc1_cnt;
// calibration result
__var isCalibrationDone;
__dram_calibration(){
__var rdp;
__var tpc;
__var rdp_reg;
__var tpc_reg;
__var err_cnt;
__var ok_cnt;
ok_cnt=0;
ok_pipe_id0 = 15;
ok_tpc_min0 = 12;
ok_tpc_max0 = 0;
rdp_reg = __readMemory32(0x40005008,"Memory")&0xFFFF00FF;
tpc_reg = __readMemory32(0x40000300,"Memory")&0xFF00FFFF;
for(rdp=0;(rdp<=7)&&(err_cnt==0||ok_cnt==0);rdp++){
err_cnt=0;
// try pipe
__writeMemory32(rdp_reg|rdp<<8,0x40005008, "Memory");__delay(10);
for(tpc=0;(tpc<=12)&&(err_cnt<2);tpc++){
// try tpc
__writeMemory32(tpc_reg|tpc<<16,0x40000300, "Memory");__delay(10);
if(__mem_test()==0){
if(ok_pipe_id0==15) {ok_pipe_id0 = rdp; ok_cnt++;}
if(ok_tpc_min0>tpc) ok_tpc_min0 = tpc;
if(ok_tpc_max0<tpc) ok_tpc_max0 = tpc;
}else{
err_cnt++;
}
}
if(ok_pipe_id0!=15){
ok_pipe_id1 = ok_pipe_id0;
ok_tpc_min1 = ok_tpc_min0;
ok_tpc_max1 = ok_tpc_max0;
ok_pipe_id0 = 15;
ok_tpc_min0 = 12;
ok_tpc_max0 = 0;
}
}
tpc0_cnt = ok_tpc_max0-ok_tpc_min0;
if(tpc0_cnt<0) tpc0_cnt = 0;
tpc1_cnt = ok_tpc_max1-ok_tpc_min1;
if(tpc1_cnt<0) tpc1_cnt = 0;
if(tpc1_cnt>tpc0_cnt){
__writeMemory32(rdp_reg|ok_pipe_id1<<8,0x40005008, "Memory");__delay(10);
__writeMemory32(tpc_reg|(tpc1_cnt/2)<<16,0x40000300, "Memory");__delay(10);
}else{
__writeMemory32(rdp_reg|ok_pipe_id0<<8,0x40005008, "Memory");__delay(10);
__writeMemory32(tpc_reg|(tpc0_cnt/2)<<16,0x40000300, "Memory");__delay(10);
}
}
__setup_system()
{
__var tmp;
__hwReset(1);
__writeMemory32(0x21, 0x40000014, "Memory"); __delay(10);
__writeMemory32(0x1FC00002, 0x40000304, "Memory"); __delay(10);
__writeMemory32(0x400, 0x40000250, "Memory"); __delay(10);
__writeMemory32(0x0, 0x40000340, "Memory"); __delay(10);
__writeMemory32(0xdcc4, 0x40000230, "Memory"); __delay(10);
__writeMemory32(0x11117, 0x40000210, "Memory"); __delay(10);
__writeMemory32(0x11157, 0x40000210, "Memory"); __delay(10);
__writeMemory32(0x110011, 0x400002c0, "Memory"); __delay(10);
__writeMemory32(0xffffffff, 0x40000320, "Memory"); __delay(10);
__config_dram_param();
if(isCalibrationDone){
__var rdp_reg;
__var tpc_reg;
rdp_reg = __readMemory32(0x40005008,"Memory")&0xFFFF00FF;
tpc_reg = __readMemory32(0x40000300,"Memory")&0xFF00FFFF;
if(tpc1_cnt>tpc0_cnt){
__writeMemory32(rdp_reg|ok_pipe_id1<<8,0x40005008, "Memory");__delay(10);
__writeMemory32(tpc_reg|(tpc1_cnt/2)<<16,0x40000300, "Memory");__delay(10);
}else{
__writeMemory32(rdp_reg|ok_pipe_id0<<8,0x40005008, "Memory");__delay(10);
__writeMemory32(tpc_reg|(tpc0_cnt/2)<<16,0x40000300, "Memory");__delay(10);
}
}else{
// Calibration
__dram_calibration();
isCalibrationDone = 1;
}
}
execUserPreload()
{
// Register dram common.mac
__registerMacroFile("$PROJ_DIR$\\..\\..\\..\\component\\soc\\realtek\\8195a\\misc\\iar_utility\\common\\dram\\common.mac");
__message "User Preload....";
//isCalibrationDone = 0;
__setup_system();
}
execUserSetup()
{
__var tmp;
__message "User Setup....";
// if use normal reset, please unmark those 2 lines
//execUserPreload();
__setup_system();
//__loadImage("$TARGET_PATH$", 0, 0);
// DISABLE DRAM init
tmp = __readMemory32(0x40000210, "Memory")|(1<<21);
__writeMemory32(tmp, 0x40000210, "Memory");
}

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component/soc/realtek/8195a/misc/iar_utility/common/preload.mac Executable file
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//DRAM_INFO
__var DeviceType;
__var Page;
__var Bank;
__var DqWidth;
//DRAM_MODE_REG_INFO
__var BstLen;
__var BstType;
__var Mode0Cas;
__var Mode0Wr;
__var Mode1DllEnN;
__var Mode1AllLat;
__var Mode2Cwl;
//DRAM_TIMING_INFO, additional parameter, to config DRAM_TIMING INFO
__var DramTimingTref;
__var DramRowNum;
__var Tck;
//DRAM_TIMING_INFO
__var TrfcPs;
__var TrefiPs;
__var WrMaxTck;
__var TrcdPs;
__var TrpPs;
__var TrasPs;
__var TrrdTck;
__var TwrPs;
__var TwtrTck;
__var TmrdTck;
__var TrtpTck;
__var TccdTck;
__var TrcPs;
//DRAM_DEVICE_INFO
__var DdrPeriodPs;
__var DfiRate;
__config_dram_param(){
__var CsBstLen;
__var CasWr;
__var CasRd;
__var CasRdT;
__var ClrSrt;
__var AddLat;
__var DramEmr2;
__var DramMr0;
__var CrTwr;
__var DramMaxWr;
__var DramWr;
__var CrTrtw;
__var CrTrtwT;
__var DramPeriod;
__var DdrType;
//__var paDqWidth;
//__var paPage;
//__var paDfiRate
__var tmp;
// Register dram common.mac
//__registerMacroFile("$PROJ_DIR$\\..\\..\\..\\component\\soc\\realtek\\8195a\\misc\\iar_utility\\common\\dram\\common.mac");
__load_dram_common();
// Load parameter
__load_dram_param();
DfiRate = 1<<DfiRate;
DramPeriod = DdrPeriodPs*DfiRate;
DramMaxWr= (WrMaxTck)/(DfiRate) +1;
DramWr = ((TwrPs) / DramPeriod)+1;
CrTwr = ((TwrPs) / DramPeriod) + 3;
if (CrTwr < DramMaxWr) {
CrTwr = CrTwr;
}else {
CrTwr = DramMaxWr;
}
if(DeviceType==2){ // Case DDR2
DdrType = 2;
if (BstLen == 0){
CsBstLen = 0;
CrTrtwT = 4;
DramMr0 = 2;
}else{
CsBstLen = 1;
CrTrtwT = 6;
DramMr0 = 3;
}
CasRd = Mode0Cas;
AddLat = Mode1AllLat;
CasWr = CasRd + AddLat -1;
DramEmr2 = 0;
DramMr0 =(((DramWr%6)-1)<<(8+1))|(0<<8)|(Mode0Cas<<4)|(BstType<<3)|DramMr0;
}
if(DeviceType==3){ // Case DDR3
DdrType = 3;
if (BstLen==0){
CsBstLen = 0; //bst_4
DramMr0 = 2;
}else{
CsBstLen = 1; // bst_8
DramMr0 = 0;
}
CrlSrt = (Mode0Cas >> 1);
if (((Mode0Cas) & 0x1) ) {
CasRdT = CrlSrt+ 12;
}else{
CasRdT = CrlSrt+ 4;
}
AddLat = 0;
if (Mode1AllLat == 1) { // CL-1
AddLat = CasRd -1;
}
if (Mode1AllLat == 2){ // CL-2
AddLat = CasRd -2;
}
CasRd = CasRdT + AddLat;
CasWr = Mode2Cwl + 5 + AddLat;
DramEmr2 = Mode2Cwl << 3;
DramWr = (DramWr + 1) / 2;
if (DramWr == 16) {
DramWr = 0;
}
if (DramWr <= 9) { // 5< wr <= 9
DramWr = DramWr - 4;
}
DramMr0 =(DramWr<<(8+1))|(0<<8)|((Mode0Cas>>1)<<4)|(BstType<<3)|((Mode0Cas&0x1)<<2)|DramMr0;
CrTrtwT = (CasRdT + 6) - CasWr;
}
if (DeviceType == 8){
DdrType = 8;
if (BstLen == 0) {
DramMr0 = 2; // bst_4
CsBstLen = 0; //bst_4
CasRd = 0x2;
} else {
DramMr0 = 3; // bst_8
CsBstLen = 1; // bst_8
CasRd = 0x3;
}
CasWr = 0;
DramMr0 =(CasRd<<4)|(BstType<<3)|DramMr0;
CrTrtwT = 0; // tic: CasRd + rd_rtw + rd_pipe
}
// countting tRTW
if ((CrTrtwT & 0x1)) {
CrTrtw = (CrTrtwT+1) /(DfiRate);
} else {
CrTrtw = CrTrtwT /(DfiRate);
}
DqWidth = DqWidth;
Page = Page +1; // DQ16 -> memory:byte_unit *2
if (DqWidth == 1) { // paralle dq_16 => Page + 1
Page = Page +1;
}
// REG_SDR_MISC
tmp =(Page<<0)|(Bank<<4)|(CsBstLen<<6)|(DqWidth<<8);
__writeMemory32(tmp, 0x40005224, "Memory"); __delay(10);
// REG_SDR_DCR
tmp =(0x2<<8)|(DqWidth<<4)|(DdrType<<0);
__writeMemory32(tmp, 0x40005004, "Memory"); __delay(10);
// REG_SDR_IOCR
tmp =((CasRd-4)/(DfiRate)<<20)|(0<<17)|(((CasWr-3)/(DfiRate))<<12)|(0<<8);
__writeMemory32(tmp, 0x40005008, "Memory"); __delay(10);
if(DeviceType != 8){
tmp =DramEmr2;
__writeMemory32(tmp, 0x40005028, "Memory"); __delay(10);
tmp =(1<<2)|(1<<1)|(Mode1DllEnN);
__writeMemory32(tmp, 0x40005024, "Memory"); __delay(10);
}
tmp =DramMr0;
__writeMemory32(tmp, 0x40005020, "Memory"); __delay(10);
tmp =(0<<28)|(9<<24)|((((TrefiPs)/DramPeriod)+1)<<8)|((((TrfcPs)/DramPeriod)+1)<<0);
__writeMemory32(tmp, 0x40005010, "Memory"); __delay(10);
tmp =((((TrtpTck)/DfiRate)+1)<<13)|(CrTwr<<9)|((((TrasPs)/DramPeriod)+1)<<4)|((((TrpPs)/DramPeriod)+1)<<0);
__writeMemory32(tmp, 0x40005014, "Memory"); __delay(10);
tmp =(CrTrtw << 20) |
((((TwtrTck)/DfiRate)+3) << 17) |
((((TccdTck)/DfiRate)+1) << 14) |
((((TrcdPs)/DramPeriod)+1) << 10) |
((((TrcPs)/DramPeriod)+1) << 4 ) |
(((TrrdTck/DfiRate)+1) << 0);
__writeMemory32(tmp, 0x40005018, "Memory"); __delay(10);
tmp =(TmrdTck<<5)|(0<<4)|(2<<0);
__writeMemory32(tmp, 0x4000501c, "Memory"); __delay(10);
// Set Idle
__writeMemory32(0x700, 0x4000500c, "Memory"); __delay(10);
// start init
__writeMemory32(0x1, 0x40005000, "Memory"); __delay(100);
tmp = __readMemory32(0x40005000,"Memory"); __delay(10);
// enter memory mode
__writeMemory32(0x600, 0x4000500c, "Memory"); __delay(10);
}
__config_dram_param_fixed(){
__var tmp;
// Dram Attribute
__writeMemory32(0x1, 0x40005224, "Memory"); __delay(10);
__writeMemory32(0x2c8, 0x40005004, "Memory"); __delay(10);
__writeMemory32(0xffffd000, 0x40005008, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x22, 0x40005020, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x09032001, 0x40005010, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x2611, 0x40005014, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x68413, 0x40005018, "Memory"); __delay(10);
__delay(3);
__writeMemory32(0x42, 0x4000501c, "Memory"); __delay(10);
__delay(3);
// Enable
__writeMemory32(0x700, 0x4000500c, "Memory"); __delay(10);
__delay(20);
__writeMemory32(0x1, 0x40005000, "Memory"); __delay(10);
__delay(100);
tmp = __readMemory32(0x40005000,"Memory"); __delay(10);
__writeMemory32(0x600, 0x4000500c, "Memory"); __delay(10);
__delay(30);
}
__mem_test(){
__var i;
__var vaddr;
__var tmp;
i=0;
while(i<10){
vaddr = 0x30000000+((i*23)&0x1FFFFC);
__writeMemory32(0x55AA55AA, vaddr, "Memory");
tmp = __readMemory32(vaddr,"Memory");
if(tmp!=0x55AA55AA)
return 1;
i=i+1;
}
return 0;
}
__var ok_pipe_id0;
__var ok_pipe_id1;
__var ok_tpc_min0;
__var ok_tpc_max0;
__var ok_tpc_min1;
__var ok_tpc_max1;
__var tpc0_cnt;
__var tpc1_cnt;
// calibration result
__var isCalibrationDone;
__dram_calibration(){
__var rdp;
__var tpc;
__var rdp_reg;
__var tpc_reg;
__var err_cnt;
__var ok_cnt;
ok_cnt=0;
ok_pipe_id0 = 15;
ok_tpc_min0 = 12;
ok_tpc_max0 = 0;
rdp_reg = __readMemory32(0x40005008,"Memory")&0xFFFF00FF;
tpc_reg = __readMemory32(0x40000300,"Memory")&0xFF00FFFF;
for(rdp=0;(rdp<=7)&&(err_cnt==0||ok_cnt==0);rdp++){
err_cnt=0;
// try pipe
__writeMemory32(rdp_reg|rdp<<8,0x40005008, "Memory");__delay(10);
for(tpc=0;(tpc<=12)&&(err_cnt<2);tpc++){
// try tpc
__writeMemory32(tpc_reg|tpc<<16,0x40000300, "Memory");__delay(10);
if(__mem_test()==0){
if(ok_pipe_id0==15) {ok_pipe_id0 = rdp; ok_cnt++;}
if(ok_tpc_min0>tpc) ok_tpc_min0 = tpc;
if(ok_tpc_max0<tpc) ok_tpc_max0 = tpc;
}else{
err_cnt++;
}
}
if(ok_pipe_id0!=15){
ok_pipe_id1 = ok_pipe_id0;
ok_tpc_min1 = ok_tpc_min0;
ok_tpc_max1 = ok_tpc_max0;
ok_pipe_id0 = 15;
ok_tpc_min0 = 12;
ok_tpc_max0 = 0;
}
}
tpc0_cnt = ok_tpc_max0-ok_tpc_min0;
if(tpc0_cnt<0) tpc0_cnt = 0;
tpc1_cnt = ok_tpc_max1-ok_tpc_min1;
if(tpc1_cnt<0) tpc1_cnt = 0;
if(tpc1_cnt>tpc0_cnt){
__writeMemory32(rdp_reg|ok_pipe_id1<<8,0x40005008, "Memory");__delay(10);
__writeMemory32(tpc_reg|(tpc1_cnt/2)<<16,0x40000300, "Memory");__delay(10);
}else{
__writeMemory32(rdp_reg|ok_pipe_id0<<8,0x40005008, "Memory");__delay(10);
__writeMemory32(tpc_reg|(tpc0_cnt/2)<<16,0x40000300, "Memory");__delay(10);
}
}
__setup_system()
{
__var tmp;
__hwReset(1);
__writeMemory32(0x21, 0x40000014, "Memory"); __delay(10);
__writeMemory32(0x1FC00002, 0x40000304, "Memory"); __delay(10);
__writeMemory32(0x400, 0x40000250, "Memory"); __delay(10);
__writeMemory32(0x0, 0x40000340, "Memory"); __delay(10);
__writeMemory32(0xdcc4, 0x40000230, "Memory"); __delay(10);
__writeMemory32(0x11117, 0x40000210, "Memory"); __delay(10);
__writeMemory32(0x11157, 0x40000210, "Memory"); __delay(10);
__writeMemory32(0x110011, 0x400002c0, "Memory"); __delay(10);
__writeMemory32(0xffffffff, 0x40000320, "Memory"); __delay(10);
__config_dram_param();
if(isCalibrationDone){
__var rdp_reg;
__var tpc_reg;
rdp_reg = __readMemory32(0x40005008,"Memory")&0xFFFF00FF;
tpc_reg = __readMemory32(0x40000300,"Memory")&0xFF00FFFF;
if(tpc1_cnt>tpc0_cnt){
__writeMemory32(rdp_reg|ok_pipe_id1<<8,0x40005008, "Memory");__delay(10);
__writeMemory32(tpc_reg|(tpc1_cnt/2)<<16,0x40000300, "Memory");__delay(10);
}else{
__writeMemory32(rdp_reg|ok_pipe_id0<<8,0x40005008, "Memory");__delay(10);
__writeMemory32(tpc_reg|(tpc0_cnt/2)<<16,0x40000300, "Memory");__delay(10);
}
}else{
// Calibration
__dram_calibration();
isCalibrationDone = 1;
}
}
execUserPreload()
{
// Register dram common.mac
__registerMacroFile("$PROJ_DIR$\\..\\..\\..\\component\\soc\\realtek\\8195a\\misc\\iar_utility\\common\\dram\\common.mac");
__message "User Preload....";
if(__driverType("jlink")){
__message "driver type J-LINK";
isCalibrationDone = 0;
}else if(__driverType("cmsisdap") || __driverType("ijet")){
__message "driver type CMSIS-DAP or I-JET";
}
__setup_system();
}
execUserSetup()
{
__var tmp;
__message "User Setup....";
// if use normal reset, please unmark those 2 lines
//execUserPreload();
__setup_system();
if(__driverType("jlink")){
__loadImage("$TARGET_PATH$ ", 0, 0);
tmp = __readMemory32(0x40000210, "Memory")|(1<<27);
}else if(__driverType("cmsisdap") || __driverType("ijet")){
tmp = __readMemory32(0x40000210, "Memory")|(1<<21);
}else{
__message "Not support drive type";
}
__writeMemory32(tmp, 0x40000210, "Memory");
}

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/*
* rtl_lib.h
*
* Definitions for RTL library functions
*/
#ifndef _RTL_LIB_ROM_H_
#define _RTL_LIB_ROM_H_
#include <basic_types.h>
#include <diag.h>
#include <reent.h>
#include "../libc/rom/string/rom_libc_string.h"
#include "../libgloss/rtl8195a/rom/rom_libgloss_retarget.h"
#ifndef _PTR
#define _PTR void *
#endif
#ifndef _AND
#define _AND ,
#endif
#ifndef _NOARGS
#define _NOARGS void
#endif
#ifndef _CONST
#define _CONST const
#endif
#ifndef _VOLATILE
#define _VOLATILE volatile
#endif
#ifndef _SIGNED
#define _SIGNED signed
#endif
#ifndef _DOTS
#define _DOTS , ...
#endif
#ifndef _VOID
#define _VOID void
#endif
//
// RTL library functions in ROM
//
#define __rtl_memset __rtl_memset_v1_00
#define __rtl_memchr __rtl_memchr_v1_00
#define __rtl_memmove __rtl_memmove_v1_00
#define __rtl_strcmp __rtl_strcmp_v1_00
#define __rtl_memcpy __rtl_memcpy_v1_00
extern _LONG_CALL_ void * __rtl_memset_v1_00(void * m , int c , size_t n);
extern _LONG_CALL_ void * __rtl_memchr_v1_00(const void * src_void , int c , size_t length);
extern _LONG_CALL_ void * __rtl_memmove_v1_00( void * dst_void , const void * src_void , size_t length);
extern _LONG_CALL_ int __rtl_strcmp_v1_00(const char *s1 , const char *s2);
extern _LONG_CALL_ void * __rtl_memcpy_v1_00(void * __restrict dst0 , const void * __restrict src0 , size_t len0);
//
// rtl eabi functions
//
#define __rtl_itod __rtl_itod_v1_00
#define __rtl_dtoi __rtl_dtoi_v1_00
#define __rtl_uitof __rtl_uitof_v1_00
#define __rtl_uitod __rtl_uitod_v1_00
#define __rtl_dcmpeq __rtl_dcmpeq_v1_00
#define __rtl_dcmplt __rtl_dcmplt_v1_00
#define __rtl_dcmpgt __rtl_dcmpgt_v1_00
#define __rtl_dadd __rtl_dadd_v1_00
#define __rtl_dsub __rtl_dsub_v1_00
#define __rtl_dmul __rtl_dmul_v1_00
#define __rtl_ddiv __rtl_ddiv_v1_00
extern _LONG_CALL_ double __rtl_itod_v1_00(int lval);
extern _LONG_CALL_ int __rtl_dtoi_v1_00(double d);
extern _LONG_CALL_ float __rtl_uitof_v1_00(unsigned int lval);
extern _LONG_CALL_ double __rtl_uitod_v1_00(unsigned int lval);
extern _LONG_CALL_ int __rtl_dcmpeq_v1_00(double a, double b);
extern _LONG_CALL_ int __rtl_dcmplt_v1_00(double a, double b);
extern _LONG_CALL_ int __rtl_dcmpgt_v1_00(double a, double b);
extern _LONG_CALL_ double __rtl_dadd_v1_00(double a, double b);
extern _LONG_CALL_ double __rtl_dsub_v1_00(double a, double b);
extern _LONG_CALL_ double __rtl_dmul_v1_00(double a, double b);
extern _LONG_CALL_ double __rtl_ddiv_v1_00(double a, double b);
//
// mprec
//
#include <reent.h>
typedef struct _Bigint _Bigint;
#define __rtl_Balloc __rtl_Balloc_v1_00
#define __rtl_Bfree __rtl_Bfree_v1_00
#define __rtl_d2b __rtl_d2b_v1_00
#define __rtl_i2b __rtl_i2b_v1_00
#define __rtl_pow5mult __rtl_pow5mult_v1_00
#define __rtl_multadd __rtl_multadd_v1_00
#define __rtl_mult __rtl_mult_v1_00
#define __rtl_hi0bits __rtl_hi0bits_v1_00
#define __rtl_lshift __rtl_lshift_v1_00
#define __rtl_cmp __rtl_cmp_v1_00
#define __rtl_diff __rtl_diff_v1_00
extern _LONG_CALL_ _Bigint * __rtl_Balloc_v1_00(struct _reent *ptr, int k);
extern _LONG_CALL_ void __rtl_Bfree_v1_00(struct _reent *ptr, _Bigint * v);
extern _LONG_CALL_ _Bigint * __rtl_d2b_v1_00(struct _reent * ptr, double _d, int *e, int *bits);
extern _LONG_CALL_ _Bigint * __rtl_i2b_v1_00(struct _reent *ptr, int i );
extern _LONG_CALL_ _Bigint * __rtl_pow5mult_v1_00(struct _reent * ptr, _Bigint *b, int k);
extern _LONG_CALL_ _Bigint * __rtl_multadd_v1_00(struct _reent *ptr, _Bigint * b, int m, int a);
extern _LONG_CALL_ _Bigint * __rtl_mult_v1_00(struct _reent *ptr, _Bigint *a, _Bigint *b);
extern _LONG_CALL_ int __rtl_hi0bits_v1_00(register __ULong x);
extern _LONG_CALL_ _Bigint *__rtl_lshift_v1_00(struct _reent *ptr, _Bigint *b, int k);
extern _LONG_CALL_ int __rtl_cmp_v1_00(_Bigint *a, _Bigint *b);
extern _LONG_CALL_ _Bigint *__rtl_diff_v1_00(struct _reent* ptr, _Bigint *a, _Bigint *b);
//
// dtoa
//
#define __rtl_dtoa_r __rtl_dtoa_r_v1_00
extern char * __rtl_dtoa_r_v1_00(struct _reent *ptr, double _d, int mode, int ndigits, int *decpt, int *sign, char **rve);
//
// mallocr
//
#include <sys/config.h>
#include <reent.h>
#define __rom_mallocr_init __rom_mallocr_init_v1_00
#define __rtl_calloc_r __rtl_calloc_r_v1_00
#define __rtl_cfree_r __rtl_cfree_r_v1_00
#define __rtl_malloc_r __rtl_malloc_r_v1_00
#define __rtl_free_r __rtl_free_r_v1_00
#define __rtl_realloc_r __rtl_realloc_r_v1_00
#define __rtl_memalign_r __rtl_memalign_r_v1_00
#define __rtl_valloc_r __rtl_valloc_r_v1_00
#define __rtl_pvalloc_r __rtl_pvalloc_r_v1_00
extern _LONG_CALL_ void __rom_mallocr_init_v1_00(void);
#define RARG struct _reent *reent_ptr,
extern _LONG_CALL_ void* __rtl_calloc_r_v1_00(RARG size_t n, size_t elem_size);
extern _LONG_CALL_ void __rtl_cfree_r_v1_00(void *mem);
extern _LONG_CALL_ void* __rtl_malloc_r_v1_00(RARG size_t bytes);
extern _LONG_CALL_ void __rtl_free_r_v1_00(RARG void* mem);
extern _LONG_CALL_ void* __rtl_realloc_r_v1_00(RARG void* oldmem, size_t bytes);
extern _LONG_CALL_ void* __rtl_memalign_r_v1_00(RARG size_t alignment, size_t bytes);
extern _LONG_CALL_ void* __rtl_valloc_r_v1_00(RARG size_t bytes);
extern _LONG_CALL_ void* __rtl_pvalloc_r_v1_00(RARG size_t bytes);
//
// stdio
//
extern int __rtl_errno;
#ifndef _READ_WRITE_RETURN_TYPE
#define _READ_WRITE_RETURN_TYPE _ssize_t
#endif
#ifndef _READ_WRITE_BUFSIZE_TYPE
#define _READ_WRITE_BUFSIZE_TYPE int
#endif
#define __rtl_sread __rtl_sread_v1_00
#define __rtl_swrite __rtl_swrite_v1_00
#define __rtl_seofread __rtl_seofread_v1_00
#define __rtl_sseek __rtl_sseek_v1_00
#define __rtl_sclose __rtl_sclose_v1_00
#define __rtl_sbrk_r __rtl_sbrk_r_v1_00
extern _LONG_CALL_ _READ_WRITE_RETURN_TYPE __rtl_sread_v1_00(
struct _reent *ptr,
void *cookie,
char *buf,
_READ_WRITE_BUFSIZE_TYPE n);
extern _LONG_CALL_ _READ_WRITE_RETURN_TYPE __rtl_swrite_v1_00(
struct _reent *ptr,
void *cookie,
char const *buf,
_READ_WRITE_BUFSIZE_TYPE n);
extern _LONG_CALL_ _READ_WRITE_RETURN_TYPE __rtl_seofread_v1_00(
struct _reent *_ptr,
_PTR cookie,
char *buf,
_READ_WRITE_BUFSIZE_TYPE len);
extern _LONG_CALL_ _fpos_t __rtl_sseek_v1_00(
struct _reent *ptr _AND
void *cookie _AND
_fpos_t offset _AND
int whence);
extern _LONG_CALL_ int __rtl_sclose_v1_00(
struct _reent *ptr _AND
void *cookie);
extern _LONG_CALL_ void * __rtl_sbrk_r_v1_00(
struct _reent *ptr,
ptrdiff_t incr);
//
// vfprintf
//
#include <stdio.h>
#include <stdarg.h>
#define __rtl_fflush_r __rtl_fflush_r_v1_00
#define __rtl_vfprintf_r __rtl_vfprintf_r_v1_00
extern _LONG_CALL_ int __rtl_fflush_r_v1_00(struct _reent *ptr, register FILE * fp);
extern _LONG_CALL_ int __rtl_vfprintf_r_v1_00(struct _reent *, FILE *, const char *, va_list);
#endif /* _RTL_LIB_ROM_H_ */

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component/soc/realtek/8195a/misc/rtl_std_lib/include/rtl_lib.h Executable file
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/*
* rtl_lib.h
*
* Definitions for RTL library functions
*/
#ifndef _RTL_LIB_H_
#define _RTL_LIB_H_
#include <basic_types.h>
#include <diag.h>
extern int __rtl_errno;
void init_rom_libgloss_ram_map(void);
//
// RTL library functions for Libc::stdio
//
extern int rtl_printf(IN const char* fmt, ...);
extern int rtl_sprintf(char* str, const char* fmt, ...);
extern int rtl_snprintf(char* str, size_t size, const char* fmt, ...);
//
// RTL library functions for string
//
extern void * rtl_memchr(const void * src_void , int c , size_t length);
extern int rtl_memcmp(const void * m1 , const void * m2 , size_t n);
extern void * rtl_memcpy(void * dst0 , const void * src0 , size_t len0);
extern void * rtl_memmove( void * dst_void , const void * src_void , size_t length);
extern void * rtl_memset(void * m , int c , size_t n);
extern char * rtl_strcat(char * s1 , const char * s2);
extern char * rtl_strchr(const char *s1 , int i);
extern int rtl_strcmp(const char *s1 , const char *s2);
extern char* rtl_strcpy(char *dst0 , const char *src0);
extern size_t rtl_strlen(const char *str);
extern char * rtl_strncat(char * s1 , const char * s2 , size_t n);
extern int rtl_strncmp(const char *s1 , const char *s2 , size_t n);
extern char * rtl_strncpy(char * dst0 , const char * src0 , size_t count);
extern char * rtl_strstr(const char *searchee , const char *lookfor);
extern char * rtl_strsep(char **source_ptr , const char *delim);
extern char * rtl_strtok(char * s , const char * delim);
//
// RTL library functions for math
//
extern double rtl_fabs(double);
extern float rtl_fabsf(float a);
extern float rtl_cos_f32(float a);
extern float rtl_sin_f32(float a);
extern float rtl_fadd(float a, float b);
extern float rtl_fsub(float a, float b);
extern float rtl_fmul(float a, float b);
extern float rtl_fdiv(float a, float b);
extern int rtl_fcmplt(float a, float b);
extern int rtl_fcmpgt(float a, float b);
//
// RTL eabi functions
extern double rtl_ftod(float f);
extern double rtl_ddiv(double a, double b);
//
// Macro Library Functions
//
typedef union
{
float value;
u32 word;
} ieee_float_shape_type;
/* Get a 32 bit int from a float. */
#define GET_FLOAT_WORD(i,d) \
do { \
ieee_float_shape_type gf_u; \
gf_u.value = (d); \
(i) = gf_u.word; \
} while (0)
/* Set a float from a 32 bit int. */
#define SET_FLOAT_WORD(d,i) \
do { \
ieee_float_shape_type sf_u; \
sf_u.word = (i); \
(d) = sf_u.value; \
} while (0)
static inline
float rtl_nanf(void)
{
float x;
SET_FLOAT_WORD(x,0x7fc00000);
return x;
}
//
// Library Test functions
//
extern int rtl_lib_test(IN u16 argc, IN u8 *argv[]);
extern int rtl_math_test(IN u16 argc, IN u8 *argv[]);
extern int rtl_string_test(IN u16 argc, IN u8 *argv[]);
//
// Macro functions
//
#undef dbg_printf
#define dbg_printf(fmt, args...) \
rtl_printf("%s():%d : " fmt "\n", __FUNCTION__, __LINE__, ##args);
#undef err_printf
#define err_printf(fmt, args...) \
rtl_printf("%s():%d : " fmt "\n", __FUNCTION__, __LINE__, ##args);
#endif /* _RTL_LIB_H_ */