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https://github.com/rtlduino/RTL8710AF_GCC.git
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03e74a8e50
motify compile link error
86 lines
1.4 KiB
C
86 lines
1.4 KiB
C
/*
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* Routines to access hardware
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*
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* Copyright (c) 2014 Realtek Semiconductor Corp.
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*
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* This module is a confidential and proprietary property of RealTek and
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* possession or use of this module requires written permission of RealTek.
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*/
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#ifndef _RTL8195A_WDT_H_
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#define _RTL8195A_WDT_H_
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#define WDGTIMERELY (10*1024) //us
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typedef struct _WDG_REG_ {
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u16 WdgScalar;
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u8 WdgEnByte;
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u8 WdgClear:1;
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u8 WdgCunLimit:4;
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u8 Rsvd:1;
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u8 WdgMode:1;
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u8 WdgToISR:1;
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}WDG_REG, *PWDG_REG;
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typedef struct _WDG_ADAPTER_ {
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WDG_REG Ctrl;
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IRQ_HANDLE IrqHandle;
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TIMER_ADAPTER WdgGTimer;
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VOID (*UserCallback)(u32 callback_id); // User callback function
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u32 callback_id;
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}WDG_ADAPTER, *PWDG_ADAPTER;
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typedef enum _WDG_CNTLMT_ {
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CNT1H = 0,
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CNT3H = 1,
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CNT7H = 2,
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CNTFH = 3,
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CNT1FH = 4,
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CNT3FH = 5,
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CNT7FH = 6,
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CNTFFH = 7,
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CNT1FFH = 8,
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CNT3FFH = 9,
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CNT7FFH = 10,
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CNTFFFH = 11
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}WDG_CNTLMT, *PWDG_CNTLMT;
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typedef enum _WDG_MODE_ {
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INT_MODE = 0,
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RESET_MODE = 1
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}WDG_MODE, *PWDG_MODE;
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extern VOID
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WDGInitial(
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IN u32 Period
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);
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extern VOID
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WDGIrqInitial(
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VOID
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);
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extern VOID
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WDGIrqInitial(
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VOID
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);
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extern VOID
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WDGStop(
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VOID
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);
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extern VOID
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WDGRefresh(
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VOID
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);
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extern VOID
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WDGIrqCallBackReg(
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IN VOID *CallBack,
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IN u32 Id
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);
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#endif //_RTL8195A_WDT_H_
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