mirror of
https://github.com/rtlduino/RTL8710AF_GCC.git
synced 2026-07-06 19:45:39 +00:00
rtlduino rtl8710af gcc base version
This commit is contained in:
RtlduinoMan
parent
7675bdb95f
commit
9c0c9edf61
2097 changed files with 779974 additions and 2 deletions
BIN
component/soc/realtek/8195a/misc/bsp/image/ram_1.p.bin
Normal file
BIN
component/soc/realtek/8195a/misc/bsp/image/ram_1.p.bin
Normal file
Binary file not shown.
BIN
component/soc/realtek/8195a/misc/bsp/image/ram_1.r.bin
Normal file
BIN
component/soc/realtek/8195a/misc/bsp/image/ram_1.r.bin
Normal file
Binary file not shown.
46
component/soc/realtek/8195a/misc/driver/low_level_io.c
Normal file
46
component/soc/realtek/8195a/misc/driver/low_level_io.c
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@ -0,0 +1,46 @@
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#include <stdio.h>
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#include "hal_api.h"
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#if !defined (__ICCARM__)
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extern u8 RAM_IMG1_VALID_PATTEN[];
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void *tmp = RAM_IMG1_VALID_PATTEN;
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#endif
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#if defined ( __ICCARM__ )
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size_t __write(int Handle, const unsigned char * Buf, size_t Bufsize)
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{
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int nChars = 0;
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/* Check for stdout and stderr
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(only necessary if file descriptors are enabled.) */
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if (Handle != 1 && Handle != 2)
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{
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return -1;
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}
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for (/*Empty */; Bufsize > 0; --Bufsize)
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{
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DiagPutChar(*Buf++);
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++nChars;
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}
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return nChars;
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}
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size_t __read(int Handle, unsigned char * Buf, size_t Bufsize)
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{
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int nChars = 0;
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/* Check for stdin
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(only necessary if FILE descriptors are enabled) */
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if (Handle != 0)
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{
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return -1;
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}
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for (/*Empty*/; Bufsize > 0; --Bufsize)
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{
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int c = DiagGetChar(_FALSE);
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if (c < 0)
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break;
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*(Buf++) = c;
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++nChars;
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}
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return nChars;
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}
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#endif
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365
component/soc/realtek/8195a/misc/driver/rtl_consol.c
Normal file
365
component/soc/realtek/8195a/misc/driver/rtl_consol.c
Normal file
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@ -0,0 +1,365 @@
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/*
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* Routines to access hardware
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*
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* Copyright (c) 2013 Realtek Semiconductor Corp.
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*
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* This module is a confidential and proprietary property of RealTek and
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* possession or use of this module requires written permission of RealTek.
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*/
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#include "rtl8195a.h"
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//#include <stdarg.h>
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#include "rtl_consol.h"
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#include "osdep_api.h"
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#if defined(configUSE_WAKELOCK_PMU) && (configUSE_WAKELOCK_PMU == 1)
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#include "freertos_pmu.h"
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#endif
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#include "tcm_heap.h"
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MON_RAM_BSS_SECTION
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volatile UART_LOG_CTL UartLogCtl;
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MON_RAM_BSS_SECTION
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volatile UART_LOG_CTL *pUartLogCtl;
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MON_RAM_BSS_SECTION
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u8 *ArgvArray[MAX_ARGV];
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MON_RAM_BSS_SECTION
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UART_LOG_BUF UartLogBuf;
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#ifdef CONFIG_UART_LOG_HISTORY
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MON_RAM_BSS_SECTION
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u8 UartLogHistoryBuf[UART_LOG_HISTORY_LEN][UART_LOG_CMD_BUFLEN];
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#endif
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_LONG_CALL_
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extern u8
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UartLogCmdChk(
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IN u8 RevData,
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IN UART_LOG_CTL *prvUartLogCtl,
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IN u8 EchoFlag
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);
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_LONG_CALL_
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extern VOID
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ArrayInitialize(
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IN u8 *pArrayToInit,
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IN u8 ArrayLen,
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IN u8 InitValue
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);
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_LONG_CALL_
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extern VOID
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UartLogHistoryCmd(
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IN u8 RevData,
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IN UART_LOG_CTL *prvUartLogCtl,
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IN u8 EchoFlag
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);
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_LONG_CALL_
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extern VOID
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UartLogCmdExecute(
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IN PUART_LOG_CTL pUartLogCtlExe
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);
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//=================================================
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/* Minimum and maximum values a `signed long int' can hold.
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(Same as `int'). */
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#ifndef __LONG_MAX__
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#if defined (__alpha__) || (defined (__sparc__) && defined(__arch64__)) || defined (__sparcv9) || defined (__s390x__)
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#define __LONG_MAX__ 9223372036854775807L
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#else
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#define __LONG_MAX__ 2147483647L
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#endif /* __alpha__ || sparc64 */
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#endif
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#undef LONG_MIN
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#define LONG_MIN (-LONG_MAX-1)
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#undef LONG_MAX
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#define LONG_MAX __LONG_MAX__
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/* Maximum value an `unsigned long int' can hold. (Minimum is 0). */
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#undef ULONG_MAX
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#define ULONG_MAX (LONG_MAX * 2UL + 1)
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#ifndef __LONG_LONG_MAX__
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#define __LONG_LONG_MAX__ 9223372036854775807LL
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#endif
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//======================================================
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//<Function>: UartLogIrqHandleRam
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//<Usage >: To deal with Uart-Log RX IRQ
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//<Argus >: VOID
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//<Return >: VOID
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//<Notes >: NA
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//======================================================
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MON_RAM_TEXT_SECTION
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VOID
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UartLogIrqHandleRam
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(
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VOID * Data
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)
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{
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u8 UartReceiveData = 0;
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//For Test
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BOOL PullMode = _FALSE;
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u32 IrqEn = DiagGetIsrEnReg();
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DiagSetIsrEnReg(0);
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UartReceiveData = DiagGetChar(PullMode);
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if (UartReceiveData == 0) {
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goto exit;
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}
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//KB_ESC chk is for cmd history, it's a special case here.
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if (UartReceiveData == KB_ASCII_ESC) {
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//4 Esc detection is only valid in the first stage of boot sequence (few seconds)
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if (pUartLogCtl->ExecuteEsc != _TRUE)
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{
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pUartLogCtl->ExecuteEsc = _TRUE;
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(*pUartLogCtl).EscSTS = 0;
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}
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else
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{
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//4 the input commands are valid only when the task is ready to execute commands
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if ((pUartLogCtl->BootRdy == 1)
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#ifdef CONFIG_KERNEL
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||(pUartLogCtl->TaskRdy == 1)
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#endif
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)
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{
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if ((*pUartLogCtl).EscSTS==0)
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{
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(*pUartLogCtl).EscSTS = 1;
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}
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}
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else
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{
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(*pUartLogCtl).EscSTS = 0;
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}
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}
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}
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else if ((*pUartLogCtl).EscSTS==1){
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if (UartReceiveData != KB_ASCII_LBRKT){
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(*pUartLogCtl).EscSTS = 0;
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}
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else{
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(*pUartLogCtl).EscSTS = 2;
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}
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}
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else{
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if ((*pUartLogCtl).EscSTS==2){
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(*pUartLogCtl).EscSTS = 0;
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#ifdef CONFIG_UART_LOG_HISTORY
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if ((UartReceiveData=='A')|| UartReceiveData=='B'){
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UartLogHistoryCmd(UartReceiveData,(UART_LOG_CTL *)pUartLogCtl,1);
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}
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#endif
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}
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else{
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if (UartLogCmdChk(UartReceiveData,(UART_LOG_CTL *)pUartLogCtl,1)==2)
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{
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//4 check UartLog buffer to prevent from incorrect access
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if (pUartLogCtl->pTmpLogBuf != NULL)
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{
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pUartLogCtl->ExecuteCmd = _TRUE;
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#if defined(CONFIG_KERNEL) && !TASK_SCHEDULER_DISABLED
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if (pUartLogCtl->TaskRdy)
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RtlUpSemaFromISR((_Sema *)&pUartLogCtl->Sema);
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#endif
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}
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else
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{
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ArrayInitialize((u8 *)pUartLogCtl->pTmpLogBuf->UARTLogBuf, UART_LOG_CMD_BUFLEN, '\0');
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}
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}
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}
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}
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exit:
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DiagSetIsrEnReg(IrqEn);
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}
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MON_RAM_TEXT_SECTION
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VOID
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RtlConsolInitRam(
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IN u32 Boot,
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IN u32 TBLSz,
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IN VOID *pTBL
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)
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{
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UartLogBuf.BufCount = 0;
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ArrayInitialize(&UartLogBuf.UARTLogBuf[0],UART_LOG_CMD_BUFLEN,'\0');
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pUartLogCtl = &UartLogCtl;
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pUartLogCtl->NewIdx = 0;
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pUartLogCtl->SeeIdx = 0;
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pUartLogCtl->RevdNo = 0;
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pUartLogCtl->EscSTS = 0;
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pUartLogCtl->BootRdy = 0;
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pUartLogCtl->pTmpLogBuf = &UartLogBuf;
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#ifdef CONFIG_UART_LOG_HISTORY
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pUartLogCtl->CRSTS = 0;
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pUartLogCtl->pHistoryBuf = &UartLogHistoryBuf[0];
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#endif
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pUartLogCtl->pfINPUT = (VOID*)&DiagPrintf;
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pUartLogCtl->pCmdTbl = (PCOMMAND_TABLE) pTBL;
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pUartLogCtl->CmdTblSz = TBLSz;
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#ifdef CONFIG_KERNEL
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pUartLogCtl->TaskRdy = 0;
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#endif
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//executing boot sequence
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if (Boot == ROM_STAGE)
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{
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pUartLogCtl->ExecuteCmd = _FALSE;
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pUartLogCtl->ExecuteEsc = _FALSE;
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}
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else
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{
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pUartLogCtl->ExecuteCmd = _FALSE;
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pUartLogCtl->ExecuteEsc= _TRUE;//don't check Esc anymore
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#if defined(CONFIG_KERNEL)
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/* Create a Semaphone */
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RtlInitSema((_Sema*)&(pUartLogCtl->Sema), 0);
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pUartLogCtl->TaskRdy = 0;
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#ifdef PLATFORM_FREERTOS
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#define LOGUART_STACK_SIZE 128 //USE_MIN_STACK_SIZE modify from 512 to 128
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#if CONFIG_USE_TCM_HEAP
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{
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int ret = 0;
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void *stack_addr = tcm_heap_malloc(LOGUART_STACK_SIZE*sizeof(int));
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//void *stack_addr = rtw_malloc(stack_size*sizeof(int));
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if(stack_addr == NULL){
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DiagPrintf("Out of TCM heap in \"LOGUART_TASK\" ");
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}
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ret = xTaskGenericCreate(
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RtlConsolTaskRam,
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(const char *)"LOGUART_TASK",
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LOGUART_STACK_SIZE,
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NULL,
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tskIDLE_PRIORITY + 5 + PRIORITIE_OFFSET,
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NULL,
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stack_addr,
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NULL);
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if (pdTRUE != ret)
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{
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DiagPrintf("Create Log UART Task Err!!\n");
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}
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}
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#else
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if (pdTRUE != xTaskCreate( RtlConsolTaskRam, (const signed char * const)"LOGUART_TASK", LOGUART_STACK_SIZE, NULL, tskIDLE_PRIORITY + 5 + PRIORITIE_OFFSET, NULL))
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{
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DiagPrintf("Create Log UART Task Err!!\n");
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}
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#endif
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#endif
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#endif
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}
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CONSOLE_8195A();
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}
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extern u8** GetArgv(const u8 *string);
|
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#if SUPPORT_LOG_SERVICE
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extern char log_buf[LOG_SERVICE_BUFLEN];
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extern xSemaphoreHandle log_rx_interrupt_sema;
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#endif
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//======================================================
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void console_cmd_exec(PUART_LOG_CTL pUartLogCtlExe)
|
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{
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u8 CmdCnt = 0;
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u8 argc = 0;
|
||||
u8 **argv;
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//u32 CmdNum;
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PUART_LOG_BUF pUartLogBuf = pUartLogCtlExe->pTmpLogBuf;
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#if SUPPORT_LOG_SERVICE
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strncpy(log_buf, (const u8*)&(*pUartLogBuf).UARTLogBuf[0], LOG_SERVICE_BUFLEN-1);
|
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#endif
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argc = GetArgc((const u8*)&((*pUartLogBuf).UARTLogBuf[0]));
|
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argv = GetArgv((const u8*)&((*pUartLogBuf).UARTLogBuf[0]));
|
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|
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if(argc > 0){
|
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#if SUPPORT_LOG_SERVICE
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// if(log_handler(argv[0]) == NULL)
|
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// legency_interactive_handler(argc, argv);
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RtlUpSema((_Sema *)&log_rx_interrupt_sema);
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#endif
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ArrayInitialize(argv[0], sizeof(argv[0]) ,0);
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}else{
|
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#if defined(configUSE_WAKELOCK_PMU) && (configUSE_WAKELOCK_PMU == 1)
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acquire_wakelock(WAKELOCK_LOGUART);
|
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#endif
|
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CONSOLE_8195A(); // for null command
|
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}
|
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|
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(*pUartLogBuf).BufCount = 0;
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ArrayInitialize(&(*pUartLogBuf).UARTLogBuf[0], UART_LOG_CMD_BUFLEN, '\0');
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}
|
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//======================================================
|
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// overload original RtlConsolTaskRam
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MON_RAM_TEXT_SECTION
|
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VOID
|
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RtlConsolTaskRam(
|
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VOID *Data
|
||||
)
|
||||
{
|
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#if SUPPORT_LOG_SERVICE
|
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log_service_init();
|
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#endif
|
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//4 Set this for UartLog check cmd history
|
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#ifdef CONFIG_KERNEL
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pUartLogCtl->TaskRdy = 1;
|
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#endif
|
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#ifndef CONFIG_KERNEL
|
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pUartLogCtl->BootRdy = 1;
|
||||
#endif
|
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do{
|
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#if defined(CONFIG_KERNEL) && !TASK_SCHEDULER_DISABLED
|
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RtlDownSema((_Sema *)&pUartLogCtl->Sema);
|
||||
#endif
|
||||
if (pUartLogCtl->ExecuteCmd) {
|
||||
// Add command handler here
|
||||
console_cmd_exec((PUART_LOG_CTL)pUartLogCtl);
|
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//UartLogCmdExecute((PUART_LOG_CTL)pUartLogCtl);
|
||||
pUartLogCtl->ExecuteCmd = _FALSE;
|
||||
}
|
||||
}while(1);
|
||||
}
|
||||
|
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//======================================================
|
||||
void console_init(void)
|
||||
{
|
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IRQ_HANDLE UartIrqHandle;
|
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|
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//4 Register Log Uart Callback function
|
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UartIrqHandle.Data = NULL;//(u32)&UartAdapter;
|
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UartIrqHandle.IrqNum = UART_LOG_IRQ;
|
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UartIrqHandle.IrqFun = (IRQ_FUN) UartLogIrqHandleRam;
|
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UartIrqHandle.Priority = 0;
|
||||
|
||||
|
||||
//4 Register Isr handle
|
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InterruptUnRegister(&UartIrqHandle);
|
||||
InterruptRegister(&UartIrqHandle);
|
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#if !TASK_SCHEDULER_DISABLED
|
||||
RtlConsolInitRam((u32)RAM_STAGE,(u32)0,(VOID*)NULL);
|
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#else
|
||||
RtlConsolInitRam((u32)ROM_STAGE,(u32)0,(VOID*)NULL);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
133
component/soc/realtek/8195a/misc/driver/rtl_consol.h
Normal file
133
component/soc/realtek/8195a/misc/driver/rtl_consol.h
Normal file
|
|
@ -0,0 +1,133 @@
|
|||
/*
|
||||
* Routines to access hardware
|
||||
*
|
||||
* Copyright (c) 2013 Realtek Semiconductor Corp.
|
||||
*
|
||||
* This module is a confidential and proprietary property of RealTek and
|
||||
* possession or use of this module requires written permission of RealTek.
|
||||
*/
|
||||
|
||||
#ifndef _RTK_CONSOL_H_
|
||||
#define _RTK_CONSOL_H_
|
||||
/*
|
||||
* Include user defined options first. Anything not defined in these files
|
||||
* will be set to standard values. Override anything you dont like!
|
||||
*/
|
||||
#if defined(CONFIG_PLATFORM_8195A) || defined(CONFIG_PLATFORM_8711B)
|
||||
#include "platform_opts.h"
|
||||
#endif
|
||||
|
||||
#include "osdep_api.h"
|
||||
#include "hal_diag.h"
|
||||
|
||||
#define CONSOLE_PREFIX "#"
|
||||
|
||||
|
||||
//Log UART
|
||||
//UART_LOG_CMD_BUFLEN: only 126 bytes could be used for keeping input
|
||||
// cmd, the last byte is for string end ('\0').
|
||||
#define UART_LOG_CMD_BUFLEN 127
|
||||
#define MAX_ARGV 10
|
||||
|
||||
|
||||
|
||||
typedef u32 (*ECHOFUNC)(IN u8*,...); //UART LOG echo-function type.
|
||||
|
||||
typedef struct _UART_LOG_BUF_ {
|
||||
u8 BufCount; //record the input cmd char number.
|
||||
u8 UARTLogBuf[UART_LOG_CMD_BUFLEN]; //record the input command.
|
||||
} UART_LOG_BUF, *PUART_LOG_BUF;
|
||||
|
||||
|
||||
|
||||
typedef struct _UART_LOG_CTL_ {
|
||||
u8 NewIdx;
|
||||
u8 SeeIdx;
|
||||
u8 RevdNo;
|
||||
u8 EscSTS;
|
||||
u8 ExecuteCmd;
|
||||
u8 ExecuteEsc;
|
||||
u8 BootRdy;
|
||||
u8 Resvd;
|
||||
PUART_LOG_BUF pTmpLogBuf;
|
||||
VOID *pfINPUT;
|
||||
PCOMMAND_TABLE pCmdTbl;
|
||||
u32 CmdTblSz;
|
||||
#ifdef CONFIG_UART_LOG_HISTORY
|
||||
u32 CRSTS;
|
||||
#endif
|
||||
#ifdef CONFIG_UART_LOG_HISTORY
|
||||
u8 (*pHistoryBuf)[UART_LOG_CMD_BUFLEN];
|
||||
#endif
|
||||
#ifdef CONFIG_KERNEL
|
||||
u32 TaskRdy;
|
||||
_Sema Sema;
|
||||
#else
|
||||
// Since ROM code will reference this typedef, so keep the typedef same size
|
||||
u32 TaskRdy;
|
||||
void *Sema;
|
||||
#endif
|
||||
} UART_LOG_CTL, *PUART_LOG_CTL;
|
||||
|
||||
|
||||
#define KB_ASCII_NUL 0x00
|
||||
#define KB_ASCII_BS 0x08
|
||||
#define KB_ASCII_TAB 0x09
|
||||
#define KB_ASCII_LF 0x0A
|
||||
#define KB_ASCII_CR 0x0D
|
||||
#define KB_ASCII_ESC 0x1B
|
||||
#define KB_ASCII_SP 0x20
|
||||
#define KB_ASCII_BS_7F 0x7F
|
||||
#define KB_ASCII_LBRKT 0x5B //[
|
||||
|
||||
#define KB_SPACENO_TAB 1
|
||||
|
||||
#ifdef CONFIG_UART_LOG_HISTORY
|
||||
#define UART_LOG_HISTORY_LEN 5
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_DEBUG_LOG
|
||||
#define _ConsolePrint DiagPrintf
|
||||
#else
|
||||
#define _ConsolePrint
|
||||
#endif
|
||||
|
||||
#ifndef CONSOLE_PREFIX
|
||||
#define CONSOLE_PREFIX "<RTL8195A>"
|
||||
#endif
|
||||
|
||||
#define CONSOLE_8195A(...) do {\
|
||||
_ConsolePrint("\r"CONSOLE_PREFIX __VA_ARGS__);\
|
||||
}while(0)
|
||||
|
||||
|
||||
_LONG_CALL_ VOID
|
||||
RtlConsolInit(
|
||||
IN u32 Boot,
|
||||
IN u32 TBLSz,
|
||||
IN VOID *pTBL
|
||||
);
|
||||
|
||||
#if defined(CONFIG_KERNEL)
|
||||
_LONG_CALL_ VOID
|
||||
RtlConsolTaskRam(
|
||||
VOID *Data
|
||||
);
|
||||
#endif
|
||||
|
||||
_LONG_CALL_ VOID
|
||||
RtlConsolTaskRom(
|
||||
VOID *Data
|
||||
);
|
||||
|
||||
|
||||
_LONG_CALL_ u32
|
||||
Strtoul(
|
||||
IN const u8 *nptr,
|
||||
IN u8 **endptr,
|
||||
IN u32 base
|
||||
);
|
||||
|
||||
void console_init(void);
|
||||
|
||||
#endif //_RTK_CONSOL_H_
|
||||
77
component/soc/realtek/8195a/misc/gcc_utility/Check_Jtag.sh
Normal file
77
component/soc/realtek/8195a/misc/gcc_utility/Check_Jtag.sh
Normal file
|
|
@ -0,0 +1,77 @@
|
|||
#!/bin/sh
|
||||
|
||||
#===============================================================================
|
||||
CURRENT_UTILITY_DIR=$(pwd)
|
||||
GDBSCPTFILE="../../../component/soc/realtek/8195a/misc/gcc_utility/rtl_gdb_flash_write.txt"
|
||||
|
||||
#===============================================================================
|
||||
RLXSTS=$(ps -W | grep "rlx_probe_driver.exe" | grep -v "grep" | wc -l)
|
||||
echo $RLXSTS
|
||||
JLKSTS=$(ps -W | grep "JLinkGDBServer.exe" | grep -v "grep" | wc -l)
|
||||
echo $JLKSTS
|
||||
|
||||
echo $CURRENT_UTILITY_DIR
|
||||
|
||||
#===============================================================================
|
||||
#make the new string for being written
|
||||
if [ $RLXSTS = 1 ]
|
||||
then
|
||||
echo "probe get"
|
||||
|
||||
#-------------------------------------------
|
||||
LINE_NUMBER=$(grep -n "monitor reset " $GDBSCPTFILE | awk -F":" '{print $1}')
|
||||
DEFAULT_STR=$(grep -n "monitor reset " $GDBSCPTFILE | awk -F":" '{print $2}')
|
||||
#echo $LINE_NUMBER
|
||||
echo $DEFAULT_STR
|
||||
STRLEN_DFT=$(expr length "$DEFAULT_STR")
|
||||
DEFAULT_STR="#monitor reset 1"
|
||||
echo $DEFAULT_STR
|
||||
#-------------------------------------------
|
||||
SED_PARA="$LINE_NUMBER""c""$DEFAULT_STR"
|
||||
sed -i "$SED_PARA" $GDBSCPTFILE
|
||||
|
||||
#===========================================
|
||||
LINE_NUMBER=$(grep -n "monitor sleep " $GDBSCPTFILE | awk -F":" '{print $1}')
|
||||
DEFAULT_STR=$(grep -n "monitor sleep " $GDBSCPTFILE | awk -F":" '{print $2}')
|
||||
#echo $LINE_NUMBER
|
||||
echo $DEFAULT_STR
|
||||
STRLEN_DFT=$(expr length "$DEFAULT_STR")
|
||||
DEFAULT_STR="#monitor sleep 20"
|
||||
echo $DEFAULT_STR
|
||||
#-------------------------------------------
|
||||
SED_PARA="$LINE_NUMBER""c""$DEFAULT_STR"
|
||||
sed -i "$SED_PARA" $GDBSCPTFILE
|
||||
else
|
||||
|
||||
if [ $JLKSTS = 1 ]
|
||||
then
|
||||
echo "jlink get"
|
||||
|
||||
#-------------------------------------------
|
||||
LINE_NUMBER=$(grep -n "monitor reset " $GDBSCPTFILE | awk -F":" '{print $1}')
|
||||
DEFAULT_STR=$(grep -n "monitor reset " $GDBSCPTFILE | awk -F":" '{print $2}')
|
||||
#echo $LINE_NUMBER
|
||||
echo $DEFAULT_STR
|
||||
STRLEN_DFT=$(expr length "$DEFAULT_STR")
|
||||
DEFAULT_STR="monitor reset 1"
|
||||
echo $DEFAULT_STR
|
||||
#-------------------------------------------
|
||||
SED_PARA="$LINE_NUMBER""c""$DEFAULT_STR"
|
||||
sed -i "$SED_PARA" $GDBSCPTFILE
|
||||
|
||||
#===========================================
|
||||
LINE_NUMBER=$(grep -n "monitor sleep " $GDBSCPTFILE | awk -F":" '{print $1}')
|
||||
DEFAULT_STR=$(grep -n "monitor sleep " $GDBSCPTFILE | awk -F":" '{print $2}')
|
||||
#echo $LINE_NUMBER
|
||||
echo $DEFAULT_STR
|
||||
STRLEN_DFT=$(expr length "$DEFAULT_STR")
|
||||
DEFAULT_STR="monitor sleep 20"
|
||||
echo $DEFAULT_STR
|
||||
#-------------------------------------------
|
||||
SED_PARA="$LINE_NUMBER""c""$DEFAULT_STR"
|
||||
sed -i "$SED_PARA" $GDBSCPTFILE
|
||||
|
||||
fi
|
||||
fi
|
||||
|
||||
#===============================================================================
|
||||
|
|
@ -0,0 +1,20 @@
|
|||
#!/bin/sh
|
||||
|
||||
#===============================================================================
|
||||
CURRENT_UTILITY_DIR=$(pwd)
|
||||
echo "..."
|
||||
echo $CURRENT_UTILITY_DIR
|
||||
RAMFILENAME="./application/Debug/bin/ram_all.bin"
|
||||
echo $RAMFILENAME
|
||||
#RAMFILENAME="ram_2.bin"
|
||||
GDBSCPTFILE="../../../component/soc/realtek/8195a/misc/gcc_utility/rtl_gdb_flash_write.txt"
|
||||
|
||||
#===============================================================================
|
||||
#get file size
|
||||
RAM_FILE_SIZE=$(stat -c %s $RAMFILENAME)
|
||||
RAM_FILE_SIZE_HEX=`echo "obase=16; $RAM_FILE_SIZE"|bc`
|
||||
|
||||
echo "size "$RAM_FILE_SIZE" --> 0x"$RAM_FILE_SIZE_HEX
|
||||
|
||||
echo "set \$RamFileSize = 0x$RAM_FILE_SIZE_HEX" > fwsize.gdb
|
||||
exit
|
||||
124
component/soc/realtek/8195a/misc/gcc_utility/openocd/ameba1.cfg
Normal file
124
component/soc/realtek/8195a/misc/gcc_utility/openocd/ameba1.cfg
Normal file
|
|
@ -0,0 +1,124 @@
|
|||
# Main file for Ameba1 series Cortex-M3 parts
|
||||
#
|
||||
# !!!!!!
|
||||
#
|
||||
|
||||
set CHIPNAME rtl8195a
|
||||
set CHIPSERIES ameba1
|
||||
|
||||
# Adapt based on what transport is active.
|
||||
source [find target/swj-dp.tcl]
|
||||
|
||||
if { [info exists CHIPNAME] } {
|
||||
set _CHIPNAME $CHIPNAME
|
||||
} else {
|
||||
error "CHIPNAME not set. Please do not include ameba1.cfg directly."
|
||||
}
|
||||
|
||||
if { [info exists CHIPSERIES] } {
|
||||
# Validate chip series is supported
|
||||
if { $CHIPSERIES != "ameba1" } {
|
||||
error "Unsupported chip series specified."
|
||||
}
|
||||
set _CHIPSERIES $CHIPSERIES
|
||||
} else {
|
||||
error "CHIPSERIES not set. Please do not include ameba1.cfg directly."
|
||||
}
|
||||
|
||||
if { [info exists CPUTAPID] } {
|
||||
# Allow user override
|
||||
set _CPUTAPID $CPUTAPID
|
||||
} else {
|
||||
# Ameba1 use a Cortex M3 core.
|
||||
if { $_CHIPSERIES == "ameba1" } {
|
||||
if { [using_jtag] } {
|
||||
set _CPUTAPID 0x4ba00477
|
||||
} {
|
||||
set _CPUTAPID 0x2ba01477
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
|
||||
|
||||
set _TARGETNAME $_CHIPNAME.cpu
|
||||
target create $_TARGETNAME cortex_m -chain-position $_TARGETNAME
|
||||
|
||||
|
||||
# Run with *real slow* clock by default since the
|
||||
# boot rom could have been playing with the PLL, so
|
||||
# we have no idea what clock the target is running at.
|
||||
adapter_khz 10
|
||||
|
||||
# delays on reset lines
|
||||
adapter_nsrst_delay 200
|
||||
if {[using_jtag]} {
|
||||
jtag_ntrst_delay 200
|
||||
}
|
||||
|
||||
|
||||
# Ameba1 (Cortex M3 core) support SYSRESETREQ
|
||||
if {![using_hla]} {
|
||||
# if srst is not fitted use SYSRESETREQ to
|
||||
# perform a soft reset
|
||||
cortex_m reset_config sysresetreq
|
||||
}
|
||||
|
||||
$_TARGETNAME configure -event reset-init {ameba1_init}
|
||||
|
||||
# Ameba1 SDRAM enable
|
||||
proc ameba1_init { } {
|
||||
# init System
|
||||
mww 0x40000014 0x00000021
|
||||
sleep 10
|
||||
mww 0x40000304 0x1fc00002
|
||||
sleep 10
|
||||
mww 0x40000250 0x00000400
|
||||
sleep 10
|
||||
mww 0x40000340 0x00000000
|
||||
sleep 10
|
||||
mww 0x40000230 0x0000dcc4
|
||||
sleep 10
|
||||
mww 0x40000210 0x00011117
|
||||
sleep 10
|
||||
mww 0x40000210 0x00011157
|
||||
sleep 10
|
||||
mww 0x400002c0 0x00110011
|
||||
sleep 10
|
||||
mww 0x40000320 0xffffffff
|
||||
sleep 10
|
||||
# init SDRAM
|
||||
mww 0x40000040 0x00fcc702
|
||||
sleep 10
|
||||
mdw 0x40000040
|
||||
mww 0x40005224 0x00000001
|
||||
sleep 10
|
||||
mww 0x40005004 0x00000208
|
||||
sleep 10
|
||||
mww 0x40005008 0xffffd000
|
||||
sleep 13
|
||||
mww 0x40005020 0x00000022
|
||||
sleep 13
|
||||
mww 0x40005010 0x09006201
|
||||
sleep 13
|
||||
mww 0x40005014 0x00002611
|
||||
sleep 13
|
||||
mww 0x40005018 0x00068413
|
||||
sleep 13
|
||||
mww 0x4000501c 0x00000042
|
||||
sleep 13
|
||||
mww 0x4000500c 0x700 ;# set Idle
|
||||
sleep 20
|
||||
mww 0x40005000 0x1 ;# start init
|
||||
sleep 100
|
||||
mdw 0x40005000
|
||||
mww 0x4000500c 0x600 ;# enter memory mode
|
||||
sleep 30
|
||||
|
||||
mww 0x40005008 0x00000000 ;# 0xf00
|
||||
;# mww 0x40005008 0x00000f00
|
||||
sleep 3
|
||||
mww 0x40000300 0x0006005e ;# 0x5e
|
||||
;# mww 0x40000300 0x0000005e
|
||||
sleep 3
|
||||
}
|
||||
BIN
component/soc/realtek/8195a/misc/gcc_utility/ram_all.bin
Normal file
BIN
component/soc/realtek/8195a/misc/gcc_utility/ram_all.bin
Normal file
Binary file not shown.
|
|
@ -0,0 +1,57 @@
|
|||
# GDB script for loading ram.bin process
|
||||
|
||||
#===============================================================================
|
||||
#set GDB connection
|
||||
set remotetimeout 100000
|
||||
target remote :2331
|
||||
|
||||
#===============================================================================
|
||||
#Message display setting
|
||||
#disable all messages
|
||||
|
||||
set verbose off
|
||||
set complaints 0
|
||||
set confirm off
|
||||
set exec-done-display off
|
||||
show exec-done-display
|
||||
set trace-commands off
|
||||
#set debug aix-thread off
|
||||
#set debug dwarf2-die 0
|
||||
set debug displaced off
|
||||
set debug expression 0
|
||||
set debug frame 0
|
||||
set debug infrun 0
|
||||
set debug observer 0
|
||||
set debug overload 0
|
||||
set debugvarobj 0
|
||||
set pagination off
|
||||
set print address off
|
||||
set print symbol-filename off
|
||||
set print symbol off
|
||||
set print pretty off
|
||||
set print object off
|
||||
#set debug notification off
|
||||
set debug parser off
|
||||
set debug remote 0
|
||||
|
||||
#===============================================================================
|
||||
monitor reset 1
|
||||
monitor sleep 20
|
||||
monitor clrbp
|
||||
#===============================================================================
|
||||
#Load flash download file
|
||||
file ./application/Debug/bin/application.axf
|
||||
|
||||
#skip sdram init, it has been init in openocd config
|
||||
set {int}0x40000210=0x211157
|
||||
#x /1xw 0x40000210
|
||||
|
||||
b main
|
||||
continue
|
||||
clear main
|
||||
#Load the file
|
||||
#lo
|
||||
|
||||
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,57 @@
|
|||
# GDB script for loading ram.bin process
|
||||
|
||||
#===============================================================================
|
||||
#set GDB connection
|
||||
set remotetimeout 100000
|
||||
target remote :2331
|
||||
|
||||
#===============================================================================
|
||||
#Message display setting
|
||||
#disable all messages
|
||||
|
||||
set verbose off
|
||||
set complaints 0
|
||||
set confirm off
|
||||
set exec-done-display off
|
||||
show exec-done-display
|
||||
set trace-commands off
|
||||
#set debug aix-thread off
|
||||
#set debug dwarf2-die 0
|
||||
set debug displaced off
|
||||
set debug expression 0
|
||||
set debug frame 0
|
||||
set debug infrun 0
|
||||
set debug observer 0
|
||||
set debug overload 0
|
||||
set debugvarobj 0
|
||||
set pagination off
|
||||
set print address off
|
||||
set print symbol-filename off
|
||||
set print symbol off
|
||||
set print pretty off
|
||||
set print object off
|
||||
#set debug notification off
|
||||
set debug parser off
|
||||
set debug remote 0
|
||||
|
||||
#===============================================================================
|
||||
monitor reset 1
|
||||
monitor sleep 20
|
||||
monitor clrbp
|
||||
#===============================================================================
|
||||
#Load flash download file
|
||||
file ./application/Debug/bin/application.axf
|
||||
|
||||
#skip sdram init, it has been init in openocd config
|
||||
set {int}0x40000210=0x211157
|
||||
#x /1xw 0x40000210
|
||||
|
||||
b main
|
||||
continue
|
||||
clear main
|
||||
#Load the file
|
||||
#lo
|
||||
|
||||
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,57 @@
|
|||
# GDB script for loading ram.bin process
|
||||
|
||||
#===============================================================================
|
||||
#set GDB connection
|
||||
set remotetimeout 100000
|
||||
target remote :3333
|
||||
|
||||
#===============================================================================
|
||||
#Message display setting
|
||||
#disable all messages
|
||||
|
||||
set verbose off
|
||||
set complaints 0
|
||||
set confirm off
|
||||
set exec-done-display off
|
||||
show exec-done-display
|
||||
set trace-commands off
|
||||
#set debug aix-thread off
|
||||
#set debug dwarf2-die 0
|
||||
set debug displaced off
|
||||
set debug expression 0
|
||||
set debug frame 0
|
||||
set debug infrun 0
|
||||
set debug observer 0
|
||||
set debug overload 0
|
||||
set debugvarobj 0
|
||||
set pagination off
|
||||
set print address off
|
||||
set print symbol-filename off
|
||||
set print symbol off
|
||||
set print pretty off
|
||||
set print object off
|
||||
#set debug notification off
|
||||
set debug parser off
|
||||
set debug remote 0
|
||||
|
||||
#===============================================================================
|
||||
monitor reset init
|
||||
monitor sleep 20
|
||||
monitor halt
|
||||
#===============================================================================
|
||||
#Load flash download file
|
||||
file ./application/Debug/bin/application.axf
|
||||
|
||||
#skip sdram init, it has been init in openocd config
|
||||
set {int}0x40000210=0x211157
|
||||
#x /1xw 0x40000210
|
||||
|
||||
b main
|
||||
continue
|
||||
clear main
|
||||
#Load the file
|
||||
#lo
|
||||
|
||||
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,199 @@
|
|||
# GDB script for loading ram.bin process
|
||||
|
||||
#===============================================================================
|
||||
#set GDB connection
|
||||
set remotetimeout 100000
|
||||
target remote :2331
|
||||
|
||||
#===============================================================================
|
||||
#set file path
|
||||
set $BINFILE = "./application/Debug/bin/ram_all.bin"
|
||||
|
||||
#===============================================================================
|
||||
#Message display setting
|
||||
#disable all messages
|
||||
|
||||
set verbose off
|
||||
set complaints 0
|
||||
set confirm off
|
||||
set exec-done-display off
|
||||
show exec-done-display
|
||||
set trace-commands off
|
||||
#set debug aix-thread off
|
||||
#set debug dwarf2-die 0
|
||||
set debug displaced off
|
||||
set debug expression 0
|
||||
set debug frame 0
|
||||
set debug infrun 0
|
||||
set debug observer 0
|
||||
set debug overload 0
|
||||
set debugvarobj 0
|
||||
set pagination off
|
||||
set print address off
|
||||
set print symbol-filename off
|
||||
set print symbol off
|
||||
set print pretty off
|
||||
set print object off
|
||||
#set debug notification off
|
||||
set debug parser off
|
||||
set debug remote 0
|
||||
|
||||
#===============================================================================
|
||||
#set JTAG and external SRAM
|
||||
monitor reset 1
|
||||
monitor sleep 20
|
||||
monitor clrbp
|
||||
#===============================================================================
|
||||
#Variables declaration (1)
|
||||
#binary file size
|
||||
set $RamFileSize = 0x0000
|
||||
source fwsize.gdb
|
||||
printf "-------------------------------\n"
|
||||
printf "RamFileSize: %x\n",$RamFileSize
|
||||
printf "-------------------------------\n"
|
||||
|
||||
#===============================================================================
|
||||
set $FLASHDATBUFSIZE = 0x800
|
||||
|
||||
#===============================================================================
|
||||
#define PERI_ON_BASE 0x40000000
|
||||
set $PERI_ON_BASE = 0x40000000
|
||||
#define REG_SOC_PERI_FUNC0_EN 0x0218
|
||||
set $REG_SOC_PERI_FUNC0_EN = 0x0210
|
||||
|
||||
#define SPI_FLASH_BASE 0x4000000
|
||||
set $SPI_FLASH_BASE = 0x98000000
|
||||
|
||||
#------------------------------------------------------------------
|
||||
set $Temp = 0x0
|
||||
|
||||
#===============================================================================
|
||||
#Load flash download file
|
||||
file ../../../component/soc/realtek/8195a/misc/gcc_utility/target_NORMAL.axf
|
||||
|
||||
#Load the file
|
||||
lo
|
||||
|
||||
printf "Load flash controller.\n"
|
||||
|
||||
#===============================================================================
|
||||
#Set for executing flash controller funciton
|
||||
set $Temp = {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN)
|
||||
p /x $Temp
|
||||
|
||||
set $Temp = ($Temp | (0x01 << 27))
|
||||
p /x $Temp
|
||||
|
||||
set {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN) = $Temp
|
||||
printf "....\n"
|
||||
printf "wakeup bit(%x):%x\n", ($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN), {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN)
|
||||
#===============================================================================
|
||||
#Direct the startup wake function to flash program function
|
||||
#the function pointer address
|
||||
#set $testpointer = 0x200006b4
|
||||
#set $testpointer2 = 0x200006b8
|
||||
#set $FuntionPointer = 0x200006c4
|
||||
#set $FPTemp = 0x200a08e9
|
||||
#set {int}($FuntionPointer) = $FPTemp
|
||||
#printf "testpointer(%x):%x\n", $testpointer, {int}$testpointer
|
||||
#printf "testpointer2(%x):%x\n", $testpointer2, {int}$testpointer2
|
||||
#printf "FuntionPointer(%x):%x\n", $FuntionPointer, {int}$FuntionPointer
|
||||
|
||||
#===============================================================================
|
||||
#Load file
|
||||
# restore filename [binary] bias start end
|
||||
# Restore the contents of file filename into memory.
|
||||
# The restore command can automatically recognize any known bfd file format, except for raw binary.
|
||||
# To restore a raw binary file you must specify the optional keyword binary after the filename.
|
||||
#===============================================================================
|
||||
|
||||
set $LoopNum = ($RamFileSize / $FLASHDATBUFSIZE)
|
||||
printf "LoopNum = %x\n", $LoopNum
|
||||
set $TailSize = ($RamFileSize % $FLASHDATBUFSIZE)
|
||||
printf "TailSize = %x\n", $TailSize
|
||||
|
||||
printf "global variables\n"
|
||||
|
||||
set $FLASHDATSRC = 0x0
|
||||
set $FILESTARTADDR = 0X0
|
||||
set $FILEENDADDR = $FILESTARTADDR + $FLASHDATBUFSIZE
|
||||
|
||||
#b RtlFlashProgram:StartOfFlashBlockWrite
|
||||
b rtl_flash_download.c:489
|
||||
b rtl_flash_download.c:524
|
||||
#b Rtl_flash_control.c:RtlFlashProgram
|
||||
|
||||
#continue to 489
|
||||
c
|
||||
|
||||
# Mode 0: erase full chip, Mode 1: skip calibration section and erase to firmware size
|
||||
set EraseMode=1
|
||||
print EraseMode
|
||||
set FirmwareSize=$RamFileSize
|
||||
print FirmwareSize
|
||||
|
||||
#continue to 524
|
||||
c
|
||||
|
||||
#printf "...\n"
|
||||
set $FLASHDATSRC = FlashDatSrc
|
||||
printf "FlashDatSrc:%x\n", $FLASHDATSRC
|
||||
|
||||
printf "FlashBlockWriteSize "
|
||||
set FlashBlockWriteSize = $FLASHDATBUFSIZE
|
||||
#p /x FlashBlockWriteSize
|
||||
printf "FlashBlockWriteSize:%x\n", FlashBlockWriteSize
|
||||
|
||||
printf "FlashAddrForWrite"
|
||||
set FlashAddrForWrite = 0x0
|
||||
|
||||
|
||||
|
||||
printf "Flash write start...\n"
|
||||
set $LoopCnt = 0
|
||||
while ($LoopCnt < $LoopNum)
|
||||
p /x FlashAddrForWrite
|
||||
restore ./application/Debug/bin/ram_all.bin binary ($FLASHDATSRC-$FILESTARTADDR) $FILESTARTADDR $FILEENDADDR
|
||||
c
|
||||
|
||||
printf "FILEENDADDR"
|
||||
p /x $FILEENDADDR
|
||||
set FlashBlockWriteSize = $FLASHDATBUFSIZE
|
||||
set FlashAddrForWrite = $FILEENDADDR
|
||||
set $FILESTARTADDR = $FILEENDADDR
|
||||
set $FILEENDADDR = $FILESTARTADDR + $FLASHDATBUFSIZE
|
||||
|
||||
set $LoopCnt = $LoopCnt + 0x01
|
||||
end
|
||||
|
||||
#set FlashBlockWriteSize = $FLASHDATBUFSIZE
|
||||
#set FlashAddrForWrite = $FILEENDADDR
|
||||
#set $FILESTARTADDR = $FILEENDADDR
|
||||
set $FILEENDADDR = $FILESTARTADDR + $TailSize
|
||||
restore ./application/Debug/bin/ram_all.bin binary ($FLASHDATSRC-$FILESTARTADDR) $FILESTARTADDR $FILEENDADDR
|
||||
c
|
||||
|
||||
#Set complete flas
|
||||
set FlashWriteComplete = 0x1
|
||||
|
||||
printf "dump for check\n"
|
||||
|
||||
set $LoopCnt = 0
|
||||
set $dumpaddr = 0
|
||||
|
||||
set $dumpstartaddr = $SPI_FLASH_BASE
|
||||
set $dumpendaddr = $SPI_FLASH_BASE + $RamFileSize
|
||||
printf "start addr of dumping"
|
||||
p /x $dumpstartaddr
|
||||
printf "end addr of dumping"
|
||||
p /x $dumpendaddr
|
||||
dump binary memory ./application/Debug/bin/dump.bin $dumpstartaddr $dumpendaddr
|
||||
|
||||
|
||||
delete
|
||||
b rtl_flash_download.c:556
|
||||
c
|
||||
|
||||
quit
|
||||
#===============================================================================
|
||||
|
||||
|
|
@ -0,0 +1,199 @@
|
|||
# GDB script for loading ram.bin process
|
||||
|
||||
#===============================================================================
|
||||
#set GDB connection
|
||||
set remotetimeout 100000
|
||||
target remote :2331
|
||||
|
||||
#===============================================================================
|
||||
#set file path
|
||||
set $BINFILE = "./application/Debug/bin/ram_all.bin"
|
||||
|
||||
#===============================================================================
|
||||
#Message display setting
|
||||
#disable all messages
|
||||
|
||||
set verbose off
|
||||
set complaints 0
|
||||
set confirm off
|
||||
set exec-done-display off
|
||||
show exec-done-display
|
||||
set trace-commands off
|
||||
#set debug aix-thread off
|
||||
#set debug dwarf2-die 0
|
||||
set debug displaced off
|
||||
set debug expression 0
|
||||
set debug frame 0
|
||||
set debug infrun 0
|
||||
set debug observer 0
|
||||
set debug overload 0
|
||||
set debugvarobj 0
|
||||
set pagination off
|
||||
set print address off
|
||||
set print symbol-filename off
|
||||
set print symbol off
|
||||
set print pretty off
|
||||
set print object off
|
||||
#set debug notification off
|
||||
set debug parser off
|
||||
set debug remote 0
|
||||
|
||||
#===============================================================================
|
||||
#set JTAG and external SRAM
|
||||
monitor reset 1
|
||||
monitor sleep 20
|
||||
monitor clrbp
|
||||
#===============================================================================
|
||||
#Variables declaration (1)
|
||||
#binary file size
|
||||
set $RamFileSize = 0x0000
|
||||
source fwsize.gdb
|
||||
printf "-------------------------------\n"
|
||||
printf "RamFileSize: %x\n",$RamFileSize
|
||||
printf "-------------------------------\n"
|
||||
|
||||
#===============================================================================
|
||||
set $FLASHDATBUFSIZE = 0x800
|
||||
|
||||
#===============================================================================
|
||||
#define PERI_ON_BASE 0x40000000
|
||||
set $PERI_ON_BASE = 0x40000000
|
||||
#define REG_SOC_PERI_FUNC0_EN 0x0218
|
||||
set $REG_SOC_PERI_FUNC0_EN = 0x0210
|
||||
|
||||
#define SPI_FLASH_BASE 0x4000000
|
||||
set $SPI_FLASH_BASE = 0x98000000
|
||||
|
||||
#------------------------------------------------------------------
|
||||
set $Temp = 0x0
|
||||
|
||||
#===============================================================================
|
||||
#Load flash download file
|
||||
file ../../../component/soc/realtek/8195a/misc/gcc_utility/target_NORMAL.axf
|
||||
|
||||
#Load the file
|
||||
lo
|
||||
|
||||
printf "Load flash controller.\n"
|
||||
|
||||
#===============================================================================
|
||||
#Set for executing flash controller funciton
|
||||
set $Temp = {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN)
|
||||
p /x $Temp
|
||||
|
||||
set $Temp = ($Temp | (0x01 << 27))
|
||||
p /x $Temp
|
||||
|
||||
set {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN) = $Temp
|
||||
printf "....\n"
|
||||
printf "wakeup bit(%x):%x\n", ($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN), {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN)
|
||||
#===============================================================================
|
||||
#Direct the startup wake function to flash program function
|
||||
#the function pointer address
|
||||
#set $testpointer = 0x200006b4
|
||||
#set $testpointer2 = 0x200006b8
|
||||
#set $FuntionPointer = 0x200006c4
|
||||
#set $FPTemp = 0x200a08e9
|
||||
#set {int}($FuntionPointer) = $FPTemp
|
||||
#printf "testpointer(%x):%x\n", $testpointer, {int}$testpointer
|
||||
#printf "testpointer2(%x):%x\n", $testpointer2, {int}$testpointer2
|
||||
#printf "FuntionPointer(%x):%x\n", $FuntionPointer, {int}$FuntionPointer
|
||||
|
||||
#===============================================================================
|
||||
#Load file
|
||||
# restore filename [binary] bias start end
|
||||
# Restore the contents of file filename into memory.
|
||||
# The restore command can automatically recognize any known bfd file format, except for raw binary.
|
||||
# To restore a raw binary file you must specify the optional keyword binary after the filename.
|
||||
#===============================================================================
|
||||
|
||||
set $LoopNum = ($RamFileSize / $FLASHDATBUFSIZE)
|
||||
printf "LoopNum = %x\n", $LoopNum
|
||||
set $TailSize = ($RamFileSize % $FLASHDATBUFSIZE)
|
||||
printf "TailSize = %x\n", $TailSize
|
||||
|
||||
printf "global variables\n"
|
||||
|
||||
set $FLASHDATSRC = 0x0
|
||||
set $FILESTARTADDR = 0X0
|
||||
set $FILEENDADDR = $FILESTARTADDR + $FLASHDATBUFSIZE
|
||||
|
||||
#b RtlFlashProgram:StartOfFlashBlockWrite
|
||||
b rtl_flash_download.c:489
|
||||
b rtl_flash_download.c:524
|
||||
#b Rtl_flash_control.c:RtlFlashProgram
|
||||
|
||||
#continue to 489
|
||||
c
|
||||
|
||||
# Mode 0: erase full chip, Mode 1: skip calibration section and erase to firmware size
|
||||
set EraseMode=1
|
||||
print EraseMode
|
||||
set FirmwareSize=$RamFileSize
|
||||
print FirmwareSize
|
||||
|
||||
#continue to 524
|
||||
c
|
||||
|
||||
#printf "...\n"
|
||||
set $FLASHDATSRC = FlashDatSrc
|
||||
printf "FlashDatSrc:%x\n", $FLASHDATSRC
|
||||
|
||||
printf "FlashBlockWriteSize "
|
||||
set FlashBlockWriteSize = $FLASHDATBUFSIZE
|
||||
#p /x FlashBlockWriteSize
|
||||
printf "FlashBlockWriteSize:%x\n", FlashBlockWriteSize
|
||||
|
||||
printf "FlashAddrForWrite"
|
||||
set FlashAddrForWrite = 0x0
|
||||
|
||||
|
||||
|
||||
printf "Flash write start...\n"
|
||||
set $LoopCnt = 0
|
||||
while ($LoopCnt < $LoopNum)
|
||||
p /x FlashAddrForWrite
|
||||
restore ./application/Debug/bin/ram_all.bin binary ($FLASHDATSRC-$FILESTARTADDR) $FILESTARTADDR $FILEENDADDR
|
||||
c
|
||||
|
||||
printf "FILEENDADDR"
|
||||
p /x $FILEENDADDR
|
||||
set FlashBlockWriteSize = $FLASHDATBUFSIZE
|
||||
set FlashAddrForWrite = $FILEENDADDR
|
||||
set $FILESTARTADDR = $FILEENDADDR
|
||||
set $FILEENDADDR = $FILESTARTADDR + $FLASHDATBUFSIZE
|
||||
|
||||
set $LoopCnt = $LoopCnt + 0x01
|
||||
end
|
||||
|
||||
#set FlashBlockWriteSize = $FLASHDATBUFSIZE
|
||||
#set FlashAddrForWrite = $FILEENDADDR
|
||||
#set $FILESTARTADDR = $FILEENDADDR
|
||||
set $FILEENDADDR = $FILESTARTADDR + $TailSize
|
||||
restore ./application/Debug/bin/ram_all.bin binary ($FLASHDATSRC-$FILESTARTADDR) $FILESTARTADDR $FILEENDADDR
|
||||
c
|
||||
|
||||
#Set complete flas
|
||||
set FlashWriteComplete = 0x1
|
||||
|
||||
printf "dump for check\n"
|
||||
|
||||
set $LoopCnt = 0
|
||||
set $dumpaddr = 0
|
||||
|
||||
set $dumpstartaddr = $SPI_FLASH_BASE
|
||||
set $dumpendaddr = $SPI_FLASH_BASE + $RamFileSize
|
||||
printf "start addr of dumping"
|
||||
p /x $dumpstartaddr
|
||||
printf "end addr of dumping"
|
||||
p /x $dumpendaddr
|
||||
dump binary memory ./application/Debug/bin/dump.bin $dumpstartaddr $dumpendaddr
|
||||
|
||||
|
||||
delete
|
||||
b rtl_flash_download.c:556
|
||||
c
|
||||
|
||||
quit
|
||||
#===============================================================================
|
||||
|
||||
|
|
@ -0,0 +1,198 @@
|
|||
# GDB script for loading ram.bin process
|
||||
|
||||
#===============================================================================
|
||||
#set GDB connection
|
||||
set remotetimeout 100000
|
||||
target remote :3333
|
||||
|
||||
#===============================================================================
|
||||
#set file path
|
||||
set $BINFILE = "./application/Debug/bin/ram_all.bin"
|
||||
|
||||
#===============================================================================
|
||||
#Message display setting
|
||||
#disable all messages
|
||||
|
||||
set verbose off
|
||||
set complaints 0
|
||||
set confirm off
|
||||
set exec-done-display off
|
||||
show exec-done-display
|
||||
set trace-commands off
|
||||
#set debug aix-thread off
|
||||
#set debug dwarf2-die 0
|
||||
set debug displaced off
|
||||
set debug expression 0
|
||||
set debug frame 0
|
||||
set debug infrun 0
|
||||
set debug observer 0
|
||||
set debug overload 0
|
||||
set debugvarobj 0
|
||||
set pagination off
|
||||
set print address off
|
||||
set print symbol-filename off
|
||||
set print symbol off
|
||||
set print pretty off
|
||||
set print object off
|
||||
#set debug notification off
|
||||
set debug parser off
|
||||
set debug remote 0
|
||||
|
||||
#===============================================================================
|
||||
#set JTAG and external SRAM
|
||||
monitor reset init
|
||||
monitor halt
|
||||
monitor sleep 20
|
||||
#===============================================================================
|
||||
#Variables declaration (1)
|
||||
#binary file size
|
||||
set $RamFileSize = 0x0000
|
||||
source fwsize.gdb
|
||||
printf "-------------------------------\n"
|
||||
printf "RamFileSize: %x\n",$RamFileSize
|
||||
printf "-------------------------------\n"
|
||||
|
||||
#===============================================================================
|
||||
set $FLASHDATBUFSIZE = 0x800
|
||||
|
||||
#===============================================================================
|
||||
#define PERI_ON_BASE 0x40000000
|
||||
set $PERI_ON_BASE = 0x40000000
|
||||
#define REG_SOC_PERI_FUNC0_EN 0x0218
|
||||
set $REG_SOC_PERI_FUNC0_EN = 0x0210
|
||||
|
||||
#define SPI_FLASH_BASE 0x4000000
|
||||
set $SPI_FLASH_BASE = 0x98000000
|
||||
|
||||
#------------------------------------------------------------------
|
||||
set $Temp = 0x0
|
||||
|
||||
#===============================================================================
|
||||
#Load flash download file
|
||||
file ../../../component/soc/realtek/8195a/misc/gcc_utility/target_NORMAL.axf
|
||||
|
||||
#Load the file
|
||||
lo
|
||||
|
||||
printf "Load flash controller.\n"
|
||||
#===============================================================================
|
||||
#Set for executing flash controller funciton
|
||||
set $Temp = {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN)
|
||||
p /x $Temp
|
||||
|
||||
set $Temp = ($Temp | (0x01 << 27))
|
||||
p /x $Temp
|
||||
|
||||
set {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN) = $Temp
|
||||
printf "....\n"
|
||||
printf "wakeup bit(%x):%x\n", ($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN), {int}($PERI_ON_BASE+$REG_SOC_PERI_FUNC0_EN)
|
||||
#===============================================================================
|
||||
#Direct the startup wake function to flash program function
|
||||
#the function pointer address
|
||||
#set $testpointer = 0x200006b4
|
||||
#set $testpointer2 = 0x200006b8
|
||||
#set $FuntionPointer = 0x200006c4
|
||||
#set $FPTemp = 0x200a08e9
|
||||
#set {int}($FuntionPointer) = $FPTemp
|
||||
#printf "testpointer(%x):%x\n", $testpointer, {int}$testpointer
|
||||
#printf "testpointer2(%x):%x\n", $testpointer2, {int}$testpointer2
|
||||
#printf "FuntionPointer(%x):%x\n", $FuntionPointer, {int}$FuntionPointer
|
||||
|
||||
#===============================================================================
|
||||
#Load file
|
||||
# restore filename [binary] bias start end
|
||||
# Restore the contents of file filename into memory.
|
||||
# The restore command can automatically recognize any known bfd file format, except for raw binary.
|
||||
# To restore a raw binary file you must specify the optional keyword binary after the filename.
|
||||
#===============================================================================
|
||||
|
||||
set $LoopNum = ($RamFileSize / $FLASHDATBUFSIZE)
|
||||
printf "LoopNum = %x\n", $LoopNum
|
||||
set $TailSize = ($RamFileSize % $FLASHDATBUFSIZE)
|
||||
printf "TailSize = %x\n", $TailSize
|
||||
|
||||
printf "global variables\n"
|
||||
|
||||
set $FLASHDATSRC = 0x0
|
||||
set $FILESTARTADDR = 0X0
|
||||
set $FILEENDADDR = $FILESTARTADDR + $FLASHDATBUFSIZE
|
||||
|
||||
#b RtlFlashProgram:StartOfFlashBlockWrite
|
||||
b rtl_flash_download.c:489
|
||||
b rtl_flash_download.c:524
|
||||
#b Rtl_flash_control.c:RtlFlashProgram
|
||||
|
||||
#continue to 489
|
||||
c
|
||||
|
||||
# Mode 0: erase full chip, Mode 1: skip calibration section and erase to firmware size
|
||||
set EraseMode=1
|
||||
print EraseMode
|
||||
set FirmwareSize=$RamFileSize
|
||||
print FirmwareSize
|
||||
|
||||
#continue to 524
|
||||
c
|
||||
|
||||
#printf "...\n"
|
||||
set $FLASHDATSRC = FlashDatSrc
|
||||
printf "FlashDatSrc:%x\n", $FLASHDATSRC
|
||||
|
||||
printf "FlashBlockWriteSize "
|
||||
set FlashBlockWriteSize = $FLASHDATBUFSIZE
|
||||
#p /x FlashBlockWriteSize
|
||||
printf "FlashBlockWriteSize:%x\n", FlashBlockWriteSize
|
||||
|
||||
printf "FlashAddrForWrite"
|
||||
set FlashAddrForWrite = 0x0
|
||||
|
||||
|
||||
|
||||
printf "Flash write start...\n"
|
||||
set $LoopCnt = 0
|
||||
while ($LoopCnt < $LoopNum)
|
||||
p /x FlashAddrForWrite
|
||||
restore ./application/Debug/bin/ram_all.bin binary ($FLASHDATSRC-$FILESTARTADDR) $FILESTARTADDR $FILEENDADDR
|
||||
c
|
||||
|
||||
printf "FILEENDADDR"
|
||||
p /x $FILEENDADDR
|
||||
set FlashBlockWriteSize = $FLASHDATBUFSIZE
|
||||
set FlashAddrForWrite = $FILEENDADDR
|
||||
set $FILESTARTADDR = $FILEENDADDR
|
||||
set $FILEENDADDR = $FILESTARTADDR + $FLASHDATBUFSIZE
|
||||
|
||||
set $LoopCnt = $LoopCnt + 0x01
|
||||
end
|
||||
|
||||
#set FlashBlockWriteSize = $FLASHDATBUFSIZE
|
||||
#set FlashAddrForWrite = $FILEENDADDR
|
||||
#set $FILESTARTADDR = $FILEENDADDR
|
||||
set $FILEENDADDR = $FILESTARTADDR + $TailSize
|
||||
restore ./application/Debug/bin/ram_all.bin binary ($FLASHDATSRC-$FILESTARTADDR) $FILESTARTADDR $FILEENDADDR
|
||||
c
|
||||
|
||||
#Set complete flas
|
||||
set FlashWriteComplete = 0x1
|
||||
|
||||
printf "dump for check\n"
|
||||
|
||||
set $LoopCnt = 0
|
||||
set $dumpaddr = 0
|
||||
|
||||
set $dumpstartaddr = $SPI_FLASH_BASE
|
||||
set $dumpendaddr = $SPI_FLASH_BASE + $RamFileSize
|
||||
printf "start addr of dumping"
|
||||
p /x $dumpstartaddr
|
||||
printf "end addr of dumping"
|
||||
p /x $dumpendaddr
|
||||
dump binary memory ./application/Debug/bin/dump.bin $dumpstartaddr $dumpendaddr
|
||||
|
||||
|
||||
delete
|
||||
b rtl_flash_download.c:556
|
||||
c
|
||||
|
||||
quit
|
||||
#===============================================================================
|
||||
|
||||
|
|
@ -0,0 +1,112 @@
|
|||
# GDB script for loading ram.bin process
|
||||
|
||||
#===============================================================================
|
||||
#set GDB connection
|
||||
set remotetimeout 100000
|
||||
target remote :2331
|
||||
|
||||
#===============================================================================
|
||||
#Message display setting
|
||||
#disable all messages
|
||||
|
||||
set verbose off
|
||||
set complaints 0
|
||||
set confirm off
|
||||
set exec-done-display off
|
||||
show exec-done-display
|
||||
set trace-commands off
|
||||
#set debug aix-thread off
|
||||
#set debug dwarf2-die 0
|
||||
set debug displaced off
|
||||
set debug expression 0
|
||||
set debug frame 0
|
||||
set debug infrun 0
|
||||
set debug observer 0
|
||||
set debug overload 0
|
||||
set debugvarobj 0
|
||||
set pagination off
|
||||
set print address off
|
||||
set print symbol-filename off
|
||||
set print symbol off
|
||||
set print pretty off
|
||||
set print object off
|
||||
#set debug notification off
|
||||
set debug parser off
|
||||
set debug remote 0
|
||||
|
||||
#===============================================================================
|
||||
monitor reset 1
|
||||
monitor sleep 20
|
||||
monitor clrbp
|
||||
#===============================================================================
|
||||
#Init SDRAM here
|
||||
# init System
|
||||
monitor MemU32 0x40000014=0x00000021
|
||||
monitor sleep 10
|
||||
monitor MemU32 0x40000304=0x1fc00002
|
||||
monitor sleep 10
|
||||
monitor MemU32 0x40000250=0x00000400
|
||||
monitor sleep 10
|
||||
monitor MemU32 0x40000340=0x00000000
|
||||
monitor sleep 10
|
||||
monitor MemU32 0x40000230=0x0000dcc4
|
||||
monitor sleep 10
|
||||
monitor MemU32 0x40000210=0x00011117
|
||||
monitor sleep 10
|
||||
monitor MemU32 0x40000210=0x00011157
|
||||
monitor sleep 10
|
||||
monitor MemU32 0x400002c0=0x00110011
|
||||
monitor sleep 10
|
||||
monitor MemU32 0x40000320=0xffffffff
|
||||
monitor sleep 10
|
||||
# init SDRAM
|
||||
monitor MemU32 0x40000040=0x00fcc702
|
||||
monitor sleep 10
|
||||
monitor MemU32 0x40000040
|
||||
monitor MemU32 0x40005224=0x00000001
|
||||
monitor sleep 10
|
||||
monitor MemU32 0x40005004=0x00000208
|
||||
monitor sleep 10
|
||||
monitor MemU32 0x40005008=0xffffd000
|
||||
monitor sleep 13
|
||||
monitor MemU32 0x40005020=0x00000022
|
||||
monitor sleep 13
|
||||
monitor MemU32 0x40005010=0x09006201
|
||||
monitor sleep 13
|
||||
monitor MemU32 0x40005014=0x00002611
|
||||
monitor sleep 13
|
||||
monitor MemU32 0x40005018=0x00068413
|
||||
monitor sleep 13
|
||||
monitor MemU32 0x4000501c=0x00000042
|
||||
monitor sleep 13
|
||||
monitor MemU32 0x4000500c=0x700
|
||||
monitor sleep 20
|
||||
monitor MemU32 0x40005000=0x1
|
||||
monitor sleep 100
|
||||
monitor MemU32 0x40005000
|
||||
monitor MemU32 0x4000500c=0x600
|
||||
monitor sleep 30
|
||||
|
||||
monitor MemU32 0x40005008=0x00000000
|
||||
monitor sleep 3
|
||||
monitor MemU32 0x40000300=0x0006005e
|
||||
monitor sleep 3
|
||||
#===============================================================================
|
||||
#Load flash download file
|
||||
file ./application/Debug/bin/application.axf
|
||||
|
||||
#boot from ram, igonore loading flash
|
||||
monitor MemU32 0x40000210=0x8011157
|
||||
|
||||
#Load the file
|
||||
lo
|
||||
|
||||
#Run to main
|
||||
b main
|
||||
continue
|
||||
clear main
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,112 @@
|
|||
# GDB script for loading ram.bin process
|
||||
|
||||
#===============================================================================
|
||||
#set GDB connection
|
||||
set remotetimeout 100000
|
||||
target remote :2331
|
||||
|
||||
#===============================================================================
|
||||
#Message display setting
|
||||
#disable all messages
|
||||
|
||||
set verbose off
|
||||
set complaints 0
|
||||
set confirm off
|
||||
set exec-done-display off
|
||||
show exec-done-display
|
||||
set trace-commands off
|
||||
#set debug aix-thread off
|
||||
#set debug dwarf2-die 0
|
||||
set debug displaced off
|
||||
set debug expression 0
|
||||
set debug frame 0
|
||||
set debug infrun 0
|
||||
set debug observer 0
|
||||
set debug overload 0
|
||||
set debugvarobj 0
|
||||
set pagination off
|
||||
set print address off
|
||||
set print symbol-filename off
|
||||
set print symbol off
|
||||
set print pretty off
|
||||
set print object off
|
||||
#set debug notification off
|
||||
set debug parser off
|
||||
set debug remote 0
|
||||
|
||||
#===============================================================================
|
||||
monitor reset 1
|
||||
monitor sleep 20
|
||||
monitor clrbp
|
||||
#===============================================================================
|
||||
#Init SDRAM here
|
||||
# init System
|
||||
monitor MemU32 0x40000014=0x00000021
|
||||
monitor sleep 10
|
||||
monitor MemU32 0x40000304=0x1fc00002
|
||||
monitor sleep 10
|
||||
monitor MemU32 0x40000250=0x00000400
|
||||
monitor sleep 10
|
||||
monitor MemU32 0x40000340=0x00000000
|
||||
monitor sleep 10
|
||||
monitor MemU32 0x40000230=0x0000dcc4
|
||||
monitor sleep 10
|
||||
monitor MemU32 0x40000210=0x00011117
|
||||
monitor sleep 10
|
||||
monitor MemU32 0x40000210=0x00011157
|
||||
monitor sleep 10
|
||||
monitor MemU32 0x400002c0=0x00110011
|
||||
monitor sleep 10
|
||||
monitor MemU32 0x40000320=0xffffffff
|
||||
monitor sleep 10
|
||||
# init SDRAM
|
||||
monitor MemU32 0x40000040=0x00fcc702
|
||||
monitor sleep 10
|
||||
monitor MemU32 0x40000040
|
||||
monitor MemU32 0x40005224=0x00000001
|
||||
monitor sleep 10
|
||||
monitor MemU32 0x40005004=0x00000208
|
||||
monitor sleep 10
|
||||
monitor MemU32 0x40005008=0xffffd000
|
||||
monitor sleep 13
|
||||
monitor MemU32 0x40005020=0x00000022
|
||||
monitor sleep 13
|
||||
monitor MemU32 0x40005010=0x09006201
|
||||
monitor sleep 13
|
||||
monitor MemU32 0x40005014=0x00002611
|
||||
monitor sleep 13
|
||||
monitor MemU32 0x40005018=0x00068413
|
||||
monitor sleep 13
|
||||
monitor MemU32 0x4000501c=0x00000042
|
||||
monitor sleep 13
|
||||
monitor MemU32 0x4000500c=0x700
|
||||
monitor sleep 20
|
||||
monitor MemU32 0x40005000=0x1
|
||||
monitor sleep 100
|
||||
monitor MemU32 0x40005000
|
||||
monitor MemU32 0x4000500c=0x600
|
||||
monitor sleep 30
|
||||
|
||||
monitor MemU32 0x40005008=0x00000000
|
||||
monitor sleep 3
|
||||
monitor MemU32 0x40000300=0x0006005e
|
||||
monitor sleep 3
|
||||
#===============================================================================
|
||||
#Load flash download file
|
||||
file ./application/Debug/bin/application.axf
|
||||
|
||||
#boot from ram, igonore loading flash
|
||||
monitor MemU32 0x40000210=0x8011157
|
||||
|
||||
#Load the file
|
||||
lo
|
||||
|
||||
#Run to main
|
||||
b main
|
||||
continue
|
||||
clear main
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,59 @@
|
|||
# GDB script for loading ram.bin process
|
||||
|
||||
#===============================================================================
|
||||
#set GDB connection
|
||||
set remotetimeout 100000
|
||||
target remote :3333
|
||||
|
||||
#===============================================================================
|
||||
#Message display setting
|
||||
#disable all messages
|
||||
|
||||
set verbose off
|
||||
set complaints 0
|
||||
set confirm off
|
||||
set exec-done-display off
|
||||
show exec-done-display
|
||||
set trace-commands off
|
||||
#set debug aix-thread off
|
||||
#set debug dwarf2-die 0
|
||||
set debug displaced off
|
||||
set debug expression 0
|
||||
set debug frame 0
|
||||
set debug infrun 0
|
||||
set debug observer 0
|
||||
set debug overload 0
|
||||
set debugvarobj 0
|
||||
set pagination off
|
||||
set print address off
|
||||
set print symbol-filename off
|
||||
set print symbol off
|
||||
set print pretty off
|
||||
set print object off
|
||||
#set debug notification off
|
||||
set debug parser off
|
||||
set debug remote 0
|
||||
|
||||
#===============================================================================
|
||||
monitor reset init
|
||||
monitor sleep 20
|
||||
monitor halt
|
||||
#===============================================================================
|
||||
#Load flash download file
|
||||
file ./application/Debug/bin/application.axf
|
||||
|
||||
#boot from ram, igonore loading flash
|
||||
set {int}0x40000210=0x8011157
|
||||
|
||||
#Load the file
|
||||
lo
|
||||
|
||||
#Run to main
|
||||
b main
|
||||
continue
|
||||
clear main
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
BIN
component/soc/realtek/8195a/misc/gcc_utility/target_NORMAL.axf
Normal file
BIN
component/soc/realtek/8195a/misc/gcc_utility/target_NORMAL.axf
Normal file
Binary file not shown.
BIN
component/soc/realtek/8195a/misc/gcc_utility/target_NORMALB.axf
Normal file
BIN
component/soc/realtek/8195a/misc/gcc_utility/target_NORMALB.axf
Normal file
Binary file not shown.
BIN
component/soc/realtek/8195a/misc/gcc_utility/target_NORMALC.axf
Normal file
BIN
component/soc/realtek/8195a/misc/gcc_utility/target_NORMALC.axf
Normal file
Binary file not shown.
|
|
@ -0,0 +1,23 @@
|
|||
;; Memory information ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
;;
|
||||
;; Used to define address zones within the ARM address space (Memory).
|
||||
;;
|
||||
;; Name may be almost anything
|
||||
;; AdrSpace must be Memory
|
||||
;; StartAdr start of memory block
|
||||
;; EndAdr end of memory block
|
||||
;; AccType type of access, read-only (R), read-write (RW) or SFR (W)
|
||||
|
||||
[Memory]
|
||||
;; Name AdrSpace StartAdr EndAdr AccType Width
|
||||
Memory = ROM Memory 0x00000000 0x003FFFFF RW
|
||||
Memory = SRAM Memory 0x10000000 0x1FFFFFFF RW
|
||||
Memory = DRAM Memory 0x30000000 0x30FFFFFF RW
|
||||
Memory = SFR Memory 0x40000000 0x41FFFFFF RW
|
||||
Memory = SFR_Bitband Memory 0x42000000 0x43FFFFFF RW
|
||||
Memory = PPB Memory 0xE0000000 0xFFFFFFFF RW
|
||||
|
||||
TrustedRanges = true
|
||||
UseSfrFilter = true
|
||||
|
||||
[SfrInclude]
|
||||
|
|
@ -0,0 +1,41 @@
|
|||
__load_dram_param(){
|
||||
//DRAM_INFO
|
||||
DeviceType = 8; //DRAM_SDR
|
||||
Page = 0; //DRAM_COLADDR_8B
|
||||
Bank=0; //DRAM_BANK_2
|
||||
DqWidth=0; //DRAM_DQ_1
|
||||
|
||||
//DRAM_MODE_REG_INFO
|
||||
BstLen=0; //BST_LEN_4
|
||||
BstType=0; //SENQUENTIAL
|
||||
Mode0Cas=3;
|
||||
Mode0Wr=0;
|
||||
Mode1DllEnN=0;
|
||||
Mode1AllLat=0;
|
||||
Mode2Cwl=0;
|
||||
|
||||
//DRAM_TIMING_INFO
|
||||
DramTimingTref = 64000;
|
||||
DramRowNum = 8192;
|
||||
//SDR 100MHZ==>10000, 50MHZ==>20000, 25MHZ==>40000, 12.5MHZ==>80000
|
||||
Tck = 80000; //SDR 12.5MHZ
|
||||
|
||||
TrfcPs=60000;
|
||||
TrefiPs=((DramTimingTref*1000)/DramRowNum)*1000;
|
||||
WrMaxTck=2;
|
||||
TrcdPs=15000;
|
||||
TrpPs=15000;
|
||||
TrasPs=42000;
|
||||
TrrdTck=2;
|
||||
TwrPs=Tck*2;
|
||||
TwtrTck=0;
|
||||
TmrdTck=2;
|
||||
TrtpTck=0;
|
||||
TccdTck=1;
|
||||
TrcPs=60000;
|
||||
|
||||
//DRAM_DEVICE_INFO
|
||||
DdrPeriodPs=Tck;
|
||||
DfiRate=0; //DFI_RATIO_1
|
||||
|
||||
}
|
||||
|
|
@ -0,0 +1,4 @@
|
|||
|
||||
__load_dram_common(){
|
||||
__registerMacroFile("$PROJ_DIR$\\..\\..\\..\\component\\soc\\realtek\\8195a\\misc\\iar_utility\\common\\dram\\EM6A6165TS_7G.mac");
|
||||
}
|
||||
|
|
@ -0,0 +1,4 @@
|
|||
To Change DRAM setting
|
||||
|
||||
1. Create and Fill content like EM6A6165TS_7G.mac
|
||||
2. Change load file in common.mac
|
||||
File diff suppressed because it is too large
Load diff
|
|
@ -0,0 +1,982 @@
|
|||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<project>
|
||||
<fileVersion>2</fileVersion>
|
||||
<configuration>
|
||||
<name>Debug</name>
|
||||
<toolchain>
|
||||
<name>ARM</name>
|
||||
</toolchain>
|
||||
<debug>1</debug>
|
||||
<settings>
|
||||
<name>General</name>
|
||||
<archiveVersion>3</archiveVersion>
|
||||
<data>
|
||||
<version>22</version>
|
||||
<wantNonLocal>1</wantNonLocal>
|
||||
<debug>1</debug>
|
||||
<option>
|
||||
<name>ExePath</name>
|
||||
<state>$PROJ_DIR$\..</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>ObjPath</name>
|
||||
<state>Debug\Obj</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>ListPath</name>
|
||||
<state>Debug\List</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>Variant</name>
|
||||
<version>21</version>
|
||||
<state>38</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GEndianMode</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>Input variant</name>
|
||||
<version>3</version>
|
||||
<state>6</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>Input description</name>
|
||||
<state>No specifier n, no float nor long long, no scan set, no assignment suppressing.</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>Output variant</name>
|
||||
<version>2</version>
|
||||
<state>5</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>Output description</name>
|
||||
<state>No specifier a, A, no specifier n, no float nor long long.</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GOutputBinary</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>FPU</name>
|
||||
<version>3</version>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OGCoreOrChip</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GRuntimeLibSelect</name>
|
||||
<version>0</version>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GRuntimeLibSelectSlave</name>
|
||||
<version>0</version>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>RTDescription</name>
|
||||
<state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OGProductVersion</name>
|
||||
<state>6.30.4.53294</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OGLastSavedByProductVersion</name>
|
||||
<state>7.30.3.8061</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GeneralEnableMisra</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GeneralMisraVerbose</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OGChipSelectEditMenu</name>
|
||||
<state>LPC1850 NXP LPC1850</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenLowLevelInterface</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GEndianModeBE</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OGBufferedTerminalOutput</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GenStdoutInterface</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GeneralMisraRules98</name>
|
||||
<version>0</version>
|
||||
<state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GeneralMisraVer</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GeneralMisraRules04</name>
|
||||
<version>0</version>
|
||||
<state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>RTConfigPath2</name>
|
||||
<state>$TOOLKIT_DIR$\INC\c\DLib_Config_Normal.h</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GFPUCoreSlave</name>
|
||||
<version>21</version>
|
||||
<state>38</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GBECoreSlave</name>
|
||||
<version>21</version>
|
||||
<state>38</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OGUseCmsis</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OGUseCmsisDspLib</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>GRuntimeLibThreads</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
</data>
|
||||
</settings>
|
||||
<settings>
|
||||
<name>ICCARM</name>
|
||||
<archiveVersion>2</archiveVersion>
|
||||
<data>
|
||||
<version>31</version>
|
||||
<wantNonLocal>1</wantNonLocal>
|
||||
<debug>1</debug>
|
||||
<option>
|
||||
<name>CCOptimizationNoSizeConstraints</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCDefines</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCPreprocFile</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCPreprocComments</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCPreprocLine</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCListCFile</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCListCMnemonics</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCListCMessages</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCListAssFile</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCListAssSource</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCEnableRemarks</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCDiagSuppress</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCDiagRemark</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCDiagWarning</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCDiagError</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCObjPrefix</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCAllowList</name>
|
||||
<version>1</version>
|
||||
<state>10010100</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCDebugInfo</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IEndianMode</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IProcessor</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IExtraOptionsCheck</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IExtraOptions</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCLangConformance</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCSignedPlainChar</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCRequirePrototypes</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCMultibyteSupport</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCDiagWarnAreErr</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCCompilerRuntimeInfo</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IFpuProcessor</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OutputFile</name>
|
||||
<state>$FILE_BNAME$.o</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCLibConfigHeader</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>PreInclude</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CompilerMisraOverride</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCIncludePath2</name>
|
||||
<state>$PROJ_DIR$\.</state>
|
||||
<state>$PROJ_DIR$\framework2</state>
|
||||
<state>$PROJ_DIR$\..\..\..\..\..\..\..\..\..\component\soc\realtek\common\bsp</state>
|
||||
<state>$PROJ_DIR$\..\..\..\..\..\..\..\..\..\component\soc\realtek\8195a\misc\driver</state>
|
||||
<state>$PROJ_DIR$\..\..\..\..\..\..\..\..\..\component\common\api\network\include</state>
|
||||
<state>$PROJ_DIR$\..\..\..\..\..\..\..\..\..\component\common\api</state>
|
||||
<state>$PROJ_DIR$\..\..\..\..\..\..\..\..\..\component\common\api\platform</state>
|
||||
<state>$PROJ_DIR$\..\..\..\..\..\..\..\..\..\component\soc\realtek\8195a\cmsis</state>
|
||||
<state>$PROJ_DIR$\..\..\..\..\..\..\..\..\..\component\soc\realtek\8195a\cmsis\device</state>
|
||||
<state>$PROJ_DIR$\..\..\..\..\..\..\..\..\..\component\soc\realtek\8195a\fwlib</state>
|
||||
<state>$PROJ_DIR$\..\..\..\..\..\..\..\..\..\component\soc\realtek\8195a\fwlib\rtl8195a</state>
|
||||
<state>$PROJ_DIR$\..\..\..\..\..\..\..\..\..\component\common\utilities</state>
|
||||
<state>$PROJ_DIR$\..\..\..\..\..\..\..\..\..\component\soc\realtek\8195a\misc\rtl_std_lib\include</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCStdIncCheck</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCCodeSection</name>
|
||||
<state>.text</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IInterwork2</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IProcessorMode2</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCOptLevel</name>
|
||||
<state>2</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCOptStrategy</name>
|
||||
<version>0</version>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCOptLevelSlave</name>
|
||||
<state>2</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CompilerMisraRules98</name>
|
||||
<version>0</version>
|
||||
<state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CompilerMisraRules04</name>
|
||||
<version>0</version>
|
||||
<state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCPosIndRopi</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCPosIndRwpi</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCPosIndNoDynInit</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IccLang</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IccCDialect</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IccAllowVLA</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IccCppDialect</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IccExceptions</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IccRTTI</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IccStaticDestr</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IccCppInlineSemantics</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IccCmsis</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IccFloatSemantics</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCNoLiteralPool</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCOptStrategySlave</name>
|
||||
<version>0</version>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CCGuardCalls</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
</data>
|
||||
</settings>
|
||||
<settings>
|
||||
<name>AARM</name>
|
||||
<archiveVersion>2</archiveVersion>
|
||||
<data>
|
||||
<version>9</version>
|
||||
<wantNonLocal>1</wantNonLocal>
|
||||
<debug>1</debug>
|
||||
<option>
|
||||
<name>AObjPrefix</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>AEndian</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>ACaseSensitivity</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>MacroChars</name>
|
||||
<version>0</version>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>AWarnEnable</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>AWarnWhat</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>AWarnOne</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>AWarnRange1</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>AWarnRange2</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>ADebug</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>AltRegisterNames</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>ADefines</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>AList</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>AListHeader</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>AListing</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>Includes</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>MacDefs</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>MacExps</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>MacExec</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OnlyAssed</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>MultiLine</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>PageLengthCheck</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>PageLength</name>
|
||||
<state>80</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>TabSpacing</name>
|
||||
<state>8</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>AXRef</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>AXRefDefines</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>AXRefInternal</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>AXRefDual</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>AProcessor</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>AFpuProcessor</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>AOutputFile</name>
|
||||
<state>$FILE_BNAME$.o</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>AMultibyteSupport</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>ALimitErrorsCheck</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>ALimitErrorsEdit</name>
|
||||
<state>100</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>AIgnoreStdInclude</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>AUserIncludes</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>AExtraOptionsCheckV2</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>AExtraOptionsV2</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>AsmNoLiteralPool</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
</data>
|
||||
</settings>
|
||||
<settings>
|
||||
<name>OBJCOPY</name>
|
||||
<archiveVersion>0</archiveVersion>
|
||||
<data>
|
||||
<version>1</version>
|
||||
<wantNonLocal>1</wantNonLocal>
|
||||
<debug>1</debug>
|
||||
<option>
|
||||
<name>OOCOutputFormat</name>
|
||||
<version>2</version>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OCOutputOverride</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OOCOutputFile</name>
|
||||
<state>FlashLoader.srec</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OOCCommandLineProducer</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>OOCObjCopyEnable</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
</data>
|
||||
</settings>
|
||||
<settings>
|
||||
<name>CUSTOM</name>
|
||||
<archiveVersion>3</archiveVersion>
|
||||
<data>
|
||||
<extensions></extensions>
|
||||
<cmdline></cmdline>
|
||||
<hasPrio>0</hasPrio>
|
||||
</data>
|
||||
</settings>
|
||||
<settings>
|
||||
<name>BICOMP</name>
|
||||
<archiveVersion>0</archiveVersion>
|
||||
<data/>
|
||||
</settings>
|
||||
<settings>
|
||||
<name>BUILDACTION</name>
|
||||
<archiveVersion>1</archiveVersion>
|
||||
<data>
|
||||
<prebuild></prebuild>
|
||||
<postbuild></postbuild>
|
||||
</data>
|
||||
</settings>
|
||||
<settings>
|
||||
<name>ILINK</name>
|
||||
<archiveVersion>0</archiveVersion>
|
||||
<data>
|
||||
<version>16</version>
|
||||
<wantNonLocal>1</wantNonLocal>
|
||||
<debug>1</debug>
|
||||
<option>
|
||||
<name>IlinkLibIOConfig</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>XLinkMisraHandler</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkInputFileSlave</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkOutputFile</name>
|
||||
<state>FlashRTL8195aMP.out</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkDebugInfoEnable</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkKeepSymbols</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkRawBinaryFile</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkRawBinarySymbol</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkRawBinarySegment</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkRawBinaryAlign</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkDefines</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkConfigDefines</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkMapFile</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkLogFile</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkLogInitialization</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkLogModule</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkLogSection</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkLogVeneer</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkIcfOverride</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkIcfFile</name>
|
||||
<state>$PROJ_DIR$\mx25l8008_flashloader_mp.icf</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkIcfFileSlave</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkEnableRemarks</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkSuppressDiags</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkTreatAsRem</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkTreatAsWarn</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkTreatAsErr</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkWarningsAreErrors</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkUseExtraOptions</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkExtraOptions</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkLowLevelInterfaceSlave</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkAutoLibEnable</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkAdditionalLibs</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkOverrideProgramEntryLabel</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkProgramEntryLabelSelect</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkProgramEntryLabel</name>
|
||||
<state>FlashInitEntry</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>DoFill</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>FillerByte</name>
|
||||
<state>0xFF</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>FillerStart</name>
|
||||
<state>0x0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>FillerEnd</name>
|
||||
<state>0x0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CrcSize</name>
|
||||
<version>0</version>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CrcAlign</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CrcPoly</name>
|
||||
<state>0x11021</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CrcCompl</name>
|
||||
<version>0</version>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CrcBitOrder</name>
|
||||
<version>0</version>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CrcInitialValue</name>
|
||||
<state>0x0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>DoCrc</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkBE8Slave</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkBufferedTerminalOutput</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkStdoutInterfaceSlave</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CrcFullSize</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkIElfToolPostProcess</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkLogAutoLibSelect</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkLogRedirSymbols</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkLogUnusedFragments</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkCrcReverseByteOrder</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkCrcUseAsInput</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkOptInline</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkOptExceptionsAllow</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkOptExceptionsForce</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkCmsis</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkOptMergeDuplSections</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkOptUseVfe</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkOptForceVfe</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkStackAnalysisEnable</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkStackControlFile</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkStackCallGraphFile</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CrcAlgorithm</name>
|
||||
<version>0</version>
|
||||
<state>1</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>CrcUnitSize</name>
|
||||
<version>0</version>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IlinkThreadsSlave</name>
|
||||
<state>1</state>
|
||||
</option>
|
||||
</data>
|
||||
</settings>
|
||||
<settings>
|
||||
<name>IARCHIVE</name>
|
||||
<archiveVersion>0</archiveVersion>
|
||||
<data>
|
||||
<version>0</version>
|
||||
<wantNonLocal>1</wantNonLocal>
|
||||
<debug>1</debug>
|
||||
<option>
|
||||
<name>IarchiveInputs</name>
|
||||
<state></state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IarchiveOverride</name>
|
||||
<state>0</state>
|
||||
</option>
|
||||
<option>
|
||||
<name>IarchiveOutput</name>
|
||||
<state>###Unitialized###</state>
|
||||
</option>
|
||||
</data>
|
||||
</settings>
|
||||
<settings>
|
||||
<name>BILINK</name>
|
||||
<archiveVersion>0</archiveVersion>
|
||||
<data/>
|
||||
</settings>
|
||||
</configuration>
|
||||
<group>
|
||||
<name>Framework</name>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\framework2\flash_loader.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\framework2\flash_loader_asm.s</name>
|
||||
</file>
|
||||
</group>
|
||||
<group>
|
||||
<name>rtl8195a</name>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\rtl8195a\hal_misc.c</name>
|
||||
</file>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\..\..\..\..\..\fwlib\ram_lib\hal_spi_flash_ram.c</name>
|
||||
</file>
|
||||
</group>
|
||||
<file>
|
||||
<name>$PROJ_DIR$\flash_MX25L8008.c</name>
|
||||
</file>
|
||||
</project>
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,10 @@
|
|||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<workspace>
|
||||
<project>
|
||||
<path>$WS_DIR$\FlashLoader.ewp</path>
|
||||
</project>
|
||||
<batchBuild/>
|
||||
</workspace>
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,376 @@
|
|||
/*******************************************************************************
|
||||
*
|
||||
* Project: Realtek Ameba flash loader project
|
||||
*
|
||||
* Description: Memory-specific routines for Flash Loader.
|
||||
*
|
||||
* Copyright by Diolan Ltd. All rights reserved.
|
||||
*
|
||||
*******************************************************************************/
|
||||
#include <string.h>
|
||||
#include <stdlib.h>
|
||||
#include "flash_loader.h"
|
||||
#include "flash_loader_extra.h"
|
||||
|
||||
#include "rtl8195a.h"
|
||||
//#include "rtl8195a/hal_misc.h"
|
||||
//#include "rtl8195a/hal_spi_flash.h"
|
||||
//#include "rtl8195a/core_cm3.h"
|
||||
|
||||
extern VOID
|
||||
HalReInitPlatformLogUart(
|
||||
VOID
|
||||
);
|
||||
|
||||
extern VOID
|
||||
SpicLoadInitParaFromClockRtl8195A
|
||||
(
|
||||
IN u8 CpuClkMode,
|
||||
IN u8 BaudRate,
|
||||
IN PSPIC_INIT_PARA pSpicInitPara
|
||||
);
|
||||
|
||||
extern VOID
|
||||
SpicWaitBusyDoneRtl8195A();
|
||||
|
||||
extern VOID
|
||||
SpicWaitWipDoneRtl8195A
|
||||
(
|
||||
IN SPIC_INIT_PARA SpicInitPara
|
||||
);
|
||||
|
||||
extern VOID
|
||||
SpicTxCmdRtl8195A
|
||||
(
|
||||
IN u8 cmd,
|
||||
IN SPIC_INIT_PARA SpicInitPara
|
||||
);
|
||||
|
||||
extern u8
|
||||
SpicGetFlashStatusRtl8195A
|
||||
(
|
||||
IN SPIC_INIT_PARA SpicInitPara
|
||||
);
|
||||
|
||||
__no_init unsigned int flash_loc;
|
||||
__no_init unsigned int erase_loc;
|
||||
__no_init unsigned int is_cascade;
|
||||
__no_init unsigned int is_head;
|
||||
__no_init unsigned int is_dbgmsg;
|
||||
__no_init unsigned int is_erasecal;
|
||||
__no_init unsigned int img2_addr;
|
||||
|
||||
int rest_count;
|
||||
int first_write;
|
||||
SPIC_INIT_PARA SpicInitPara;
|
||||
|
||||
#define PATTERN_1 0x96969999
|
||||
#define PATTERN_2 0xFC66CC3F
|
||||
#define PATTERN_3 0x03CC33C0
|
||||
#define PATTERN_4 0x6231DCE5
|
||||
|
||||
|
||||
#define DBGPRINT(fmt, arg...) do{ if( is_dbgmsg ) DiagPrintf(fmt, ##arg);}while(0)
|
||||
|
||||
//unsigned int fw_head[4] = {PATTERN_1, PATTERN_2, PATTERN_3, PATTERN_4};
|
||||
unsigned int seg_head[4] = {0,0,0,0};
|
||||
|
||||
extern SPIC_INIT_PARA SpicInitCPUCLK[4];
|
||||
|
||||
void dump_flash_header(void)
|
||||
{
|
||||
uint32_t data;
|
||||
data = HAL_READ32(SPI_FLASH_BASE, 0);
|
||||
DBGPRINT("\n\r 0: %x", data);
|
||||
data = HAL_READ32(SPI_FLASH_BASE, 4);
|
||||
DBGPRINT("\n\r 4: %x", data);
|
||||
data = HAL_READ32(SPI_FLASH_BASE, 8);
|
||||
DBGPRINT("\n\r 8: %x", data);
|
||||
data = HAL_READ32(SPI_FLASH_BASE, 12);
|
||||
DBGPRINT("\n\r 12: %x", data);
|
||||
}
|
||||
|
||||
const char* find_option(char* option, int withValue, int argc, char const* argv[])
|
||||
{
|
||||
int i;
|
||||
for (i = 0; i < argc; i++) {
|
||||
if (strcmp(option, argv[i]) == 0){
|
||||
if (withValue) {
|
||||
if (i + 1 < argc) {
|
||||
// The next argument is the value.
|
||||
return argv[i + 1];
|
||||
}
|
||||
else {
|
||||
// The option was found but there is no value to return.
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
// Return the flag argument itself just to get a non-zero pointer.
|
||||
return argv[i];
|
||||
}
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static VOID
|
||||
FlashDownloadHalInitialROMCodeGlobalVar(VOID)
|
||||
{
|
||||
// to initial ROM code using global variable
|
||||
ConfigDebugErr = _DBG_MISC_;
|
||||
ConfigDebugInfo= 0x0;
|
||||
ConfigDebugWarn= 0x0;
|
||||
}
|
||||
|
||||
static VOID
|
||||
FlashDownloadHalCleanROMCodeGlobalVar(VOID)
|
||||
{
|
||||
ConfigDebugErr = 0x0;
|
||||
ConfigDebugInfo= 0x0;
|
||||
ConfigDebugWarn= 0x0;
|
||||
}
|
||||
|
||||
// Please clean this Array
|
||||
extern SPIC_INIT_PARA SpicInitParaAllClk[3][CPU_CLK_TYPE_NO];
|
||||
|
||||
u8 FlashType;
|
||||
uint32_t FlashInit(void *base_of_flash, uint32_t image_size, uint32_t link_address, uint32_t flags, int argc, char const *argv[])
|
||||
{
|
||||
u8 CpuClk;
|
||||
u8 Value8, InitBaudRate;
|
||||
|
||||
char *addr;
|
||||
|
||||
SPIC_INIT_PARA InitCPUCLK[4] = {
|
||||
{0x1,0x1,0x5E,0}, //default cpu 41, baud 1
|
||||
{0x1,0x1,0x0,0}, //cpu 20.8 , baud 1
|
||||
{0x1,0x2,0x23,0}, //cpu 83.3, baud 1
|
||||
{0x1,0x5,0x5,0},
|
||||
};
|
||||
memcpy(SpicInitCPUCLK, InitCPUCLK, sizeof(InitCPUCLK));
|
||||
memset(SpicInitParaAllClk, 0, sizeof(SPIC_INIT_PARA)*3*CPU_CLK_TYPE_NO);
|
||||
|
||||
SpicInitPara.BaudRate = 0;
|
||||
SpicInitPara.DelayLine = 0;
|
||||
SpicInitPara.RdDummyCyle = 0;
|
||||
SpicInitPara.Rsvd = 0;
|
||||
|
||||
if(find_option( "--erase_cal", 0, argc, argv ))
|
||||
is_erasecal = 1;
|
||||
else
|
||||
is_erasecal = 0;
|
||||
|
||||
if(find_option( "--cascade", 0, argc, argv ))
|
||||
is_cascade = 1;
|
||||
else
|
||||
is_cascade = 0;
|
||||
|
||||
if(find_option( "--head", 0, argc, argv ))
|
||||
is_head = 1;
|
||||
else
|
||||
is_head = 0;
|
||||
|
||||
if(find_option( "--dbgmsg", 0, argc, argv ))
|
||||
is_dbgmsg = 1;
|
||||
else
|
||||
is_dbgmsg = 0;
|
||||
|
||||
if( (addr = (char*)find_option( "--img2_addr", 1, argc, argv))){
|
||||
img2_addr = strtod(addr, NULL)/1024;
|
||||
DBG_8195A(" image2 start address = %s, offset = %x\n\r", addr, img2_addr);
|
||||
}else
|
||||
img2_addr = 0;
|
||||
|
||||
memset((void *) 0x10000300, 0, 0xbc0-0x300);
|
||||
|
||||
// Load Efuse Setting
|
||||
Value8 = ((HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_EFUSE_SYSCFG6) & 0xFF000000)
|
||||
>> 24);
|
||||
|
||||
InitBaudRate = ((Value8 & 0xC)>>2);
|
||||
|
||||
// Make sure InitBaudRate != 0
|
||||
if (!InitBaudRate) {
|
||||
InitBaudRate +=1;
|
||||
}
|
||||
|
||||
CpuClk = ((HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_CLK_CTRL1) & (0x70)) >> 4);
|
||||
SpicLoadInitParaFromClockRtl8195A(CpuClk, InitBaudRate, &SpicInitPara);
|
||||
|
||||
// Reset to low speed
|
||||
HAL_WRITE32(SYSTEM_CTRL_BASE, REG_SYS_CLK_CTRL1, 0x21);
|
||||
|
||||
FlashDownloadHalInitialROMCodeGlobalVar();
|
||||
|
||||
//2 Need Modify
|
||||
VectorTableInitRtl8195A(0x1FFFFFFC);
|
||||
|
||||
//3 Initial Log Uart
|
||||
PatchHalInitPlatformLogUart();
|
||||
|
||||
//3 Initial hardware timer
|
||||
PatchHalInitPlatformTimer();
|
||||
|
||||
DBG_8195A("\r\n===> Flash Init \n\r");
|
||||
//4 Initialize the flash first
|
||||
if (HAL_READ32(REG_SOC_FUNC_EN,BIT_SOC_FLASH_EN) & BIT_SOC_FLASH_EN) {
|
||||
FLASH_FCTRL(OFF);
|
||||
}
|
||||
|
||||
FLASH_FCTRL(ON);
|
||||
ACTCK_FLASH_CCTRL(ON);
|
||||
SLPCK_FLASH_CCTRL(ON);
|
||||
PinCtrl(SPI_FLASH,S0,ON);
|
||||
|
||||
PatchSpicInitRtl8195A(SpicInitPara.BaudRate, SpicOneBitMode);
|
||||
|
||||
SpicFlashInitRtl8195A(SpicOneBitMode);
|
||||
|
||||
FlashType = SpicInitParaAllClk[SpicOneBitMode][0].flashtype;
|
||||
|
||||
char* vendor[] = {"Others", "MXIC", "Winbond", "Micron"};
|
||||
DBG_8195A("\r\n===> Flash Init Done, vendor: \x1b[32m%s\x1b[m \n\r", vendor[FlashType]);
|
||||
|
||||
first_write = 1;
|
||||
rest_count = theFlashParams.block_size;
|
||||
seg_head[0] = theFlashParams.block_size;
|
||||
seg_head[1] = theFlashParams.offset_into_block;
|
||||
if(is_head){
|
||||
seg_head[2] = 0xFFFF0000|img2_addr;
|
||||
seg_head[3] = 0xFFFFFFFF;
|
||||
}else{
|
||||
if(is_cascade==0){
|
||||
// Image2 signature
|
||||
seg_head[2] = 0x35393138; //8195
|
||||
seg_head[3] = 0x31313738; //8711
|
||||
}else{
|
||||
seg_head[2] = 0xFFFFFFFF;
|
||||
seg_head[3] = 0xFFFFFFFF;
|
||||
}
|
||||
}
|
||||
|
||||
//DBG_8195A("link_address = %08x, flags = %08x ...\n\r", link_address, flags);
|
||||
|
||||
if(is_cascade==0 && is_head==0){
|
||||
// mark partition 2 to old if existing
|
||||
unsigned int ota_addr = HAL_READ32(SPI_FLASH_BASE, 0x9000);
|
||||
|
||||
//check OTA address valid
|
||||
if( ota_addr == 0xFFFFFFFF || ota_addr > 64*1024*1024 ){
|
||||
DBG_8195A("\r\n\x1b[31mOTA addr %8x is invalid\x1b[m\n\r", ota_addr );
|
||||
DBG_8195A("\x1b[31mOTA addr %8x is invalid\x1b[m\n\r", ota_addr );
|
||||
DBG_8195A("\x1b[31mOTA addr %8x is invalid\x1b[m\n\r", ota_addr );
|
||||
DBG_8195A("continue downloading...\n\r" );
|
||||
return RESULT_OK;
|
||||
}else{
|
||||
DBG_8195A("\x1b[36mOTA addr is %x \x1b[m\n\r", ota_addr );
|
||||
}
|
||||
|
||||
int sig0 = HAL_READ32(SPI_FLASH_BASE, ota_addr+8);
|
||||
int sig1 = HAL_READ32(SPI_FLASH_BASE, ota_addr+12);
|
||||
|
||||
if(sig0==0x35393138 && sig1==0x31313738){
|
||||
DBG_8195A("\r\n>>>> mark parition 2 as older \n\r" );
|
||||
HAL_WRITE32(SPI_FLASH_BASE, ota_addr+8, 0x35393130); // mark to older version
|
||||
// wait spic busy done
|
||||
SpicWaitBusyDoneRtl8195A();
|
||||
// wait flash busy done (wip=0)
|
||||
if(FlashType == FLASH_MICRON)
|
||||
SpicWaitOperationDoneRtl8195A(SpicInitPara);
|
||||
else
|
||||
SpicWaitWipDoneRefinedRtl8195A(SpicInitPara);
|
||||
}
|
||||
}
|
||||
dump_flash_header();
|
||||
//SpicEraseFlashRtl8195A();
|
||||
return RESULT_OK;
|
||||
}
|
||||
|
||||
void write_spi_flash(uint32_t data)
|
||||
{
|
||||
HAL_WRITE32(SPI_FLASH_BASE, flash_loc, data);
|
||||
// wait spic busy done
|
||||
SpicWaitBusyDoneRtl8195A();
|
||||
|
||||
// wait flash busy done (wip=0)
|
||||
if(FlashType == FLASH_MICRON)
|
||||
SpicWaitOperationDoneRtl8195A(SpicInitPara);
|
||||
else
|
||||
SpicWaitWipDoneRefinedRtl8195A(SpicInitPara);
|
||||
flash_loc+=4;
|
||||
}
|
||||
|
||||
uint32_t FlashWrite(void *block_start, uint32_t offset_into_block, uint32_t count, char const *buffer)
|
||||
{
|
||||
int write_cnt=0;
|
||||
uint32_t* buffer32 = (uint32_t*)buffer;
|
||||
|
||||
DBG_8195A("\r\n===> Flash Write, start %x, addr %x, offset %d, count %d, buf %x\n\r", block_start, flash_loc, offset_into_block, count, buffer);
|
||||
|
||||
if(first_write){
|
||||
if(!is_cascade){
|
||||
flash_loc = (unsigned int)block_start;
|
||||
}
|
||||
if(is_head){
|
||||
unsigned int fw_head[4] = {PATTERN_1, PATTERN_2, PATTERN_3, PATTERN_4};
|
||||
DBGPRINT("Write FW header....");
|
||||
flash_loc=0;
|
||||
write_spi_flash(fw_head[0]);
|
||||
write_spi_flash(fw_head[1]);
|
||||
write_spi_flash(fw_head[2]);
|
||||
write_spi_flash(fw_head[3]);
|
||||
DBGPRINT("Write FW header.... %x %x %x %x --> Done\n\r", fw_head[0], fw_head[1], fw_head[2], fw_head[3]);
|
||||
}
|
||||
DBGPRINT("Write SEG header....");
|
||||
first_write = 0;
|
||||
write_spi_flash(seg_head[0]);
|
||||
write_spi_flash(seg_head[1]);
|
||||
write_spi_flash(seg_head[2]);
|
||||
write_spi_flash(seg_head[3]);
|
||||
DBGPRINT("Write SEG header.... %x %x %x %x --> Done\n\r", seg_head[0], seg_head[1], seg_head[2], seg_head[3]);
|
||||
}
|
||||
|
||||
if(rest_count < count)
|
||||
count = rest_count;
|
||||
|
||||
// DO Write Here
|
||||
DBG_8195A("Write Binary....");
|
||||
while (write_cnt < count)
|
||||
{
|
||||
write_spi_flash(*buffer32);
|
||||
write_cnt += 4;
|
||||
buffer32++;
|
||||
}
|
||||
DBG_8195A("Write Binary....Done\n\r");
|
||||
|
||||
rest_count-=count;
|
||||
DBG_8195A("\r\n<=== Flash Write Done %x\n\r", flash_loc);
|
||||
DBGPRINT("first 4 bytes %2x %2x %2x %2x\n\r", buffer[0],buffer[1],buffer[2],buffer[3]);
|
||||
DBGPRINT("last 4 bytes %2x %2x %2x %2x\n\r", buffer[count-4],buffer[count-3],buffer[count-2],buffer[count-1]);
|
||||
return RESULT_OK;
|
||||
}
|
||||
|
||||
uint32_t FlashErase(void *block_start, uint32_t block_size)
|
||||
{
|
||||
if(is_head == 1)
|
||||
erase_loc = 0;
|
||||
|
||||
if(!is_cascade)
|
||||
erase_loc = (unsigned int)block_start;
|
||||
|
||||
if(erase_loc != 0xa000){
|
||||
SpicSectorEraseFlashRtl8195A(erase_loc);
|
||||
DBGPRINT("@erase %x, size %d, fw offset %x\n\r", erase_loc, block_size, block_start);
|
||||
}else{
|
||||
if(is_erasecal){
|
||||
SpicSectorEraseFlashRtl8195A(erase_loc);
|
||||
DBGPRINT("@erase %x, size %d, fw offset %x\n\r", erase_loc, block_size, block_start);
|
||||
}
|
||||
}
|
||||
erase_loc += 4096;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,22 @@
|
|||
// You should create a copy of this file in your flash loader project
|
||||
// and configure it as described below
|
||||
|
||||
// when this macro is non-zero, your FlashInit function should accept
|
||||
// extra 'argc' and 'argv' arguments as specified by the function
|
||||
// prototype in 'flash_loader.h'
|
||||
#define USE_ARGC_ARGV 1
|
||||
|
||||
// You can customize the memory reserved for passing arguments to FlashInit
|
||||
// through argc and argv.
|
||||
#if USE_ARGC_ARGV
|
||||
// This specifies the maximum allowed number of arguments in argv
|
||||
#define MAX_ARGS 5
|
||||
// This specifies the maximum combined size of the arguments, including
|
||||
// a trailing null for each argument
|
||||
#define MAX_ARG_SIZE 64
|
||||
#endif
|
||||
|
||||
// If this is true (non-zero), the parameter designating the code destination
|
||||
// in flash operations will be a 'void *', otherwise it will be a uint32_t.
|
||||
// Targets where void * is smaller than a code pointer should set this to 0.
|
||||
#define CODE_ADDR_AS_VOID_PTR 1
|
||||
|
|
@ -0,0 +1,145 @@
|
|||
// Wrapper for target-specific flash loader code
|
||||
|
||||
#include "flash_loader.h"
|
||||
#include "flash_loader_extra.h"
|
||||
|
||||
#ifndef MAX_ARGS
|
||||
#define MAX_ARGS 7
|
||||
#endif
|
||||
|
||||
// Maximum combined size of arguments, including a trailing null for each argument.
|
||||
#ifndef MAX_ARG_SIZE
|
||||
#define MAX_ARG_SIZE 64
|
||||
#endif
|
||||
|
||||
// Functions in this file, called from the assembly wrapper
|
||||
void Fl2FlashInitEntry(void);
|
||||
void Fl2FlashWriteEntry(void);
|
||||
void Fl2FlashEraseWriteEntry(void);
|
||||
void Fl2FlashChecksumEntry(void);
|
||||
void Fl2FlashSignoffEntry(void);
|
||||
void FlashBreak(void);
|
||||
|
||||
#if CODE_ADDR_AS_VOID_PTR
|
||||
extern uint32_t FlashChecksum(void const *begin, uint32_t count);
|
||||
#else
|
||||
extern uint32_t FlashChecksum(uint32_t begin, uint32_t count);
|
||||
#endif
|
||||
extern uint32_t FlashSignoff();
|
||||
|
||||
uint16_t Crc16_helper(uint8_t const *p, uint32_t len, uint16_t sum);
|
||||
|
||||
__root __no_init FlashParamsHolder theFlashParams;
|
||||
|
||||
__no_init int __argc;
|
||||
__no_init char __argvbuf[MAX_ARG_SIZE];
|
||||
#pragma required=__argvbuf
|
||||
__no_init const char* __argv[MAX_ARGS];
|
||||
|
||||
#if CODE_ADDR_AS_VOID_PTR
|
||||
#define CODE_REF void *
|
||||
#else
|
||||
#define CODE_REF uint32_t
|
||||
#endif
|
||||
|
||||
void Fl2FlashInitEntry()
|
||||
{
|
||||
#if USE_ARGC_ARGV
|
||||
theFlashParams.count = FlashInit((CODE_REF)theFlashParams.base_ptr,
|
||||
theFlashParams.block_size, // Image size
|
||||
theFlashParams.offset_into_block,// link adr
|
||||
theFlashParams.count, // flags
|
||||
__argc,
|
||||
__argv);
|
||||
#else
|
||||
theFlashParams.count = FlashInit((CODE_REF)theFlashParams.base_ptr,
|
||||
theFlashParams.block_size, // Image size
|
||||
theFlashParams.offset_into_block,// link adr
|
||||
theFlashParams.count); // flags
|
||||
#endif
|
||||
}
|
||||
|
||||
// The normal flash write function ----------------------------------------------
|
||||
void Fl2FlashWriteEntry()
|
||||
{
|
||||
theFlashParams.count = FlashWrite((CODE_REF)theFlashParams.base_ptr,
|
||||
theFlashParams.offset_into_block,
|
||||
theFlashParams.count,
|
||||
theFlashParams.buffer);
|
||||
}
|
||||
|
||||
// The erase-first flash write function -----------------------------------------
|
||||
void Fl2FlashEraseWriteEntry()
|
||||
{
|
||||
uint32_t tmp = theFlashParams.block_size;
|
||||
if (tmp == 0)
|
||||
{
|
||||
FlashEraseData *p = (FlashEraseData*)theFlashParams.buffer;
|
||||
for (uint32_t i = 0; i < theFlashParams.count; ++i)
|
||||
{
|
||||
tmp = FlashErase((CODE_REF)p->start, p->length);
|
||||
if (tmp != 0) break;
|
||||
++p;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
tmp = FlashErase((CODE_REF)theFlashParams.base_ptr,
|
||||
theFlashParams.block_size);
|
||||
if (tmp == 0)
|
||||
{
|
||||
tmp = FlashWrite((CODE_REF)theFlashParams.base_ptr,
|
||||
theFlashParams.offset_into_block,
|
||||
theFlashParams.count,
|
||||
theFlashParams.buffer);
|
||||
}
|
||||
}
|
||||
theFlashParams.count = tmp;
|
||||
}
|
||||
|
||||
|
||||
void Fl2FlashChecksumEntry()
|
||||
{
|
||||
theFlashParams.count = FlashChecksum((CODE_REF)theFlashParams.base_ptr,
|
||||
theFlashParams.count);
|
||||
}
|
||||
|
||||
void Fl2FlashSignoffEntry()
|
||||
{
|
||||
theFlashParams.count = FlashSignoff();
|
||||
}
|
||||
|
||||
|
||||
uint16_t Crc16(uint8_t const *p, uint32_t len)
|
||||
{
|
||||
uint8_t zero[2] = { 0, 0 };
|
||||
uint16_t sum = Crc16_helper(p, len, 0);
|
||||
return Crc16_helper(zero, 2, sum);
|
||||
}
|
||||
|
||||
uint16_t Crc16_helper(uint8_t const *p, uint32_t len, uint16_t sum)
|
||||
{
|
||||
while (len--)
|
||||
{
|
||||
int i;
|
||||
uint8_t byte = *p++;
|
||||
|
||||
for (i = 0; i < 8; ++i)
|
||||
{
|
||||
uint32_t osum = sum;
|
||||
sum <<= 1;
|
||||
if (byte & 0x80)
|
||||
sum |= 1 ;
|
||||
if (osum & 0x8000)
|
||||
sum ^= 0x1021;
|
||||
byte <<= 1;
|
||||
}
|
||||
}
|
||||
return sum;
|
||||
}
|
||||
|
||||
#pragma optimize=no_inline
|
||||
__root void FlashBreak()
|
||||
{
|
||||
while(1);
|
||||
}
|
||||
|
|
@ -0,0 +1,78 @@
|
|||
|
||||
#include "flash_config.h"
|
||||
#include <stdint.h>
|
||||
|
||||
#define RESULT_OK 0
|
||||
#define RESULT_ERROR 1
|
||||
#define RESULT_OVERRIDE_DEVICE 2
|
||||
#define RESULT_ERASE_DONE 3
|
||||
#define RESULT_CUSTOM_FIRST 100
|
||||
#define RESULT_CUSTOM_LAST 200
|
||||
|
||||
#define FLAG_ERASE_ONLY 0x1
|
||||
|
||||
#ifndef CODE_ADDR_AS_VOID_PTR
|
||||
#define CODE_ADDR_AS_VOID_PTR 1
|
||||
#endif
|
||||
|
||||
// These are functions you MUST implement -------------------------------
|
||||
#if CODE_ADDR_AS_VOID_PTR
|
||||
|
||||
#if USE_ARGC_ARGV
|
||||
uint32_t FlashInit(void *base_of_flash, uint32_t image_size,
|
||||
uint32_t link_address, uint32_t flags,
|
||||
int argc, char const *argv[]);
|
||||
#else
|
||||
uint32_t FlashInit(void *base_of_flash, uint32_t image_size,
|
||||
uint32_t link_address, uint32_t flags);
|
||||
#endif
|
||||
|
||||
uint32_t FlashWrite(void *block_start,
|
||||
uint32_t offset_into_block,
|
||||
uint32_t count,
|
||||
char const *buffer);
|
||||
|
||||
uint32_t FlashErase(void *block_start,
|
||||
uint32_t block_size);
|
||||
|
||||
#else // !CODE_ADDR_AS_VOID_PTR
|
||||
|
||||
#if USE_ARGC_ARGV
|
||||
uint32_t FlashInit(uint32_t base_of_flash, uint32_t image_size,
|
||||
uint32_t link_address, uint32_t flags,
|
||||
int argc, char const *argv[]);
|
||||
#else
|
||||
uint32_t FlashInit(uint32_t base_of_flash, uint32_t image_size,
|
||||
uint32_t link_address, uint32_t flags);
|
||||
#endif
|
||||
|
||||
uint32_t FlashWrite(uint32_t block_start,
|
||||
uint32_t offset_into_block,
|
||||
uint32_t count,
|
||||
char const *buffer);
|
||||
|
||||
uint32_t FlashErase(uint32_t block_start,
|
||||
uint32_t block_size);
|
||||
|
||||
#endif // CODE_ADDR_AS_VOID_PTR
|
||||
|
||||
// These are functions you MAY implement --------------------------------
|
||||
|
||||
#if CODE_ADDR_AS_VOID_PTR
|
||||
uint32_t FlashChecksum(void const *begin, uint32_t count);
|
||||
#else
|
||||
uint32_t FlashChecksum(uint32_t begin, uint32_t count);
|
||||
#endif
|
||||
|
||||
uint32_t FlashSignoff(void);
|
||||
|
||||
#define OPTIONAL_CHECKSUM _Pragma("required=FlashChecksumEntry") __root
|
||||
#define OPTIONAL_SIGNOFF _Pragma("required=FlashSignoffEntry") __root
|
||||
void FlashChecksumEntry();
|
||||
void FlashSignoffEntry();
|
||||
|
||||
// These are functions you may call -------------------------------------
|
||||
|
||||
// If your code cannot be accessed using data pointers, you will have to
|
||||
// write your own Crc16 function.
|
||||
uint16_t Crc16(uint8_t const *p, uint32_t len);
|
||||
|
|
@ -0,0 +1,197 @@
|
|||
;---------------------------------
|
||||
;
|
||||
; Functions accessed by the debugger to perform a flash download.
|
||||
; All public symbols and the function FlashBreak() are looked up and called by the debugger.
|
||||
;
|
||||
; Copyright (c) 2008 IAR Systems
|
||||
;
|
||||
; $Revision: 38034 $
|
||||
;
|
||||
;---------------------------------
|
||||
|
||||
#define _CORTEX_ ((__CORE__ == __ARM6M__) || (__CORE__ == __ARM6SM__) || (__CORE__ == __ARM7M__) || (__CORE__ == __ARM7EM__))
|
||||
|
||||
PUBLIC FlashInitEntry
|
||||
PUBLIC FlashWriteEntry
|
||||
PUBLIC FlashEraseWriteEntry
|
||||
PUBLIC FlashChecksumEntry
|
||||
PUBLIC FlashSignoffEntry
|
||||
PUBLIC FlashBufferStart
|
||||
PUBLIC FlashBufferEnd
|
||||
|
||||
EXTERN FlashBreak
|
||||
EXTERN Fl2FlashInitEntry
|
||||
EXTERN Fl2FlashWriteEntry
|
||||
EXTERN Fl2FlashEraseWriteEntry
|
||||
EXTERN Fl2FlashChecksumEntry
|
||||
EXTERN Fl2FlashSignoffEntry
|
||||
|
||||
SECTION CSTACK:DATA:NOROOT(3)
|
||||
|
||||
|
||||
;---------------------------------
|
||||
;
|
||||
; FlashInitEntry()
|
||||
; Debugger interface function
|
||||
;
|
||||
;---------------------------------
|
||||
SECTION .text:CODE:ROOT(2)
|
||||
#if !_CORTEX_
|
||||
ARM
|
||||
#else
|
||||
THUMB
|
||||
#endif
|
||||
|
||||
FlashInitEntry:
|
||||
#if !_CORTEX_
|
||||
;; Set up the normal stack pointer.
|
||||
LDR sp, =SFE(CSTACK) ; End of CSTACK
|
||||
#endif
|
||||
BL Fl2FlashInitEntry
|
||||
B FlashBreak
|
||||
|
||||
|
||||
;---------------------------------
|
||||
;
|
||||
; FlashWriteEntry()
|
||||
; Debugger interface function
|
||||
;
|
||||
;---------------------------------
|
||||
SECTION .text:CODE:ROOT(2)
|
||||
#if !_CORTEX_
|
||||
ARM
|
||||
#else
|
||||
THUMB
|
||||
#endif
|
||||
|
||||
FlashWriteEntry:
|
||||
BL Fl2FlashWriteEntry
|
||||
B FlashBreak
|
||||
|
||||
|
||||
;---------------------------------
|
||||
;
|
||||
; FlashEraseWriteEntry
|
||||
; Debugger interface function
|
||||
;
|
||||
;---------------------------------
|
||||
SECTION .text:CODE:ROOT(2)
|
||||
#if !_CORTEX_
|
||||
ARM
|
||||
#else
|
||||
THUMB
|
||||
#endif
|
||||
|
||||
FlashEraseWriteEntry:
|
||||
BL Fl2FlashEraseWriteEntry
|
||||
B FlashBreak
|
||||
|
||||
|
||||
;---------------------------------
|
||||
;
|
||||
; FlashChecksumEntry
|
||||
; Debugger interface function
|
||||
;
|
||||
;---------------------------------
|
||||
SECTION .text:CODE:NOROOT(2)
|
||||
#if !_CORTEX_
|
||||
ARM
|
||||
#else
|
||||
THUMB
|
||||
#endif
|
||||
|
||||
FlashChecksumEntry:
|
||||
BL Fl2FlashChecksumEntry
|
||||
B FlashBreak
|
||||
|
||||
|
||||
;---------------------------------
|
||||
;
|
||||
; FlashSignoffEntry
|
||||
; Debugger interface function
|
||||
;
|
||||
;---------------------------------
|
||||
SECTION .text:CODE:NOROOT(2)
|
||||
#if !_CORTEX_
|
||||
ARM
|
||||
#else
|
||||
THUMB
|
||||
#endif
|
||||
|
||||
FlashSignoffEntry:
|
||||
BL Fl2FlashSignoffEntry
|
||||
B FlashBreak
|
||||
|
||||
|
||||
;---------------------------------
|
||||
;
|
||||
; Flash buffer and Cortex stack
|
||||
;
|
||||
;---------------------------------
|
||||
SECTION LOWEND:DATA(8)
|
||||
DATA
|
||||
FlashBufferStart:
|
||||
|
||||
SECTION HIGHSTART:DATA
|
||||
DATA
|
||||
FlashBufferEnd:
|
||||
|
||||
|
||||
|
||||
#if _CORTEX_
|
||||
PUBLIC __vector_table
|
||||
|
||||
SECTION .intvec:CODE:ROOT(2)
|
||||
DATA
|
||||
|
||||
__vector_table:
|
||||
#if 0
|
||||
DC32 SFE(CSTACK)
|
||||
DC32 FlashInitEntry
|
||||
#endif
|
||||
#endif
|
||||
|
||||
;---------------------------------
|
||||
; Entry: 0x200006b4
|
||||
; ram start up, normal boot
|
||||
; : 0x200006c4
|
||||
; ram wake up, use debugger,
|
||||
; 0x40000218 BIT(31) must 1
|
||||
; Section: .start.ram.data,
|
||||
; put to 0x200006b4
|
||||
; : .patch.start.ram.data,
|
||||
; put to 0x200006bc
|
||||
;---------------------------------
|
||||
|
||||
#if _CORTEX_
|
||||
PUBLIC __ram_start_table
|
||||
|
||||
SECTION .start:CODE:ROOT(2)
|
||||
DATA
|
||||
|
||||
__ram_start_table:
|
||||
DC32 FlashInitEntry
|
||||
DC32 FlashInitEntry
|
||||
DC32 FlashInitEntry
|
||||
DC32 FlashInitEntry
|
||||
|
||||
#endif
|
||||
|
||||
#if _CORTEX_
|
||||
PUBLIC __patch_ram_start_table
|
||||
|
||||
SECTION .patch:CODE:ROOT(2)
|
||||
DATA
|
||||
|
||||
__patch_ram_start_table:
|
||||
DC32 FlashInitEntry
|
||||
DC32 FlashInitEntry
|
||||
DC32 FlashInitEntry
|
||||
DC32 FlashInitEntry
|
||||
|
||||
#endif
|
||||
END
|
||||
|
||||
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,27 @@
|
|||
|
||||
|
||||
#define OVERRIDE_LAYOUT 0x010000
|
||||
#define OVERRIDE_BUFSIZE 0x020000
|
||||
#define OVERRIDE_PAGESIZE 0x040000
|
||||
|
||||
#define LAYOUT_OVERRIDE_BUFFER ((char*)theFlashParams.buffer)
|
||||
#define SET_BUFSIZE_OVERRIDE(new_size) theFlashParams.block_size = (new_size)
|
||||
#define SET_PAGESIZE_OVERRIDE(new_size) theFlashParams.offset_into_block = (new_size)
|
||||
|
||||
// parameter passing structure
|
||||
typedef struct {
|
||||
uint32_t base_ptr;
|
||||
uint32_t count;
|
||||
uint32_t offset_into_block;
|
||||
void *buffer;
|
||||
uint32_t block_size;
|
||||
} FlashParamsHolder;
|
||||
|
||||
typedef struct {
|
||||
uint32_t start;
|
||||
uint32_t length;
|
||||
} FlashEraseData;
|
||||
|
||||
extern FlashParamsHolder theFlashParams;
|
||||
extern char FlashBufferStart;
|
||||
extern char FlashBufferEnd;
|
||||
|
|
@ -0,0 +1,59 @@
|
|||
/*###ICF### Section handled by ICF editor, don't touch! ****/
|
||||
/*-Editor annotation file-*/
|
||||
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
|
||||
/*-Specials-*/
|
||||
define symbol __ICFEDIT_intvec_start__ = 0x10000000;
|
||||
/*-Memory Regions-*/
|
||||
define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
|
||||
define symbol __ICFEDIT_region_ROM_end__ = 0x00010000;
|
||||
define symbol __ICFEDIT_region_RAM_start__ = 0x10000bc0;
|
||||
define symbol __ICFEDIT_region_RAM_end__ = 0x1006FFFF;
|
||||
/*-Sizes-*/
|
||||
define symbol __ICFEDIT_size_cstack__ = 0x200;
|
||||
define symbol __ICFEDIT_size_heap__ = 0x000;
|
||||
/**** End of ICF editor section. ###ICF###*/
|
||||
|
||||
|
||||
define memory mem with size = 4G;
|
||||
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
|
||||
|
||||
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
|
||||
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
|
||||
|
||||
initialize by copy { readwrite };
|
||||
do not initialize { section .noinit };
|
||||
|
||||
place at address mem:__ICFEDIT_intvec_start__ { section .intvec };
|
||||
|
||||
place at start of RAM_region { section .start, section .patch, block RamTop with fixed order {readonly, section LOWEND }};
|
||||
place at end of RAM_region { block RamBottom with fixed order {section HIGHSTART, readwrite, section .init,
|
||||
block CSTACK, block HEAP}};
|
||||
|
||||
define exported symbol __ram_start_table_start__ = 0x10000bc0;
|
||||
define exported symbol __rom_bss_start__ = 0x10000300;
|
||||
define exported symbol __rom_bss_end__ = 0x10000bc0;
|
||||
|
||||
|
||||
// rom symbols
|
||||
define exported symbol DiagPrintf = 0x0000f39d;
|
||||
define exported symbol SpicWaitBusyDoneRtl8195A = 0x00002ea5;
|
||||
define exported symbol SpicWaitWipDoneRtl8195A = 0x00002f55;
|
||||
define exported symbol SpicLoadInitParaFromClockRtl8195A = 0x00003081;
|
||||
define exported symbol VectorTableInitForOSRtl8195A = 0x00004019;
|
||||
define exported symbol HalPinCtrlRtl8195A =0x00002b39;
|
||||
define exported symbol SpicInitCPUCLK = 0x00030c98 ;
|
||||
define exported symbol VectorTableInitRtl8195A = 0x00003de5;
|
||||
define exported symbol SpicCmpDataForCalibrationRtl8195A = 0x00003049;
|
||||
define exported symbol HalTimerInitRtl8195a = 0x0000ef3d;
|
||||
define exported symbol VectorIrqDisRtl8195A = 0x0000418d;
|
||||
define exported symbol VectorIrqRegisterRtl8195A = 0x00004029;
|
||||
define exported symbol SpicInitRtl8195A = 0x000030e5;
|
||||
define exported symbol HalCpuClkConfig = 0x00000341;
|
||||
define exported symbol HalDelayUs = 0x00000899;
|
||||
define exported symbol HalGetCpuClk = 0x00000355;
|
||||
define exported symbol _memcpy = 0x0000f465;
|
||||
|
||||
|
||||
define exported symbol ConfigDebugErr = 0x10000314;
|
||||
define exported symbol ConfigDebugInfo = 0x10000310;
|
||||
define exported symbol ConfigDebugWarn = 0x1000030c;
|
||||
|
|
@ -0,0 +1,210 @@
|
|||
/*
|
||||
* Automatically generated by make menuconfig: don't edit
|
||||
*/
|
||||
#define AUTOCONF_INCLUDED
|
||||
|
||||
/*
|
||||
* Target Platform Selection
|
||||
*/
|
||||
#define CONFIG_WITHOUT_MONITOR 1
|
||||
|
||||
#define CONFIG_RTL8195A 1
|
||||
#undef CONFIG_FPGA
|
||||
#undef CONFIG_RTL_SIM
|
||||
#undef CONFIG_POST_SIM
|
||||
|
||||
/*
|
||||
* < Mass Production Option
|
||||
*/
|
||||
#undef CONFIG_MP
|
||||
#undef CONFIG_CP
|
||||
#undef CONFIG_FT
|
||||
#define RTL8195A 1
|
||||
#define CONFIG_CPU_CLK 1
|
||||
#define CONFIG_CPU_166_6MHZ 1
|
||||
#undef CONFIG_CPU_83_3MHZ
|
||||
#undef CONFIG_CPU_41_6MHZ
|
||||
#undef CONFIG_CPU_20_8MHZ
|
||||
#undef CONFIG_CPU_10_4MHZ
|
||||
#undef CONFIG_CPU_4MHZ
|
||||
#undef CONFIG_FPGA_CLK
|
||||
#define PLATFORM_CLOCK (166666666)
|
||||
#define CPU_CLOCK_SEL_VALUE (0)
|
||||
#define CONFIG_SDR_CLK 1
|
||||
#define CONFIG_SDR_100MHZ 1
|
||||
#undef CONFIG_SDR_50MHZ
|
||||
#undef CONFIG_SDR_25MHZ
|
||||
#undef CONFIG_SDR_12_5MHZ
|
||||
#define SDR_CLOCK_SEL_VALUE (0)
|
||||
#define CONFIG_BOOT_PROCEDURE 1
|
||||
#define CONFIG_IMAGE_PAGE_LOAD 1
|
||||
#undef CONFIG_IMAGE_AUTO_LOAD
|
||||
#define CONFIG_BOOT_TO_UPGRADE_IMG2 1
|
||||
#undef CONFIG_PERI_UPDATE_IMG
|
||||
#define CONFIG_BOOT_FROM_JTAG 1
|
||||
#undef CONFIG_ALIGNMENT_EXCEPTION_ENABLE
|
||||
#define CONFIG_KERNEL 1
|
||||
#define PLATFORM_FREERTOS 1
|
||||
#undef PLATFORM_UCOSII
|
||||
#undef PLATFORM_ECOS
|
||||
#undef CONFIG_TASK_SCHEDUL_DIS
|
||||
#define TASK_SCHEDULER_DISABLED (0)
|
||||
#define CONFIG_NORMALL_MODE 1
|
||||
#undef CONFIG_MEMORY_VERIFY_MODE
|
||||
#define CONFIG_TIMER_EN 1
|
||||
#define CONFIG_TIMER_NORMAL 1
|
||||
#undef CONFIG_TIMER_TEST
|
||||
#define CONFIG_TIMER_MODULE 1
|
||||
#define CONFIG_WDG 1
|
||||
#undef CONFIG_WDG_NON
|
||||
#define CONFIG_WDG_NORMAL 1
|
||||
#define CONFIG_GDMA_EN 1
|
||||
#define CONFIG_GDMA_NORMAL 1
|
||||
#undef CONFIG_GDMA_TEST
|
||||
#define CONFIG_GDMA_MODULE 1
|
||||
#define CONFIG_WIFI_EN 1
|
||||
#define CONFIG_WIFI_NORMAL 1
|
||||
#undef CONFIG_WIFI_TEST
|
||||
#define CONFIG_WIFI_MODULE 1
|
||||
#define CONFIG_GPIO_EN 1
|
||||
#define CONFIG_GPIO_NORMAL 1
|
||||
#undef CONFIG_GPIO_TEST
|
||||
#define CONFIG_GPIO_MODULE 1
|
||||
#if defined(CONFIG_INIC) || (CONFIG_SDIOD)
|
||||
#define CONFIG_SDIO_DEVICE_EN 1
|
||||
#define CONFIG_SDIO_DEVICE_NORMAL 1
|
||||
#undef CONFIG_SDIO_DEVICE_TEST
|
||||
#define CONFIG_SDIO_DEVICE_MODULE 1
|
||||
#else
|
||||
#undef CONFIG_SDIO_DEVICE_EN
|
||||
#endif
|
||||
#define CONFIG_SDIO_HOST_EN 1
|
||||
#define CONFIG_USB_EN 1
|
||||
#undef CONFIG_USB_NORMAL
|
||||
#define CONFIG_USB_TEST 1
|
||||
#define CONFIG_USB_MODULE 1
|
||||
#define CONFIG_USB_VERIFY 1
|
||||
#undef CONFIG_USB_ROM_LIB
|
||||
//#define CONFIG_USB_DBGINFO_EN 1
|
||||
#ifdef CONFIG_INIC//defined(CONFIG_INIC)
|
||||
#define DWC_DEVICE_ONLY 1
|
||||
#else
|
||||
#define DWC_HOST_ONLY 1
|
||||
#define CONFIG_USB_HOST_ONLY 1
|
||||
#endif
|
||||
#define CONFIG_SPI_COM_EN 1
|
||||
#define CONFIG_SPI_COM_NORMAL 1
|
||||
#undef CONFIG_SPI_COM_TEST
|
||||
#define CONFIG_SPI_COM_MODULE 1
|
||||
#define CONFIG_UART_EN 1
|
||||
#define CONFIG_UART_NORMAL 1
|
||||
#undef CONFIG_UART_TEST
|
||||
#define CONFIG_UART_MODULE 1
|
||||
#define CONFIG_I2C_EN 1
|
||||
#define CONFIG_I2C_NORMAL 1
|
||||
#undef CONFIG_I2C_TEST
|
||||
#define CONFIG_I2C_MODULE 1
|
||||
#undef CONFIG_DEBUG_LOG_I2C_HAL
|
||||
#undef CONFIG_PCM_EN
|
||||
#define CONFIG_I2S_EN 1
|
||||
#define CONFIG_I2S_NORMAL 1
|
||||
#undef CONFIG_I2S_TEST
|
||||
#define CONFIG_I2S_MODULE 1
|
||||
#undef CONFIG_DEBUG_LOG_I2S_HAL
|
||||
#define CONFIG_NFC_EN 1
|
||||
#define CONFIG_NFC_NORMAL 1
|
||||
#undef CONFIG_NFC_TEST
|
||||
#define CONFIG_NFC_MODULE 1
|
||||
#define CONFIG_SOC_PS_EN 1
|
||||
#define CONFIG_SOC_PS_NORMAL 1
|
||||
#undef CONFIG_SOC_PS_TEST
|
||||
#define CONFIG_SOC_PS_MODULE 1
|
||||
#define CONFIG_CRYPTO_EN 1
|
||||
#define CONFIG_CRYPTO_NORMAL 1
|
||||
#undef CONFIG_CRYPTO_TEST
|
||||
#define CONFIG_CRYPTO_MODULE 1
|
||||
#define CONFIG_MII_EN 1
|
||||
#define CONFIG_PWM_EN 1
|
||||
#define CONFIG_PWM_NORMAL 1
|
||||
#undef CONFIG_PWM_TEST
|
||||
#define CONFIG_PWM_MODULE 1
|
||||
#define CONFIG_EFUSE_EN 1
|
||||
#define CONFIG_EFUSE_NORMAL 1
|
||||
#undef CONFIG_EFUSE_TEST
|
||||
#define CONFIG_EFUSE_MODULE 1
|
||||
#define CONFIG_SDR_EN 1
|
||||
#define CONFIG_SDR_NORMAL 1
|
||||
#undef CONFIG_SDR_TEST
|
||||
#define CONFIG_SDR_MODULE 1
|
||||
#define CONFIG_SPIC_EN 1
|
||||
#define CONFIG_SPIC_NORMAL 1
|
||||
#undef CONFIG_SPIC_TEST
|
||||
#define CONFIG_SPIC_MODULE 1
|
||||
#define CONFIG_ADC_EN 1
|
||||
#define CONFIG_DAC_EN 1
|
||||
#define CONFIG_NOR_FLASH 1
|
||||
#undef CONFIG_SPI_FLASH
|
||||
#undef CONFIG_NAND_FLASH
|
||||
#undef CONFIG_NONE_FLASH
|
||||
#undef CONFIG_BTBX_EN
|
||||
|
||||
/*
|
||||
* < Engineer Mode Config
|
||||
*/
|
||||
#undef CONFIG_JTAG
|
||||
#undef CONFIG_COMPILE_FLASH_DOWNLOAD_CODE
|
||||
#undef CONIFG_COMPILE_EXTERNAL_SRAM_CALIBRATE
|
||||
#undef CONFIG_CMSIS_MATH_LIB_EN
|
||||
|
||||
/*
|
||||
* < Application Config
|
||||
*/
|
||||
#define CONFIG_NETWORK 1
|
||||
#define CONFIG_RTLIB_EN 1
|
||||
#define CONFIG_RTLIB_NORMAL 1
|
||||
#undef CONFIG_RTLIB_TEST
|
||||
#define CONFIG_RTLIB_MODULE 1
|
||||
|
||||
/*
|
||||
* < System Debug Message Config
|
||||
*/
|
||||
#define CONFIG_UART_LOG_HISTORY 1
|
||||
#undef CONFIG_CONSOLE_NORMALL_MODE
|
||||
#define CONFIG_CONSOLE_VERIFY_MODE 1
|
||||
#define CONFIG_DEBUG_LOG 1
|
||||
#define CONFIG_DEBUG_ERR_MSG 1
|
||||
#undef CONFIG_DEBUG_WARN_MSG
|
||||
#undef CONFIG_DEBUG_INFO_MSG
|
||||
|
||||
/*
|
||||
* < SDK Option Config
|
||||
*/
|
||||
#undef CONFIG_MBED_ENABLED
|
||||
#undef CONFIG_APP_DEMO
|
||||
|
||||
/*
|
||||
* < Select Chip Version
|
||||
*/
|
||||
#undef CONFIG_CHIP_A_CUT
|
||||
#define CONFIG_CHIP_B_CUT 1
|
||||
#undef CONFIG_CHIP_C_CUT
|
||||
#undef CONFIG_CHIP_E_CUT
|
||||
|
||||
/*
|
||||
* < Select toolchain
|
||||
*/
|
||||
#undef CONFIG_TOOLCHAIN_ASDK
|
||||
#undef CONFIG_TOOLCHAIN_ARM_GCC
|
||||
|
||||
/*
|
||||
* < Build Option
|
||||
*/
|
||||
#define CONFIG_LINK_ROM_LIB 1
|
||||
#undef CONFIG_LINK_ROM_SYMB
|
||||
#undef CONFIG_NORMAL_BUILD
|
||||
#undef CONFIG_RELEASE_BUILD
|
||||
#undef CONFIG_RELEASE_BUILD_LIBRARIES
|
||||
#undef CONFIG_LIB_BUILD_RAM
|
||||
#define CONFIG_RELEASE_BUILD_RAM_ALL 1
|
||||
#undef CONFIG_IMAGE_ALL
|
||||
#define CONFIG_IMAGE_SEPARATE 1
|
||||
|
|
@ -0,0 +1,64 @@
|
|||
setup()
|
||||
{
|
||||
__var tmp;
|
||||
|
||||
__hwResetWithStrategy(0, 1);
|
||||
__hwReset(1);
|
||||
|
||||
__writeMemory32(0x21, 0x40000014, "Memory"); __delay(10);
|
||||
__writeMemory32(0x1FC00002, 0x40000304, "Memory"); __delay(10);
|
||||
__writeMemory32(0x400, 0x40000250, "Memory"); __delay(10);
|
||||
__writeMemory32(0x0, 0x40000340, "Memory"); __delay(10);
|
||||
__writeMemory32(0xc04, 0x40000230, "Memory"); __delay(10);
|
||||
__writeMemory32(0x1157, 0x40000210, "Memory"); __delay(10);
|
||||
__writeMemory32(0x110011, 0x400002c0, "Memory"); __delay(10);
|
||||
__writeMemory32(0xffffffff, 0x40000320, "Memory"); __delay(10);
|
||||
|
||||
__writeMemory32(0x1, 0x40005224, "Memory"); __delay(10);
|
||||
__writeMemory32(0x2c8, 0x40005004, "Memory"); __delay(10);
|
||||
__writeMemory32(0xffffd000, 0x40005008, "Memory"); __delay(10);
|
||||
__delay(3);
|
||||
__writeMemory32(0x22, 0x40005020, "Memory"); __delay(10);
|
||||
__delay(3);
|
||||
__writeMemory32(0x09032001, 0x40005010, "Memory"); __delay(10);
|
||||
__delay(3);
|
||||
__writeMemory32(0x2611, 0x40005014, "Memory"); __delay(10);
|
||||
__delay(3);
|
||||
__writeMemory32(0x68413, 0x40005018, "Memory"); __delay(10);
|
||||
__delay(3);
|
||||
__writeMemory32(0x42, 0x4000501c, "Memory"); __delay(10);
|
||||
__delay(3);
|
||||
|
||||
// Enable
|
||||
__writeMemory32(0x700, 0x4000500c, "Memory"); __delay(10);
|
||||
__delay(20);
|
||||
__writeMemory32(0x1, 0x40005000, "Memory"); __delay(10);
|
||||
__delay(100);
|
||||
tmp = __readMemory32(0x40005000,"Memory"); __delay(10);
|
||||
__writeMemory32(0x600, 0x4000500c, "Memory"); __delay(10);
|
||||
__delay(30);
|
||||
}
|
||||
|
||||
execUserPreload()
|
||||
{
|
||||
__var tmp;
|
||||
//setup();
|
||||
tmp = __readMemory32(0x40000210, "Memory")|(1<<27);
|
||||
__writeMemory32(tmp, 0x40000210, "Memory");
|
||||
}
|
||||
|
||||
execUserSetup()
|
||||
{
|
||||
//execUserPreload();
|
||||
//__loadImage("$TARGET_PATH$ ", 0, 0);
|
||||
//__writeMemory32(0x80000000, 0x40000218, "Memory");
|
||||
}
|
||||
|
||||
execUserFlashInit() // Called by debugger before loading flash loader in RAM.
|
||||
{
|
||||
__var tmp;
|
||||
__message "----- Prepare hardware for Flashloader -----\n";
|
||||
//setup();
|
||||
tmp = __readMemory32(0x40000210, "Memory")|(1<<27);
|
||||
__writeMemory32(tmp, 0x40000210, "Memory");
|
||||
}
|
||||
|
|
@ -0,0 +1,359 @@
|
|||
#include "rtl8195a.h"
|
||||
|
||||
typedef struct _UART_LOG_BUF_ {
|
||||
u8 BufCount; //record the input cmd char number.
|
||||
u8 UARTLogBuf[127]; //record the input command.
|
||||
} UART_LOG_BUF, *PUART_LOG_BUF;
|
||||
|
||||
|
||||
|
||||
|
||||
typedef struct _UART_LOG_CTL_ {
|
||||
u8 NewIdx;
|
||||
u8 SeeIdx;
|
||||
u8 RevdNo;
|
||||
u8 EscSTS;
|
||||
u8 ExecuteCmd;
|
||||
u8 ExecuteEsc;
|
||||
u8 BootRdy;
|
||||
u8 Resvd;
|
||||
PUART_LOG_BUF pTmpLogBuf;
|
||||
VOID *pfINPUT;
|
||||
PCOMMAND_TABLE pCmdTbl;
|
||||
u32 CmdTblSz;
|
||||
|
||||
u32 CRSTS;
|
||||
|
||||
u8 (*pHistoryBuf)[127];
|
||||
|
||||
u32 TaskRdy;
|
||||
u32 Sema;
|
||||
} UART_LOG_CTL, *PUART_LOG_CTL;
|
||||
|
||||
volatile UART_LOG_CTL UartLogCtl;
|
||||
|
||||
volatile UART_LOG_CTL *pUartLogCtl;
|
||||
|
||||
u8 *ArgvArray[10];
|
||||
|
||||
UART_LOG_BUF UartLogBuf;
|
||||
|
||||
|
||||
u8 UartLogHistoryBuf[5][127];
|
||||
|
||||
extern VOID
|
||||
SpicLoadInitParaFromClockRtl8195A
|
||||
(
|
||||
IN u8 CpuClkMode,
|
||||
IN u8 BaudRate,
|
||||
IN PSPIC_INIT_PARA pSpicInitPara
|
||||
);
|
||||
|
||||
VOID
|
||||
PatchSpicInitRtl8195A
|
||||
(
|
||||
IN u8 InitBaudRate,
|
||||
IN u8 SpicBitMode
|
||||
)
|
||||
{
|
||||
|
||||
u32 Value32;
|
||||
SPIC_INIT_PARA SpicInitPara;
|
||||
|
||||
#ifdef CONFIG_FPGA
|
||||
SpicInitPara.BaudRate = 1;//FPGASpicInitPara.BaudRate;
|
||||
SpicInitPara.RdDummyCyle = 1;//FPGASpicInitPara.RdDummyCyle;
|
||||
SpicInitPara.DelayLine = 0;//FPGASpicInitPara.DelayLine;
|
||||
#else
|
||||
u8 CpuClk;
|
||||
CpuClk = (((u8)(HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_CLK_CTRL1) & (0x70))) >> 4);
|
||||
SpicLoadInitParaFromClockRtl8195A(CpuClk, InitBaudRate, &SpicInitPara);
|
||||
#endif
|
||||
// Disable SPI_FLASH User Mode
|
||||
HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0);
|
||||
|
||||
HAL_SPI_WRITE32(REG_SPIC_BAUDR, BIT_SCKDV(InitBaudRate));
|
||||
|
||||
HAL_SPI_WRITE32(REG_SPIC_SER, BIT_SER);
|
||||
|
||||
Value32 = HAL_SPI_READ32(REG_SPIC_AUTO_LENGTH);
|
||||
|
||||
HAL_SPI_WRITE32(REG_SPIC_AUTO_LENGTH,
|
||||
((Value32 & 0xFFFF0000) | BIT_RD_DUMMY_LENGTH(SpicInitPara.RdDummyCyle)));
|
||||
|
||||
HAL_WRITE32(PERI_ON_BASE, REG_PESOC_MEM_CTRL,
|
||||
((HAL_READ32(PERI_ON_BASE, REG_PESOC_MEM_CTRL)&0xFFFFFF00)|
|
||||
SpicInitPara.DelayLine));
|
||||
|
||||
HAL_SPI_WRITE32(REG_SPIC_CTRLR1, BIT_NDF(4));
|
||||
|
||||
switch (SpicBitMode) {
|
||||
case SpicOneBitMode:
|
||||
HAL_SPI_WRITE32(REG_SPIC_CTRLR0,
|
||||
(HAL_SPI_READ32(REG_SPIC_CTRLR0) & (~(BIT_ADDR_CH(3)|BIT_DATA_CH(3)))));
|
||||
break;
|
||||
|
||||
case SpicDualBitMode:
|
||||
HAL_SPI_WRITE32(REG_SPIC_CTRLR0,
|
||||
((HAL_SPI_READ32(REG_SPIC_CTRLR0) & (~(BIT_ADDR_CH(3)|BIT_DATA_CH(3)))) |
|
||||
(BIT_ADDR_CH(1)|BIT_DATA_CH(1))));
|
||||
|
||||
break;
|
||||
|
||||
case SpicQuadBitMode:
|
||||
HAL_SPI_WRITE32(REG_SPIC_CTRLR0,
|
||||
((HAL_SPI_READ32(REG_SPIC_CTRLR0) & (~(BIT_ADDR_CH(3)|BIT_DATA_CH(3)))) |
|
||||
(BIT_ADDR_CH(2)|BIT_DATA_CH(2))));
|
||||
break;
|
||||
|
||||
}
|
||||
|
||||
// Enable SPI_FLASH User Mode
|
||||
// HAL_SPI_WRITE32(REG_SPIC_SSIENR, BIT_SPIC_EN);
|
||||
}
|
||||
|
||||
|
||||
#include "hal_timer.h"
|
||||
extern BOOL
|
||||
HalTimerInitRtl8195a(
|
||||
IN VOID *Data
|
||||
);
|
||||
|
||||
VOID
|
||||
PatchHalInitPlatformTimer(
|
||||
VOID
|
||||
)
|
||||
{
|
||||
TIMER_ADAPTER TimerAdapter;
|
||||
|
||||
OSC32K_CKGEN_CTRL(ON);
|
||||
GTIMER_FCTRL(ON);
|
||||
ACTCK_TIMER_CCTRL(ON);
|
||||
SLPCK_TIMER_CCTRL(ON);
|
||||
|
||||
TimerAdapter.IrqDis = ON;
|
||||
// TimerAdapter.IrqHandle = (IRQ_FUN)NULL;
|
||||
TimerAdapter.TimerId = 1;
|
||||
TimerAdapter.TimerIrqPriority = 0;
|
||||
TimerAdapter.TimerLoadValueUs = 0;
|
||||
TimerAdapter.TimerMode = FREE_RUN_MODE;
|
||||
|
||||
HalTimerInitRtl8195a((VOID*) &TimerAdapter);
|
||||
|
||||
}
|
||||
|
||||
#define UART_BAUD_RATE_2400 2400
|
||||
#define UART_BAUD_RATE_4800 4800
|
||||
#define UART_BAUD_RATE_9600 9600
|
||||
#define UART_BAUD_RATE_19200 19200
|
||||
#define UART_BAUD_RATE_38400 38400
|
||||
#define UART_BAUD_RATE_57600 57600
|
||||
#define UART_BAUD_RATE_115200 115200
|
||||
#define UART_BAUD_RATE_921600 921600
|
||||
#define UART_BAUD_RATE_1152000 1152000
|
||||
|
||||
#define UART_PARITY_ENABLE 0x08
|
||||
#define UART_PARITY_DISABLE 0
|
||||
|
||||
#define UART_DATA_LEN_5BIT 0x0
|
||||
#define UART_DATA_LEN_6BIT 0x1
|
||||
#define UART_DATA_LEN_7BIT 0x2
|
||||
#define UART_DATA_LEN_8BIT 0x3
|
||||
|
||||
#define UART_STOP_1BIT 0x0
|
||||
#define UART_STOP_2BIT 0x4
|
||||
|
||||
|
||||
extern u32
|
||||
HalLogUartInit(
|
||||
IN LOG_UART_ADAPTER UartAdapter
|
||||
);
|
||||
|
||||
extern u32
|
||||
HalGetCpuClk(
|
||||
VOID
|
||||
);
|
||||
|
||||
const u32 StartupCpkClkTbl[]= {
|
||||
200000000,
|
||||
100000000,
|
||||
50000000,
|
||||
25000000,
|
||||
12500000,
|
||||
4000000
|
||||
};
|
||||
|
||||
|
||||
u32
|
||||
StartupHalGetCpuClk(
|
||||
VOID
|
||||
)
|
||||
{
|
||||
u32 CpuType = 0, CpuClk = 0, FreqDown = 0;
|
||||
|
||||
CpuType = ((HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_CLK_CTRL1) & (0x70)) >> 4);
|
||||
FreqDown = HAL_READ32(SYSTEM_CTRL_BASE, REG_SYS_SYSPLL_CTRL1) & BIT17;
|
||||
|
||||
CpuClk = StartupCpkClkTbl[CpuType];
|
||||
|
||||
if ( !FreqDown ) {
|
||||
if ( CpuClk > 4000000 ){
|
||||
CpuClk = (CpuClk*5/6);
|
||||
}
|
||||
}
|
||||
|
||||
return CpuClk;
|
||||
}
|
||||
|
||||
u32
|
||||
PatchHalLogUartInit(
|
||||
IN LOG_UART_ADAPTER UartAdapter
|
||||
)
|
||||
{
|
||||
u32 SetData;
|
||||
u32 Divisor;
|
||||
u32 Dlh;
|
||||
u32 Dll;
|
||||
u32 SysClock;
|
||||
|
||||
/*
|
||||
Interrupt enable Register
|
||||
7: THRE Interrupt Mode Enable
|
||||
2: Enable Receiver Line Status Interrupt
|
||||
1: Enable Transmit Holding Register Empty Interrupt
|
||||
0: Enable Received Data Available Interrupt
|
||||
*/
|
||||
// disable all interrupts
|
||||
HAL_UART_WRITE32(UART_INTERRUPT_EN_REG_OFF, 0);
|
||||
|
||||
/*
|
||||
Line Control Register
|
||||
7: DLAB, enable reading and writing DLL and DLH register, and must be cleared after
|
||||
initial baud rate setup
|
||||
3: PEN, parity enable/disable
|
||||
2: STOP, stop bit
|
||||
1:0 DLS, data length
|
||||
*/
|
||||
|
||||
// set DLAB bit to 1
|
||||
HAL_UART_WRITE32(UART_LINE_CTL_REG_OFF, 0x80);
|
||||
|
||||
// set up buad rate division
|
||||
|
||||
#ifdef CONFIG_FPGA
|
||||
SysClock = SYSTEM_CLK;
|
||||
Divisor = (SysClock / (16 * (UartAdapter.BaudRate)));
|
||||
#else
|
||||
{
|
||||
u32 SampleRate,Remaind;
|
||||
|
||||
//SysClock = (HalGetCpuClk()>>2);
|
||||
SysClock = (StartupHalGetCpuClk()>>2);
|
||||
|
||||
SampleRate = (16 * (UartAdapter.BaudRate));
|
||||
|
||||
Divisor= SysClock/SampleRate;
|
||||
|
||||
Remaind = ((SysClock*10)/SampleRate) - (Divisor*10);
|
||||
|
||||
if (Remaind>4) {
|
||||
Divisor++;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
Dll = Divisor & 0xff;
|
||||
Dlh = (Divisor & 0xff00)>>8;
|
||||
HAL_UART_WRITE32(UART_DLL_OFF, Dll);
|
||||
HAL_UART_WRITE32(UART_DLH_OFF, Dlh);
|
||||
|
||||
// clear DLAB bit
|
||||
HAL_UART_WRITE32(UART_LINE_CTL_REG_OFF, 0);
|
||||
|
||||
// set data format
|
||||
SetData = UartAdapter.Parity | UartAdapter.Stop | UartAdapter.DataLength;
|
||||
HAL_UART_WRITE32(UART_LINE_CTL_REG_OFF, SetData);
|
||||
|
||||
/* FIFO Control Register
|
||||
7:6 level of receive data available interrupt
|
||||
5:4 level of TX empty trigger
|
||||
2 XMIT FIFO reset
|
||||
1 RCVR FIFO reset
|
||||
0 FIFO enable/disable
|
||||
*/
|
||||
// FIFO setting, enable FIFO and set trigger level (2 less than full when receive
|
||||
// and empty when transfer
|
||||
HAL_UART_WRITE32(UART_FIFO_CTL_REG_OFF, UartAdapter.FIFOControl);
|
||||
|
||||
/*
|
||||
Interrupt Enable Register
|
||||
7: THRE Interrupt Mode enable
|
||||
2: Enable Receiver Line status Interrupt
|
||||
1: Enable Transmit Holding register empty INT32
|
||||
0: Enable received data available interrupt
|
||||
*/
|
||||
HAL_UART_WRITE32(UART_INTERRUPT_EN_REG_OFF, UartAdapter.IntEnReg);
|
||||
|
||||
if (UartAdapter.IntEnReg) {
|
||||
// Enable Peripheral_IRQ Setting for Log_Uart
|
||||
HAL_WRITE32(VENDOR_REG_BASE, PERIPHERAL_IRQ_EN, 0x1000000);
|
||||
|
||||
// Enable ARM Cortex-M3 IRQ
|
||||
NVIC_SetPriorityGrouping(0x3);
|
||||
NVIC_SetPriority(PERIPHERAL_IRQ, 14);
|
||||
NVIC_EnableIRQ(PERIPHERAL_IRQ);
|
||||
}
|
||||
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
u32 log_uart_irq(VOID *Data)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
VOID
|
||||
PatchHalInitPlatformLogUart(
|
||||
VOID
|
||||
)
|
||||
{
|
||||
IRQ_HANDLE UartIrqHandle;
|
||||
LOG_UART_ADAPTER UartAdapter;
|
||||
|
||||
//4 Release log uart reset and clock
|
||||
LOC_UART_FCTRL(OFF);
|
||||
LOC_UART_FCTRL(ON);
|
||||
ACTCK_LOG_UART_CCTRL(ON);
|
||||
|
||||
PinCtrl(LOG_UART,S0,ON);
|
||||
|
||||
//4 Register Log Uart Callback function
|
||||
UartIrqHandle.Data = (u32)NULL;//(u32)&UartAdapter;
|
||||
UartIrqHandle.IrqNum = UART_LOG_IRQ;
|
||||
UartIrqHandle.IrqFun = (IRQ_FUN) log_uart_irq;//UartLogIrqHandleRam;
|
||||
UartIrqHandle.Priority = 0;
|
||||
|
||||
//4 Inital Log uart
|
||||
UartAdapter.BaudRate = UART_BAUD_RATE_38400;
|
||||
UartAdapter.DataLength = UART_DATA_LEN_8BIT;
|
||||
UartAdapter.FIFOControl = 0xC1;
|
||||
UartAdapter.IntEnReg = 0x00;
|
||||
UartAdapter.Parity = UART_PARITY_DISABLE;
|
||||
UartAdapter.Stop = UART_STOP_1BIT;
|
||||
|
||||
//4 Initial Log Uart
|
||||
PatchHalLogUartInit(UartAdapter);
|
||||
|
||||
//4 Register Isr handle
|
||||
InterruptRegister(&UartIrqHandle);
|
||||
|
||||
UartAdapter.IntEnReg = 0x05;
|
||||
|
||||
//4 Initial Log Uart for Interrupt
|
||||
PatchHalLogUartInit(UartAdapter);
|
||||
|
||||
//4 initial uart log parameters before any uartlog operation
|
||||
//RtlConsolInit(ROM_STAGE,GetRomCmdNum(),(VOID*)&UartLogRomCmdTable);// executing boot seq.,
|
||||
}
|
||||
|
|
@ -0,0 +1,24 @@
|
|||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<flash_board>
|
||||
<pass>
|
||||
<range>CODE 0x10000bc0 0x10003FFF</range>
|
||||
<loader>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash</loader>
|
||||
<abs_offset>0x00000000</abs_offset>
|
||||
<args>--head</args>
|
||||
</pass>
|
||||
<pass>
|
||||
<range>CODE 0x10004000 0x1006FFFF</range>
|
||||
<loader>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash</loader>
|
||||
<abs_offset>0x00000000</abs_offset>
|
||||
<args>--cascade</args>
|
||||
</pass>
|
||||
<pass>
|
||||
<range>CODE 0x30000000 0x301FFFFF</range>
|
||||
<loader>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash</loader>
|
||||
<abs_offset>0x00000000</abs_offset>
|
||||
<args>--cascade</args>
|
||||
</pass>
|
||||
<ignore>CODE 0x00000000 0x000FFFFF</ignore>
|
||||
<ignore>CODE 0x10000000 0x10000bbf</ignore>
|
||||
</flash_board>
|
||||
|
|
@ -0,0 +1,10 @@
|
|||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<flash_device>
|
||||
<exe>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.out</exe>
|
||||
<flash_base>0x00000000</flash_base>
|
||||
<page>8</page>
|
||||
<block>512 0x1000</block>
|
||||
<macro>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.mac</macro>
|
||||
<aggregate>1</aggregate>
|
||||
</flash_device>
|
||||
|
|
@ -0,0 +1,72 @@
|
|||
setup()
|
||||
{
|
||||
__var tmp;
|
||||
|
||||
__hwResetWithStrategy(0, 2);
|
||||
__hwReset(1);
|
||||
|
||||
tmp = __readMemory32(0x40000014,"Memory"); __delay(10);
|
||||
__message "0x40000014=",tmp:%x;
|
||||
|
||||
__writeMemory32(0x21, 0x40000014, "Memory"); __delay(10);
|
||||
|
||||
__writeMemory32(0x1FC00002, 0x40000304, "Memory"); __delay(10);
|
||||
__writeMemory32(0x400, 0x40000250, "Memory"); __delay(10);
|
||||
__writeMemory32(0x0, 0x40000340, "Memory"); __delay(10);
|
||||
__writeMemory32(0xc04, 0x40000230, "Memory"); __delay(10);
|
||||
__writeMemory32(0x1157, 0x40000210, "Memory"); __delay(10);
|
||||
__writeMemory32(0x110011, 0x400002c0, "Memory"); __delay(10);
|
||||
__writeMemory32(0xffffffff, 0x40000320, "Memory"); __delay(10);
|
||||
/*
|
||||
__writeMemory32(0x1, 0x40005224, "Memory"); __delay(10);
|
||||
__writeMemory32(0x2c8, 0x40005004, "Memory"); __delay(10);
|
||||
__writeMemory32(0xffffd000, 0x40005008, "Memory"); __delay(10);
|
||||
__delay(3);
|
||||
__writeMemory32(0x22, 0x40005020, "Memory"); __delay(10);
|
||||
__delay(3);
|
||||
__writeMemory32(0x09032001, 0x40005010, "Memory"); __delay(10);
|
||||
__delay(3);
|
||||
__writeMemory32(0x2611, 0x40005014, "Memory"); __delay(10);
|
||||
__delay(3);
|
||||
__writeMemory32(0x68413, 0x40005018, "Memory"); __delay(10);
|
||||
__delay(3);
|
||||
__writeMemory32(0x42, 0x4000501c, "Memory"); __delay(10);
|
||||
__delay(3);
|
||||
|
||||
// Enable
|
||||
__writeMemory32(0x700, 0x4000500c, "Memory"); __delay(10);
|
||||
__delay(20);
|
||||
__writeMemory32(0x1, 0x40005000, "Memory"); __delay(10);
|
||||
__delay(100);
|
||||
tmp = __readMemory32(0x40005000,"Memory"); __delay(10);
|
||||
__writeMemory32(0x600, 0x4000500c, "Memory"); __delay(10);
|
||||
__delay(30);
|
||||
*/
|
||||
}
|
||||
|
||||
execUserPreload()
|
||||
{
|
||||
__var tmp;
|
||||
setup();
|
||||
tmp = __readMemory32(0x40000210, "Memory")|(1<<27);
|
||||
__writeMemory32(tmp, 0x40000210, "Memory");
|
||||
}
|
||||
|
||||
execUserSetup()
|
||||
{
|
||||
//execUserPreload();
|
||||
//__loadImage("$TARGET_PATH$ ", 0, 0);
|
||||
//__writeMemory32(0x80000000, 0x40000218, "Memory");
|
||||
}
|
||||
|
||||
execUserFlashInit() // Called by debugger before loading flash loader in RAM.
|
||||
{
|
||||
__var tmp;
|
||||
__message "----- Prepare hardware for Flashloader -----\n";
|
||||
|
||||
__writeMemory32(0x1FFFFFF8, 0x10000000, "Memory");
|
||||
__writeMemory32(0x101, 0x10000004, "Memory");
|
||||
setup();
|
||||
tmp = __readMemory32(0x40000210, "Memory")|(1<<27);
|
||||
__writeMemory32(tmp, 0x40000210, "Memory");
|
||||
}
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<flash_board>
|
||||
<pass>
|
||||
<range>CODE 0x10000bc8 0x10005FFF</range>
|
||||
<loader>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash</loader>
|
||||
<abs_offset>0x00000000</abs_offset>
|
||||
<args>--head
|
||||
--img2_addr
|
||||
0xB000</args>
|
||||
</pass>
|
||||
|
||||
<ignore>CODE 0x00000000 0x000FFFFF</ignore>
|
||||
<ignore>CODE 0x10000000 0x10000bc7</ignore>
|
||||
<ignore>CODE 0x10006000 0x1006FFFF</ignore>
|
||||
<ignore>CODE 0x30000000 0x301FFFFF</ignore>
|
||||
</flash_board>
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<flash_board>
|
||||
<pass>
|
||||
<range>CODE 0x10000bc0 0x10005FFF</range>
|
||||
<loader>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash</loader>
|
||||
<abs_offset>0x00000000</abs_offset>
|
||||
<args>--head
|
||||
--img2_addr
|
||||
0xB000</args>
|
||||
</pass>
|
||||
|
||||
<ignore>CODE 0x00000000 0x000FFFFF</ignore>
|
||||
<ignore>CODE 0x10000000 0x10000bbf</ignore>
|
||||
<ignore>CODE 0x10006000 0x1006FFFF</ignore>
|
||||
<ignore>CODE 0x30000000 0x301FFFFF</ignore>
|
||||
</flash_board>
|
||||
|
|
@ -0,0 +1,26 @@
|
|||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<flash_board>
|
||||
<pass>
|
||||
<range>CODE 0x10000bc8 0x10005FFF</range>
|
||||
<loader>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash</loader>
|
||||
<abs_offset>0x00000000</abs_offset>
|
||||
<args>--head
|
||||
--img2_addr
|
||||
0xB000</args>
|
||||
</pass>
|
||||
<pass>
|
||||
<range>CODE 0x10006000 0x1006FFFF</range>
|
||||
<loader>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash</loader>
|
||||
<abs_offset>0xB000</abs_offset>
|
||||
</pass>
|
||||
<pass>
|
||||
<range>CODE 0x30000000 0x301FFFFF</range>
|
||||
<loader>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash</loader>
|
||||
<abs_offset>0x0000</abs_offset>
|
||||
<args>--cascade</args>
|
||||
</pass>
|
||||
<ignore>CODE 0x00000000 0x000FFFFF</ignore>
|
||||
<ignore>CODE 0x10000000 0x10000bc7</ignore>
|
||||
<ignore>CODE 0x1FFF0000 0x1FFFFFFF</ignore>
|
||||
</flash_board>
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<flash_board>
|
||||
<pass>
|
||||
<range>CODE 0x200006b4 0x2002FFFF</range>
|
||||
<loader>$PROJ_DIR$\flashloader\FlashRTL8195aQA.flash</loader>
|
||||
<abs_offset>0x00000000</abs_offset>
|
||||
</pass>
|
||||
<pass>
|
||||
<range>CODE 0x30000000 0x301FFFFF</range>
|
||||
<loader>$PROJ_DIR$\flashloader\FlashRTL8195aQA.flash</loader>
|
||||
<abs_offset>0x00010000</abs_offset>
|
||||
<ignore>DATA_Z 0x30000000 0x301FFFFF</ignore>
|
||||
</pass>
|
||||
<pass>
|
||||
<range>CODE 0x20080000 0x200BFFFF</range>
|
||||
<loader>$PROJ_DIR$\flashloader\FlashRTL8195aQA.flash</loader>
|
||||
<abs_offset>0x00020000</abs_offset>
|
||||
<ignore>DATA_Z 0x20080000 0x200BFFFF</ignore>
|
||||
</pass>
|
||||
<pass>
|
||||
<range>CODE 0x00000000 0x00000000</range>
|
||||
<loader>$PROJ_DIR$\flashloader\FlashRTL8195aQA.flash</loader>
|
||||
<abs_offset>0x00030000</abs_offset>
|
||||
</pass>
|
||||
<ignore>CODE 0x00000001 0x000BFFFF</ignore>
|
||||
<ignore>CODE 0x20000000 0x200006b3</ignore>
|
||||
</flash_board>
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,10 @@
|
|||
<?xml version="1.0" encoding="iso-8859-1"?>
|
||||
|
||||
<flash_device>
|
||||
<exe>$PROJ_DIR$\flashloader\FlashRTL8195aQA.out</exe>
|
||||
<flash_base>0x00000000</flash_base>
|
||||
<page>8</page>
|
||||
<block>256 0x1000</block>
|
||||
<macro>$PROJ_DIR$\flashloader\FlashRTL8195aQA.mac</macro>
|
||||
<aggregate>1</aggregate>
|
||||
</flash_device>
|
||||
|
|
@ -0,0 +1,60 @@
|
|||
setup()
|
||||
{
|
||||
__var tmp;
|
||||
|
||||
__hwReset(1);
|
||||
|
||||
__writeMemory32(0x21, 0x40000014, "Memory"); __delay(10);
|
||||
__writeMemory32(0x1FC00002, 0x40000304, "Memory"); __delay(10);
|
||||
__writeMemory32(0x400, 0x40000250, "Memory"); __delay(10);
|
||||
__writeMemory32(0x0, 0x40000340, "Memory"); __delay(10);
|
||||
__writeMemory32(0xc04, 0x40000230, "Memory"); __delay(10);
|
||||
__writeMemory32(0x1157, 0x40000210, "Memory"); __delay(10);
|
||||
__writeMemory32(0x110011, 0x400002c0, "Memory"); __delay(10);
|
||||
__writeMemory32(0xffffffff, 0x40000320, "Memory"); __delay(10);
|
||||
|
||||
__writeMemory32(0x1, 0x40005224, "Memory"); __delay(10);
|
||||
__writeMemory32(0x2c8, 0x40005004, "Memory"); __delay(10);
|
||||
__writeMemory32(0xffffd000, 0x40005008, "Memory"); __delay(10);
|
||||
__delay(3);
|
||||
__writeMemory32(0x22, 0x40005020, "Memory"); __delay(10);
|
||||
__delay(3);
|
||||
__writeMemory32(0x09032001, 0x40005010, "Memory"); __delay(10);
|
||||
__delay(3);
|
||||
__writeMemory32(0x2611, 0x40005014, "Memory"); __delay(10);
|
||||
__delay(3);
|
||||
__writeMemory32(0x68413, 0x40005018, "Memory"); __delay(10);
|
||||
__delay(3);
|
||||
__writeMemory32(0x42, 0x4000501c, "Memory"); __delay(10);
|
||||
__delay(3);
|
||||
|
||||
// Enable
|
||||
__writeMemory32(0x700, 0x4000500c, "Memory"); __delay(10);
|
||||
__delay(20);
|
||||
__writeMemory32(0x1, 0x40005000, "Memory"); __delay(10);
|
||||
__delay(100);
|
||||
tmp = __readMemory32(0x40005000,"Memory"); __delay(10);
|
||||
__writeMemory32(0x600, 0x4000500c, "Memory"); __delay(10);
|
||||
__delay(30);
|
||||
}
|
||||
|
||||
execUserPreload()
|
||||
{
|
||||
__message "----- Prepare hardware for Flashloader -----\n";
|
||||
setup();
|
||||
__writeMemory32(0x80000000, 0x40000218, "Memory");
|
||||
}
|
||||
|
||||
execUserSetup()
|
||||
{
|
||||
//execUserPreload();
|
||||
//__loadImage("$TARGET_PATH$ ", 0, 0);
|
||||
//__writeMemory32(0x80000000, 0x40000218, "Memory");
|
||||
}
|
||||
|
||||
execUserFlashInit() // Called by debugger before loading flash loader in RAM.
|
||||
{
|
||||
__message "----- Prepare hardware for Flashloader -----\n";
|
||||
setup();
|
||||
__writeMemory32(0x80000000, 0x40000218, "Memory");
|
||||
}
|
||||
|
|
@ -0,0 +1,53 @@
|
|||
@set /a tmp = %1-1
|
||||
@call :toHex %tmp% end1
|
||||
@set /a tmp2 = %2-1
|
||||
@call :toHex %tmp2% end2
|
||||
@set /a tmp3 = %3-1
|
||||
@call :toHex %tmp3% end0
|
||||
|
||||
@echo echo image 2 start %1
|
||||
@echo echo image 1 end 0x%end1%
|
||||
@echo off
|
||||
@echo ^<?xml version="1.0" encoding="iso-8859-1"?^> > tmp.board
|
||||
@echo. >> tmp.board
|
||||
@echo ^<flash_board^> >> tmp.board
|
||||
@echo ^<pass^> >> tmp.board
|
||||
@echo ^<range^>CODE %3 0x%end1%^</range^> >> tmp.board
|
||||
@echo ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^> >> tmp.board
|
||||
@echo ^<abs_offset^>0x00000000^</abs_offset^> >> tmp.board
|
||||
@echo ^<args^>--head^</args^> >> tmp.board
|
||||
@echo ^</pass^> >> tmp.board
|
||||
@echo ^<pass^> >> tmp.board
|
||||
@echo ^<range^>CODE %1 0x%end2%^</range^> >> tmp.board
|
||||
@echo ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^> >> tmp.board
|
||||
@echo ^<abs_offset^>0x00000000^</abs_offset^> >> tmp.board
|
||||
@echo ^<args^>--cascade^</args^> >> tmp.board
|
||||
@echo ^</pass^> >> tmp.board
|
||||
@echo ^<pass^> >> tmp.board
|
||||
@echo ^<range^>CODE 0x30000000 0x301FFFFF^</range^> >> tmp.board
|
||||
@echo ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^> >> tmp.board
|
||||
@echo ^<abs_offset^>0x00000000^</abs_offset^> >> tmp.board
|
||||
@echo ^<args^>--cascade^</args^> >> tmp.board
|
||||
@echo ^</pass^> >> tmp.board
|
||||
@echo ^<ignore^>CODE 0x00000000 0x000FFFFF^</ignore^> >> tmp.board
|
||||
@echo ^<ignore^>CODE 0x10000000 0x%end0%^</ignore^> >> tmp.board
|
||||
@echo ^<ignore^>CODE %2 0x1006FFFF^</ignore^> >> tmp.board
|
||||
@echo ^</flash_board^> >> tmp.board >> tmp.board
|
||||
|
||||
exit
|
||||
|
||||
:toHex dec hex -- convert a decimal number to hexadecimal, i.e. -20 to FFFFFFEC or 26 to 0000001A
|
||||
@echo off
|
||||
SETLOCAL ENABLEDELAYEDEXPANSION
|
||||
set /a dec=%~1
|
||||
set "hex="
|
||||
set "map=0123456789ABCDEF"
|
||||
for /L %%N in (1,1,8) do (
|
||||
set /a "d=dec&15,dec>>=4"
|
||||
for %%D in (!d!) do set "hex=!map:~%%D,1!!hex!"
|
||||
)
|
||||
|
||||
( ENDLOCAL & REM RETURN VALUES
|
||||
IF "%~2" NEQ "" (SET %~2=%hex%) ELSE ECHO.%hex%
|
||||
)
|
||||
EXIT /b
|
||||
|
|
@ -0,0 +1,69 @@
|
|||
@set /a tmp = %1-1
|
||||
@call :toHex %tmp% end1
|
||||
@set /a tmp2 = %2-1
|
||||
@call :toHex %tmp2% end2
|
||||
@set /a tmp3 = %3-1
|
||||
@call :toHex %tmp3% end3
|
||||
|
||||
@set /a tmp4 = %4
|
||||
@call :toHex %tmp4% flash_run_start
|
||||
@set /a tmp4 = %5-1
|
||||
@call :toHex %tmp4% flash_run_end
|
||||
|
||||
@echo echo image 2 start %1
|
||||
@echo echo image 1 end 0x%end1%
|
||||
@echo off
|
||||
@echo ^<?xml version="1.0" encoding="iso-8859-1"?^> > tmp.board
|
||||
@echo. >> tmp.board
|
||||
@echo ^<flash_board^> >> tmp.board
|
||||
@echo ^<pass^> >> tmp.board
|
||||
@echo ^<range^>CODE 0x10000bc8 0x%end1%^</range^> >> tmp.board
|
||||
@echo ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^> >> tmp.board
|
||||
@echo ^<abs_offset^>0x00000000^</abs_offset^> >> tmp.board
|
||||
@echo ^<args^>--head >> tmp.board
|
||||
@echo --img2_addr >> tmp.board
|
||||
@echo 0xB000^</args^> >> tmp.board
|
||||
@echo ^</pass^> >> tmp.board
|
||||
@echo ^<pass^> >> tmp.board
|
||||
@echo ^<range^>CODE %1 0x%end2%^</range^> >> tmp.board
|
||||
@echo ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^> >> tmp.board
|
||||
@echo ^<abs_offset^>0xB000^</abs_offset^> >> tmp.board
|
||||
@echo ^</pass^> >> tmp.board
|
||||
if NOT "%3"=="0xFFFFFFFF" (
|
||||
@echo ^<pass^> >> tmp.board
|
||||
@echo ^<range^>CODE 0x30000000 0x%end3%^</range^> >> tmp.board
|
||||
@echo ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^> >> tmp.board
|
||||
@echo ^<abs_offset^>0x0000^</abs_offset^> >> tmp.board
|
||||
@echo ^<args^>--cascade^</args^> >> tmp.board
|
||||
@echo ^</pass^> >> tmp.board
|
||||
)
|
||||
if NOT "%4"=="0xFFFFFFFF" (
|
||||
@echo ^<pass^> >> tmp.board
|
||||
@echo ^<range^>CODE 0x%flash_run_start% 0x%flash_run_end%^</range^> >> tmp.board
|
||||
@echo ^<loader^>$PROJ_DIR$\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\flashloader\FlashRTL8195aMP.flash^</loader^> >> tmp.board
|
||||
@echo ^<abs_offset^>0xA4000^</abs_offset^> >> tmp.board
|
||||
@echo ^</pass^> >> tmp.board
|
||||
)
|
||||
@echo ^<ignore^>CODE 0x00000000 0x000FFFFF^</ignore^> >> tmp.board
|
||||
@echo ^<ignore^>CODE 0x10000000 0x10000bc7^</ignore^> >> tmp.board
|
||||
@echo ^<ignore^>CODE %2 0x1006FFFF^</ignore^> >> tmp.board
|
||||
@echo ^<ignore^>CODE 0x1FFF0000 0x1FFFFFFF^</ignore^> >> tmp.board
|
||||
@echo ^</flash_board^> >> tmp.board >> tmp.board
|
||||
|
||||
exit
|
||||
|
||||
:toHex dec hex -- convert a decimal number to hexadecimal, i.e. -20 to FFFFFFEC or 26 to 0000001A
|
||||
@echo off
|
||||
SETLOCAL ENABLEDELAYEDEXPANSION
|
||||
set /a dec=%~1
|
||||
set "hex="
|
||||
set "map=0123456789ABCDEF"
|
||||
for /L %%N in (1,1,8) do (
|
||||
set /a "d=dec&15,dec>>=4"
|
||||
for %%D in (!d!) do set "hex=!map:~%%D,1!!hex!"
|
||||
)
|
||||
|
||||
( ENDLOCAL & REM RETURN VALUES
|
||||
IF "%~2" NEQ "" (SET %~2=%hex%) ELSE ECHO.%hex%
|
||||
)
|
||||
EXIT /b
|
||||
|
|
@ -0,0 +1,47 @@
|
|||
cd /D %2
|
||||
set tooldir=%2\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\tools
|
||||
|
||||
del Debug/Exe/target.map Debug/Exe/target.asm *.bin
|
||||
cmd /c "%tooldir%\nm Debug/Exe/target.axf | %tooldir%\sort > Debug/Exe/target.map"
|
||||
cmd /c "%tooldir%\objdump -d Debug/Exe/target.axf > Debug/Exe/target.asm"
|
||||
|
||||
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE1 Debug/Exe/target.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram1_start=0x%%i
|
||||
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE2 Debug/Exe/target.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram2_start=0x%%i
|
||||
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep SDRAM Debug/Exe/target.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram3_start=0x%%i
|
||||
::for /f "delims=" %%i in ('cmd /c "%tooldir%\grep .ram_image4 Debug/Exe/target.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram4_start=0x%%i
|
||||
|
||||
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE1 Debug/Exe/target.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram1_end=0x%%i
|
||||
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE2 Debug/Exe/target.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram2_end=0x%%i
|
||||
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep SDRAM Debug/Exe/target.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram3_end=0x%%i
|
||||
::for /f "delims=" %%i in ('cmd /c "%tooldir%\grep .ram_image4 Debug/Exe/target.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram4_end=0x%%i
|
||||
|
||||
::echo %ram1_start% > tmp.txt
|
||||
::echo %ram2_start% >> tmp.txt
|
||||
::echo %ram3_start% >> tmp.txt
|
||||
::echo %ram1_end% >> tmp.txt
|
||||
::echo %ram2_end% >> tmp.txt
|
||||
::echo %ram3_end% >> tmp.txt
|
||||
|
||||
%tooldir%\objcopy -j "A2 rw" -Obinary Debug/Exe/target.axf Debug/Exe/ram_1.bin
|
||||
%tooldir%\objcopy -j "A3 rw" -Obinary Debug/Exe/target.axf Debug/Exe/sdram.bin
|
||||
|
||||
%tooldir%\pick %ram1_start% %ram1_end% Debug\Exe\ram_1.bin Debug\Exe\ram_1.p.bin head
|
||||
%tooldir%\pick %ram2_start% %ram2_end% Debug\Exe\ram_1.bin Debug\Exe\ram_2.p.bin body
|
||||
if defined %ram3_start (
|
||||
%tooldir%\pick %ram3_start% %ram3_end% Debug\Exe\sdram.bin Debug\Exe\ram_3.p.bin body
|
||||
)
|
||||
|
||||
:: SDRAM case
|
||||
if defined %ram3_start (
|
||||
copy /b Debug\Exe\ram_1.p.bin+Debug\Exe\ram_2.p.bin+Debug\Exe\ram_3.p.bin Debug\Exe\ram_all.bin
|
||||
)
|
||||
|
||||
:: NO SDRAM case
|
||||
if not defined %ram3_start (
|
||||
copy /b Debug\Exe\ram_1.p.bin+Debug\Exe\ram_2.p.bin Debug\Exe\ram_all.bin
|
||||
)
|
||||
|
||||
:: board generator
|
||||
%tooldir%\..\gen_board.bat %ram2_start% %ram2_end% %ram1_start%
|
||||
|
||||
exit
|
||||
|
|
@ -0,0 +1,5 @@
|
|||
Dim WshShell
|
||||
|
||||
Set WshShell = WScript.CreateObject("WScript.Shell")
|
||||
|
||||
WshShell.Run "cmd /c """""+WScript.Arguments.Item(1)+"\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\postbuild.bat"" """+WScript.Arguments.Item(0)+""" """+WScript.Arguments.Item(1)+"""""", 0
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
set tooldir=%1\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\tools
|
||||
set alinkdir=%1\..\..\..\component\common\application\alink
|
||||
|
||||
::echo %tooldir% > %alinkdir%\test.txt
|
||||
::echo %alinkdir% >> %alinkdir%\test.txt
|
||||
|
||||
cd /D %tooldir%
|
||||
|
||||
::echo "%tooldir%\iarchive.exe --extract %alinkdir%\cloud\lib\libalink.a" >> %alinkdir%\test.txt
|
||||
|
||||
echo cmd /c iarchive.exe --create lib_alink.a >out.bat
|
||||
cmd /c "iarchive.exe -t %alinkdir%\lib_porting.a" >>out.bat
|
||||
cmd /c "iarchive.exe -t %alinkdir%\cloud\lib\libalink.a" >>out.bat
|
||||
cmd /c "iarchive.exe -t %alinkdir%\zconfig\lib\libaws.a" >>out.bat
|
||||
cmd /c sed ':a;N;$ s/\n/ /g;ba' out.bat > out1.bat
|
||||
|
||||
cmd /c "iarchive.exe --extract %alinkdir%\cloud\lib\libalink.a"
|
||||
cmd /c "iarchive.exe --extract %alinkdir%\zconfig\lib\libaws.a"
|
||||
cmd /c "iarchive.exe --extract %alinkdir%\lib_porting.a"
|
||||
|
||||
cmd /c "out1.bat"
|
||||
|
||||
del %alinkdir%\lib_porting.a
|
||||
cmd /c copy lib_alink.a %alinkdir%
|
||||
|
||||
del *.o
|
||||
del *.bat
|
||||
del *.a
|
||||
|
||||
exit
|
||||
|
|
@ -0,0 +1,5 @@
|
|||
Dim WshShell
|
||||
|
||||
Set WshShell = WScript.CreateObject("WScript.Shell")
|
||||
|
||||
WshShell.Run "cmd /c "+WScript.Arguments.Item(0)+"\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\postbuild_alink.bat "+WScript.Arguments.Item(0), 0
|
||||
|
|
@ -0,0 +1,33 @@
|
|||
cd /D %2
|
||||
set tooldir=%2\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\tools
|
||||
set libdir=%2\..\..\..\component\soc\realtek\8195a\misc\bsp
|
||||
|
||||
del Debug/Exe/bootloader.map Debug/Exe/bootloader.asm *.bin
|
||||
cmd /c "%tooldir%\nm Debug/Exe/bootloader.axf | %tooldir%\sort > Debug/Exe/bootloader.map"
|
||||
cmd /c "%tooldir%\objdump -d Debug/Exe/bootloader.axf > Debug/Exe/bootloader.asm"
|
||||
|
||||
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE1 Debug/Exe/bootloader.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram1_start=0x%%i
|
||||
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE1 Debug/Exe/bootloader.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram1_end=0x%%i
|
||||
|
||||
|
||||
::echo %ram1_start% > tmp.txt
|
||||
::echo %ram2_start% >> tmp.txt
|
||||
::echo %ram3_start% >> tmp.txt
|
||||
::echo %ram1_end% >> tmp.txt
|
||||
::echo %ram2_end% >> tmp.txt
|
||||
::echo %ram3_end% >> tmp.txt
|
||||
|
||||
%tooldir%\objcopy -j "A2 rw" -Obinary Debug/Exe/bootloader.axf Debug/Exe/ram_1.bin
|
||||
::%tooldir%\objcopy -j "A3 rw" -Obinary Debug/Exe/bootloader.axf Debug/Exe/sdram.bin
|
||||
|
||||
%tooldir%\pick %ram1_start% %ram1_end% Debug\Exe\ram_1.bin Debug\Exe\ram_1.p.bin head 0xb000
|
||||
%tooldir%\pick %ram1_start% %ram1_end% Debug\Exe\ram_1.bin Debug\Exe\ram_1.r.bin raw
|
||||
|
||||
:: update ram_1.p.bin, raw file for application
|
||||
copy Debug\Exe\ram_1.p.bin %libdir%\image\ram_1.p.bin
|
||||
copy Debug\Exe\ram_1.r.bin %libdir%\image\ram_1.r.bin
|
||||
|
||||
:: delete hal_spi_flash_ram.o object after image built
|
||||
del Debug\Obj\hal_spi_flash_ram.*
|
||||
|
||||
exit
|
||||
|
|
@ -0,0 +1,5 @@
|
|||
Dim WshShell
|
||||
|
||||
Set WshShell = WScript.CreateObject("WScript.Shell")
|
||||
|
||||
WshShell.Run "cmd /c """""+WScript.Arguments.Item(1)+"\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\postbuild_img1.bat"" """+WScript.Arguments.Item(0)+""" """+WScript.Arguments.Item(1)+"""""", 0
|
||||
|
|
@ -0,0 +1,77 @@
|
|||
cd /D %2
|
||||
set tooldir=%2\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\tools
|
||||
set libdir=%2\..\..\..\component\soc\realtek\8195a\misc\bsp
|
||||
set cfgdir=%3
|
||||
|
||||
echo config %3
|
||||
|
||||
del %cfgdir%/Exe/target.map %cfgdir%/Exe/application.asm *.bin
|
||||
cmd /c "%tooldir%\nm %cfgdir%/Exe/application.axf | %tooldir%\sort > %cfgdir%/Exe/application.map"
|
||||
cmd /c "%tooldir%\objdump -d %cfgdir%/Exe/application.axf > %cfgdir%/Exe/application.asm"
|
||||
|
||||
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE2 %cfgdir%/Exe/application.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram2_start=0x%%i
|
||||
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep SDRAM %cfgdir%/Exe/application.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set ram3_start=0x%%i
|
||||
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep FLASH_RUN %cfgdir%/Exe/application.map | %tooldir%\grep Base | %tooldir%\gawk '{print $1}'"') do set flash_run_start=0x%%i
|
||||
|
||||
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep IMAGE2 %cfgdir%/Exe/application.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram2_end=0x%%i
|
||||
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep SDRAM %cfgdir%/Exe/application.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set ram3_end=0x%%i
|
||||
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep FLASH_RUN %cfgdir%/Exe/application.map | %tooldir%\grep Limit | %tooldir%\gawk '{print $1}'"') do set flash_run_end=0x%%i
|
||||
|
||||
::echo %ram1_start% > tmp.txt
|
||||
::echo %ram2_start% >> tmp.txt
|
||||
::echo %ram3_start% >> tmp.txt
|
||||
::echo %ram1_end% >> tmp.txt
|
||||
::echo %ram2_end% >> tmp.txt
|
||||
::echo %ram3_end% >> tmp.txt
|
||||
|
||||
%tooldir%\objcopy -j "A3 rw" -Obinary %cfgdir%/Exe/application.axf %cfgdir%/Exe/ram_2.bin
|
||||
if defined %ram3_start (
|
||||
%tooldir%\objcopy -j "A5 rw" -Obinary %cfgdir%/Exe/application.axf %cfgdir%/Exe/sdram.bin
|
||||
)
|
||||
if defined %flash_run_start (
|
||||
%tooldir%\objcopy -j "A7 rw" -Obinary %cfgdir%/Exe/application.axf %cfgdir%/Exe/flash_run.bin
|
||||
) else (
|
||||
set flash_run_start=0xFFFFFFFF
|
||||
set flash_run_end=0xFFFFFFFF
|
||||
)
|
||||
|
||||
%tooldir%\pick %ram2_start% %ram2_end% %cfgdir%\Exe\ram_2.bin %cfgdir%\Exe\ram_2.p.bin body+reset_offset+sig
|
||||
%tooldir%\pick %ram2_start% %ram2_end% %cfgdir%\Exe\ram_2.bin %cfgdir%\Exe\ram_2.ns.bin body+reset_offset
|
||||
if defined %ram3_start (
|
||||
%tooldir%\pick %ram3_start% %ram3_end% %cfgdir%\Exe\sdram.bin %cfgdir%\Exe\ram_3.p.bin body+reset_offset
|
||||
)
|
||||
|
||||
:: force update ram_1.p.bin
|
||||
del %cfgdir%\Exe\ram_1.p.bin
|
||||
|
||||
:: check ram_1.p.bin exist, copy default
|
||||
if not exist %cfgdir%\Exe\ram_1.p.bin (
|
||||
copy %libdir%\image\ram_1.p.bin %cfgdir%\Exe\ram_1.p.bin
|
||||
)
|
||||
|
||||
::if not exist %cfgdir%\Exe\data.p.bin (
|
||||
:: copy %tooldir%\..\image\data.p.bin %cfgdir%\Exe\data.p.bin
|
||||
::)
|
||||
|
||||
::padding ram_1.p.bin to 32K+4K+4K+4K, LOADER/RSVD/SYSTEM/CALIBRATION
|
||||
%tooldir%\padding 44k 0xFF %cfgdir%\Exe\ram_1.p.bin
|
||||
|
||||
:: SDRAM case
|
||||
if defined %ram3_start (
|
||||
copy /b %cfgdir%\Exe\ram_1.p.bin+%cfgdir%\Exe\ram_2.p.bin+%cfgdir%\Exe\ram_3.p.bin %cfgdir%\Exe\ram_all.bin
|
||||
copy /b %cfgdir%\Exe\ram_2.ns.bin+%cfgdir%\Exe\ram_3.p.bin %cfgdir%\Exe\ota.bin
|
||||
)
|
||||
|
||||
:: NO SDRAM case
|
||||
if not defined %ram3_start (
|
||||
copy /b %cfgdir%\Exe\ram_1.p.bin+%cfgdir%\Exe\ram_2.p.bin %cfgdir%\Exe\ram_all.bin
|
||||
copy /b %cfgdir%\Exe\ram_2.ns.bin %cfgdir%\Exe\ota.bin
|
||||
set ram3_end=0xFFFFFFFF
|
||||
)
|
||||
|
||||
%tooldir%\checksum %cfgdir%\Exe\ota.bin
|
||||
|
||||
:: board generator
|
||||
%tooldir%\..\gen_board_img2.bat %ram2_start% %ram2_end% %ram3_end% %flash_run_start% %flash_run_end%
|
||||
|
||||
exit
|
||||
|
|
@ -0,0 +1,5 @@
|
|||
Dim WshShell
|
||||
|
||||
Set WshShell = WScript.CreateObject("WScript.Shell")
|
||||
|
||||
WshShell.Run "cmd /c """""+WScript.Arguments.Item(1)+"\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\postbuild_img2.bat"" """+WScript.Arguments.Item(0)+""" """+WScript.Arguments.Item(1)+""" """+WScript.Arguments.Item(2)+"""""", 0
|
||||
|
|
@ -0,0 +1,61 @@
|
|||
cd /D %2
|
||||
set bindir=application/Debug/bin
|
||||
set bindirw=application\Debug\bin
|
||||
set tooldir=%2\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\tools
|
||||
set libdir=%2\..\..\..\component\soc\realtek\8195a\misc\bsp
|
||||
|
||||
echo %tooldir%
|
||||
echo %libdir%
|
||||
|
||||
::del Debug/Exe/target.map Debug/Exe/application.asm *.bin
|
||||
cmd /c "%tooldir%\nm %bindir%/application.elf | %tooldir%\sort > %bindir%/application.nm.map"
|
||||
cmd /c "%tooldir%\objdump -d %bindir%/application.elf > %bindir%/application.asm"
|
||||
|
||||
|
||||
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep __ram_image2_text_start__ %bindir%/application.nm.map | %tooldir%\gawk '{print $1}'"') do set ram2_start=0x%%i
|
||||
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep __sdram_data_start__ %bindir%/application.nm.map | %tooldir%\gawk '{print $1}'"') do set ram3_start=0x%%i
|
||||
|
||||
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep __ram_image2_text_end__ %bindir%/application.nm.map | %tooldir%\gawk '{print $1}'"') do set ram2_end=0x%%i
|
||||
for /f "delims=" %%i in ('cmd /c "%tooldir%\grep __sdram_data_end__ %bindir%/application.nm.map | %tooldir%\gawk '{print $1}'"') do set ram3_end=0x%%i
|
||||
|
||||
::echo %ram1_start% > tmp.txt
|
||||
echo %ram2_start%
|
||||
echo %ram3_start%
|
||||
::echo %ram1_end% >> tmp.txt
|
||||
echo %ram2_end%
|
||||
echo %ram3_end%
|
||||
|
||||
|
||||
%tooldir%\objcopy -j .image2.start.table -j .ram_image2.text -j .ram.data -Obinary %bindir%/application.elf %bindir%/ram_2.bin
|
||||
if NOT %ram3_start% == %ram3_end% (
|
||||
%tooldir%\objcopy -j .sdr_data -Obinary %bindir%/application.elf %bindir%/sdram.bin
|
||||
)
|
||||
|
||||
%tooldir%\pick %ram2_start% %ram2_end% %bindirw%\ram_2.bin %bindirw%\ram_2.p.bin body+reset_offset+sig
|
||||
if defined %ram3_start (
|
||||
%tooldir%\pick %ram3_start% %ram3_end% %bindirw%\sdram.bin %bindirw%\ram_3.p.bin body+reset_offset
|
||||
)
|
||||
|
||||
:: check ram_1.p.bin exist, copy default
|
||||
if not exist %bindirw%\ram_1.p.bin (
|
||||
copy %libdir%\image\ram_1.p.bin %bindirw%\ram_1.p.bin
|
||||
)
|
||||
|
||||
::padding ram_1.p.bin to 32K+4K+4K+4K, LOADER/RSVD/SYSTEM/CALIBRATION
|
||||
%tooldir%\padding 44k 0xFF %bindirw%\ram_1.p.bin
|
||||
|
||||
:: SDRAM case
|
||||
if defined %ram3_start (
|
||||
copy /b %bindirw%\ram_1.p.bin+%bindirw%\ram_2.p.bin+%bindirw%\ram_3.p.bin %bindirw%\ram_all.bin
|
||||
copy /b %bindirw%\ram_2.p.bin+%bindirw%\ram_3.p.bin %bindirw%\ota.bin
|
||||
)
|
||||
|
||||
%tooldir%\checksum Debug\Exe\ota.bin
|
||||
|
||||
:: NO SDRAM case
|
||||
if not defined %ram3_start (
|
||||
copy /b %bindirw%\ram_1.p.bin+%bindirw%\ram_2.p.bin %bindirw%\ram_all.bin
|
||||
copy /b %bindirw%\ram_2.p.bin %bindirw%\ota.bin
|
||||
)
|
||||
|
||||
exit
|
||||
|
|
@ -0,0 +1,29 @@
|
|||
cd /D %1
|
||||
set tooldir=%1\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\tools
|
||||
set libdir=%1\..\..\..\component\soc\realtek\8195a\misc\bsp
|
||||
:: Generate build_info.h
|
||||
echo off
|
||||
::echo %date:~0,10%-%time:~0,8%
|
||||
::echo %USERNAME%
|
||||
for /f "usebackq" %%i in (`hostname`) do set hostname=%%i
|
||||
::echo %hostname%
|
||||
|
||||
echo #define UTS_VERSION "%date:~0,10%-%time:~0,8%" > ..\inc\build_info.h
|
||||
echo #define RTL8195AFW_COMPILE_TIME "%date:~0,10%-%time:~0,8%" >> ..\inc\build_info.h
|
||||
echo #define RTL8195AFW_COMPILE_DATE "%date:~0,4%%date:~5,2%%date:~8,2%" >> ..\inc\build_info.h
|
||||
echo #define RTL8195AFW_COMPILE_BY "%USERNAME%" >> ..\inc\build_info.h
|
||||
echo #define RTL8195AFW_COMPILE_HOST "%hostname%" >> ..\inc\build_info.h
|
||||
echo #define RTL8195AFW_COMPILE_DOMAIN >> ..\inc\build_info.h
|
||||
echo #define RTL195AFW_COMPILER "IAR compiler" >> ..\inc\build_info.h
|
||||
|
||||
echo. > main.icf
|
||||
|
||||
for /f "delims=" %%i in ('cmd /c "%tooldir%\coan defs -g e ../src/main.c | %tooldir%\grep "#define" | %tooldir%\grep __ICFEDIT_region_BD_RAM_start__ | %tooldir%\gawk '{print $3}'"') do set BD_RAM_start=%%i
|
||||
|
||||
if defined %BD_RAM_start (
|
||||
echo define symbol __ICFEDIT_region_BD_RAM_start__ = %BD_RAM_start%; >> main.icf
|
||||
echo define symbol __ICFEDIT_region_BD_RAM_end__ = 0x1006CFFF; >> main.icf
|
||||
)
|
||||
|
||||
exit
|
||||
|
||||
|
|
@ -0,0 +1,15 @@
|
|||
Option Explicit
|
||||
DIM fso
|
||||
|
||||
Dim WshShell
|
||||
|
||||
Set fso = CreateObject("Scripting.FileSystemObject")
|
||||
|
||||
If (fso.FileExists("""" & WScript.Arguments(0) & """\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\prebuild.bat")) Then
|
||||
MsgBox "script not exist " & WScript.Arguments(0) & "\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\prebuild.bat" , vbinformation
|
||||
WScript.Quit()
|
||||
End If
|
||||
|
||||
Set WshShell = WScript.CreateObject("WScript.Shell")
|
||||
|
||||
WshShell.Run "cmd /c """"" & WScript.Arguments(0) & "\..\..\..\component\soc\realtek\8195a\misc\iar_utility\common\prebuild.bat"" """ & WScript.Arguments(0) & """""", 0, true
|
||||
392
component/soc/realtek/8195a/misc/iar_utility/common/preload.mac
Normal file
392
component/soc/realtek/8195a/misc/iar_utility/common/preload.mac
Normal file
|
|
@ -0,0 +1,392 @@
|
|||
//DRAM_INFO
|
||||
__var DeviceType;
|
||||
__var Page;
|
||||
__var Bank;
|
||||
__var DqWidth;
|
||||
|
||||
//DRAM_MODE_REG_INFO
|
||||
__var BstLen;
|
||||
__var BstType;
|
||||
__var Mode0Cas;
|
||||
__var Mode0Wr;
|
||||
__var Mode1DllEnN;
|
||||
__var Mode1AllLat;
|
||||
__var Mode2Cwl;
|
||||
|
||||
//DRAM_TIMING_INFO, additional parameter, to config DRAM_TIMING INFO
|
||||
__var DramTimingTref;
|
||||
__var DramRowNum;
|
||||
__var Tck;
|
||||
|
||||
//DRAM_TIMING_INFO
|
||||
__var TrfcPs;
|
||||
__var TrefiPs;
|
||||
__var WrMaxTck;
|
||||
__var TrcdPs;
|
||||
__var TrpPs;
|
||||
__var TrasPs;
|
||||
__var TrrdTck;
|
||||
__var TwrPs;
|
||||
__var TwtrTck;
|
||||
__var TmrdTck;
|
||||
__var TrtpTck;
|
||||
__var TccdTck;
|
||||
__var TrcPs;
|
||||
|
||||
//DRAM_DEVICE_INFO
|
||||
__var DdrPeriodPs;
|
||||
__var DfiRate;
|
||||
|
||||
__config_dram_param(){
|
||||
__var CsBstLen;
|
||||
__var CasWr;
|
||||
__var CasRd;
|
||||
__var CasRdT;
|
||||
__var ClrSrt;
|
||||
__var AddLat;
|
||||
__var DramEmr2;
|
||||
__var DramMr0;
|
||||
__var CrTwr;
|
||||
__var DramMaxWr;
|
||||
__var DramWr;
|
||||
__var CrTrtw;
|
||||
__var CrTrtwT;
|
||||
__var DramPeriod;
|
||||
__var DdrType;
|
||||
//__var paDqWidth;
|
||||
//__var paPage;
|
||||
//__var paDfiRate
|
||||
|
||||
__var tmp;
|
||||
|
||||
// Load parameter
|
||||
__load_dram_param();
|
||||
|
||||
DfiRate = 1<<DfiRate;
|
||||
DramPeriod = DdrPeriodPs*DfiRate;
|
||||
DramMaxWr= (WrMaxTck)/(DfiRate) +1;
|
||||
DramWr = ((TwrPs) / DramPeriod)+1;
|
||||
CrTwr = ((TwrPs) / DramPeriod) + 3;
|
||||
|
||||
if (CrTwr < DramMaxWr) {
|
||||
CrTwr = CrTwr;
|
||||
}else {
|
||||
CrTwr = DramMaxWr;
|
||||
}
|
||||
|
||||
if(DeviceType==2){ // Case DDR2
|
||||
DdrType = 2;
|
||||
if (BstLen == 0){
|
||||
CsBstLen = 0;
|
||||
CrTrtwT = 4;
|
||||
DramMr0 = 2;
|
||||
}else{
|
||||
CsBstLen = 1;
|
||||
CrTrtwT = 6;
|
||||
DramMr0 = 3;
|
||||
}
|
||||
CasRd = Mode0Cas;
|
||||
AddLat = Mode1AllLat;
|
||||
CasWr = CasRd + AddLat -1;
|
||||
DramEmr2 = 0;
|
||||
DramMr0 =(((DramWr%6)-1)<<(8+1))|(0<<8)|(Mode0Cas<<4)|(BstType<<3)|DramMr0;
|
||||
}
|
||||
if(DeviceType==3){ // Case DDR3
|
||||
DdrType = 3;
|
||||
if (BstLen==0){
|
||||
CsBstLen = 0; //bst_4
|
||||
DramMr0 = 2;
|
||||
}else{
|
||||
CsBstLen = 1; // bst_8
|
||||
DramMr0 = 0;
|
||||
}
|
||||
CrlSrt = (Mode0Cas >> 1);
|
||||
if (((Mode0Cas) & 0x1) ) {
|
||||
CasRdT = CrlSrt+ 12;
|
||||
}else{
|
||||
CasRdT = CrlSrt+ 4;
|
||||
}
|
||||
|
||||
AddLat = 0;
|
||||
if (Mode1AllLat == 1) { // CL-1
|
||||
AddLat = CasRd -1;
|
||||
}
|
||||
if (Mode1AllLat == 2){ // CL-2
|
||||
AddLat = CasRd -2;
|
||||
}
|
||||
CasRd = CasRdT + AddLat;
|
||||
CasWr = Mode2Cwl + 5 + AddLat;
|
||||
DramEmr2 = Mode2Cwl << 3;
|
||||
|
||||
DramWr = (DramWr + 1) / 2;
|
||||
if (DramWr == 16) {
|
||||
DramWr = 0;
|
||||
}
|
||||
if (DramWr <= 9) { // 5< wr <= 9
|
||||
DramWr = DramWr - 4;
|
||||
}
|
||||
DramMr0 =(DramWr<<(8+1))|(0<<8)|((Mode0Cas>>1)<<4)|(BstType<<3)|((Mode0Cas&0x1)<<2)|DramMr0;
|
||||
CrTrtwT = (CasRdT + 6) - CasWr;
|
||||
}
|
||||
if (DeviceType == 8){
|
||||
DdrType = 8;
|
||||
if (BstLen == 0) {
|
||||
DramMr0 = 2; // bst_4
|
||||
CsBstLen = 0; //bst_4
|
||||
CasRd = 0x2;
|
||||
} else {
|
||||
DramMr0 = 3; // bst_8
|
||||
CsBstLen = 1; // bst_8
|
||||
CasRd = 0x3;
|
||||
}
|
||||
CasWr = 0;
|
||||
DramMr0 =(CasRd<<4)|(BstType<<3)|DramMr0;
|
||||
CrTrtwT = 0; // tic: CasRd + rd_rtw + rd_pipe
|
||||
}
|
||||
|
||||
// countting tRTW
|
||||
if ((CrTrtwT & 0x1)) {
|
||||
CrTrtw = (CrTrtwT+1) /(DfiRate);
|
||||
} else {
|
||||
CrTrtw = CrTrtwT /(DfiRate);
|
||||
}
|
||||
|
||||
DqWidth = DqWidth;
|
||||
Page = Page +1; // DQ16 -> memory:byte_unit *2
|
||||
if (DqWidth == 1) { // paralle dq_16 => Page + 1
|
||||
Page = Page +1;
|
||||
}
|
||||
|
||||
// REG_SDR_MISC
|
||||
tmp =(Page<<0)|(Bank<<4)|(CsBstLen<<6)|(DqWidth<<8);
|
||||
__writeMemory32(tmp, 0x40005224, "Memory"); __delay(10);
|
||||
// REG_SDR_DCR
|
||||
tmp =(0x2<<8)|(DqWidth<<4)|(DdrType<<0);
|
||||
__writeMemory32(tmp, 0x40005004, "Memory"); __delay(10);
|
||||
// REG_SDR_IOCR
|
||||
tmp =((CasRd-4)/(DfiRate)<<20)|(0<<17)|(((CasWr-3)/(DfiRate))<<12)|(0<<8);
|
||||
__writeMemory32(tmp, 0x40005008, "Memory"); __delay(10);
|
||||
if(DeviceType != 8){
|
||||
tmp =DramEmr2;
|
||||
__writeMemory32(tmp, 0x40005028, "Memory"); __delay(10);
|
||||
tmp =(1<<2)|(1<<1)|(Mode1DllEnN);
|
||||
__writeMemory32(tmp, 0x40005024, "Memory"); __delay(10);
|
||||
}
|
||||
tmp =DramMr0;
|
||||
__writeMemory32(tmp, 0x40005020, "Memory"); __delay(10);
|
||||
tmp =(0<<28)|(9<<24)|((((TrefiPs)/DramPeriod)+1)<<8)|((((TrfcPs)/DramPeriod)+1)<<0);
|
||||
__writeMemory32(tmp, 0x40005010, "Memory"); __delay(10);
|
||||
tmp =((((TrtpTck)/DfiRate)+1)<<13)|(CrTwr<<9)|((((TrasPs)/DramPeriod)+1)<<4)|((((TrpPs)/DramPeriod)+1)<<0);
|
||||
__writeMemory32(tmp, 0x40005014, "Memory"); __delay(10);
|
||||
tmp =(CrTrtw << 20) |
|
||||
((((TwtrTck)/DfiRate)+3) << 17) |
|
||||
((((TccdTck)/DfiRate)+1) << 14) |
|
||||
((((TrcdPs)/DramPeriod)+1) << 10) |
|
||||
((((TrcPs)/DramPeriod)+1) << 4 ) |
|
||||
(((TrrdTck/DfiRate)+1) << 0);
|
||||
__writeMemory32(tmp, 0x40005018, "Memory"); __delay(10);
|
||||
tmp =(TmrdTck<<5)|(0<<4)|(2<<0);
|
||||
__writeMemory32(tmp, 0x4000501c, "Memory"); __delay(10);
|
||||
// Set Idle
|
||||
__writeMemory32(0x700, 0x4000500c, "Memory"); __delay(10);
|
||||
// start init
|
||||
__writeMemory32(0x1, 0x40005000, "Memory"); __delay(100);
|
||||
tmp = __readMemory32(0x40005000,"Memory"); __delay(10);
|
||||
// enter memory mode
|
||||
__writeMemory32(0x600, 0x4000500c, "Memory"); __delay(10);
|
||||
}
|
||||
|
||||
__config_dram_param_fixed(){
|
||||
__var tmp;
|
||||
// Dram Attribute
|
||||
__writeMemory32(0x1, 0x40005224, "Memory"); __delay(10);
|
||||
__writeMemory32(0x2c8, 0x40005004, "Memory"); __delay(10);
|
||||
__writeMemory32(0xffffd000, 0x40005008, "Memory"); __delay(10);
|
||||
__delay(3);
|
||||
__writeMemory32(0x22, 0x40005020, "Memory"); __delay(10);
|
||||
__delay(3);
|
||||
__writeMemory32(0x09032001, 0x40005010, "Memory"); __delay(10);
|
||||
__delay(3);
|
||||
__writeMemory32(0x2611, 0x40005014, "Memory"); __delay(10);
|
||||
__delay(3);
|
||||
__writeMemory32(0x68413, 0x40005018, "Memory"); __delay(10);
|
||||
__delay(3);
|
||||
__writeMemory32(0x42, 0x4000501c, "Memory"); __delay(10);
|
||||
__delay(3);
|
||||
|
||||
// Enable
|
||||
__writeMemory32(0x700, 0x4000500c, "Memory"); __delay(10);
|
||||
__delay(20);
|
||||
__writeMemory32(0x1, 0x40005000, "Memory"); __delay(10);
|
||||
__delay(100);
|
||||
tmp = __readMemory32(0x40005000,"Memory"); __delay(10);
|
||||
__writeMemory32(0x600, 0x4000500c, "Memory"); __delay(10);
|
||||
__delay(30);
|
||||
}
|
||||
|
||||
__mem_test(){
|
||||
__var i;
|
||||
__var vaddr;
|
||||
__var tmp;
|
||||
|
||||
i=0;
|
||||
while(i<10){
|
||||
vaddr = 0x30000000+((i*23)&0x1FFFFC);
|
||||
__writeMemory32(0x55AA55AA, vaddr, "Memory");
|
||||
tmp = __readMemory32(vaddr,"Memory");
|
||||
if(tmp!=0x55AA55AA)
|
||||
return 1;
|
||||
i=i+1;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
__var ok_pipe_id0;
|
||||
__var ok_pipe_id1;
|
||||
__var ok_tpc_min0;
|
||||
__var ok_tpc_max0;
|
||||
__var ok_tpc_min1;
|
||||
__var ok_tpc_max1;
|
||||
__var tpc0_cnt;
|
||||
__var tpc1_cnt;
|
||||
|
||||
// calibration result
|
||||
__var isCalibrationDone;
|
||||
|
||||
__dram_calibration(){
|
||||
__var rdp;
|
||||
__var tpc;
|
||||
__var rdp_reg;
|
||||
__var tpc_reg;
|
||||
__var err_cnt;
|
||||
__var ok_cnt;
|
||||
|
||||
|
||||
ok_cnt=0;
|
||||
ok_pipe_id0 = 15;
|
||||
ok_tpc_min0 = 12;
|
||||
ok_tpc_max0 = 0;
|
||||
|
||||
rdp_reg = __readMemory32(0x40005008,"Memory")&0xFFFF00FF;
|
||||
tpc_reg = __readMemory32(0x40000300,"Memory")&0xFF00FFFF;
|
||||
for(rdp=0;(rdp<=7)&&(err_cnt==0||ok_cnt==0);rdp++){
|
||||
err_cnt=0;
|
||||
// try pipe
|
||||
__writeMemory32(rdp_reg|rdp<<8,0x40005008, "Memory");__delay(10);
|
||||
for(tpc=0;(tpc<=12)&&(err_cnt<2);tpc++){
|
||||
// try tpc
|
||||
__writeMemory32(tpc_reg|tpc<<16,0x40000300, "Memory");__delay(10);
|
||||
if(__mem_test()==0){
|
||||
if(ok_pipe_id0==15) {ok_pipe_id0 = rdp; ok_cnt++;}
|
||||
if(ok_tpc_min0>tpc) ok_tpc_min0 = tpc;
|
||||
if(ok_tpc_max0<tpc) ok_tpc_max0 = tpc;
|
||||
}else{
|
||||
err_cnt++;
|
||||
}
|
||||
}
|
||||
if(ok_pipe_id0!=15){
|
||||
ok_pipe_id1 = ok_pipe_id0;
|
||||
ok_tpc_min1 = ok_tpc_min0;
|
||||
ok_tpc_max1 = ok_tpc_max0;
|
||||
ok_pipe_id0 = 15;
|
||||
ok_tpc_min0 = 12;
|
||||
ok_tpc_max0 = 0;
|
||||
}
|
||||
}
|
||||
tpc0_cnt = ok_tpc_max0-ok_tpc_min0;
|
||||
if(tpc0_cnt<0) tpc0_cnt = 0;
|
||||
tpc1_cnt = ok_tpc_max1-ok_tpc_min1;
|
||||
if(tpc1_cnt<0) tpc1_cnt = 0;
|
||||
|
||||
if(tpc1_cnt>tpc0_cnt){
|
||||
__writeMemory32(rdp_reg|ok_pipe_id1<<8,0x40005008, "Memory");__delay(10);
|
||||
__writeMemory32(tpc_reg|(tpc1_cnt/2)<<16,0x40000300, "Memory");__delay(10);
|
||||
}else{
|
||||
__writeMemory32(rdp_reg|ok_pipe_id0<<8,0x40005008, "Memory");__delay(10);
|
||||
__writeMemory32(tpc_reg|(tpc0_cnt/2)<<16,0x40000300, "Memory");__delay(10);
|
||||
}
|
||||
}
|
||||
|
||||
__setup_system()
|
||||
{
|
||||
__var tmp;
|
||||
|
||||
__hwReset(1);
|
||||
|
||||
__writeMemory32(0x21, 0x40000014, "Memory"); __delay(10);
|
||||
__writeMemory32(0x1FC00002, 0x40000304, "Memory"); __delay(10);
|
||||
__writeMemory32(0x400, 0x40000250, "Memory"); __delay(10);
|
||||
__writeMemory32(0x0, 0x40000340, "Memory"); __delay(10);
|
||||
__writeMemory32(0xdcc4, 0x40000230, "Memory"); __delay(10);
|
||||
__writeMemory32(0x11117, 0x40000210, "Memory"); __delay(10);
|
||||
__writeMemory32(0x11157, 0x40000210, "Memory"); __delay(10);
|
||||
__writeMemory32(0x110011, 0x400002c0, "Memory"); __delay(10);
|
||||
__writeMemory32(0xffffffff, 0x40000320, "Memory"); __delay(10);
|
||||
|
||||
__config_dram_param();
|
||||
|
||||
if(isCalibrationDone){
|
||||
__var rdp_reg;
|
||||
__var tpc_reg;
|
||||
rdp_reg = __readMemory32(0x40005008,"Memory")&0xFFFF00FF;
|
||||
tpc_reg = __readMemory32(0x40000300,"Memory")&0xFF00FFFF;
|
||||
|
||||
if(tpc1_cnt>tpc0_cnt){
|
||||
__writeMemory32(rdp_reg|ok_pipe_id1<<8,0x40005008, "Memory");__delay(10);
|
||||
__writeMemory32(tpc_reg|(tpc1_cnt/2)<<16,0x40000300, "Memory");__delay(10);
|
||||
}else{
|
||||
__writeMemory32(rdp_reg|ok_pipe_id0<<8,0x40005008, "Memory");__delay(10);
|
||||
__writeMemory32(tpc_reg|(tpc0_cnt/2)<<16,0x40000300, "Memory");__delay(10);
|
||||
}
|
||||
}else{
|
||||
// Calibration
|
||||
__dram_calibration();
|
||||
isCalibrationDone = 1;
|
||||
}
|
||||
}
|
||||
|
||||
execUserPreload()
|
||||
{
|
||||
// Register dram common.mac
|
||||
__registerMacroFile("$PROJ_DIR$\\..\\..\\..\\component\\soc\\realtek\\8195a\\misc\\iar_utility\\common\\dram\\common.mac");
|
||||
__load_dram_common();
|
||||
isCalibrationDone = 0;
|
||||
|
||||
__message "User Preload....";
|
||||
if(__driverType("jlink")){
|
||||
__message "driver type J-LINK";
|
||||
}else if(__driverType("cmsisdap")){
|
||||
__message "driver type CMSIS-DAP";
|
||||
}else if(__driverType("cmsisdap")){
|
||||
__message "driver type I-JET";
|
||||
}
|
||||
__setup_system();
|
||||
}
|
||||
|
||||
execUserSetup()
|
||||
{
|
||||
__var tmp;
|
||||
__message "User Setup....";
|
||||
// if use normal reset, please unmark those 2 lines
|
||||
//execUserPreload();
|
||||
__setup_system();
|
||||
if(__driverType("jlink")){
|
||||
__loadImage("$TARGET_PATH$ ", 0, 0);
|
||||
tmp = __readMemory32(0x40000210, "Memory")|(1<<27);
|
||||
//tmp = __readMemory32(0x40000210, "Memory")|(1<<21);
|
||||
}else if(__driverType("cmsisdap") || __driverType("ijet")){
|
||||
tmp = __readMemory32(0x40000210, "Memory")|(1<<21);
|
||||
}else{
|
||||
__message "Not support drive type";
|
||||
}
|
||||
__writeMemory32(tmp, 0x40000210, "Memory");
|
||||
}
|
||||
|
||||
execUserReset()
|
||||
{
|
||||
__var tmp;
|
||||
__message "User Reset....";
|
||||
tmp = __readMemory32(0x40000210, "Memory")&(~(1<<27));
|
||||
tmp = tmp & (~(1<<21));
|
||||
__writeMemory32(tmp, 0x40000210, "Memory");
|
||||
}
|
||||
Binary file not shown.
Binary file not shown.
BIN
component/soc/realtek/8195a/misc/iar_utility/common/tools/pick
Normal file
BIN
component/soc/realtek/8195a/misc/iar_utility/common/tools/pick
Normal file
Binary file not shown.
|
|
@ -0,0 +1,256 @@
|
|||
/*
|
||||
* rtl_lib.h
|
||||
*
|
||||
* Definitions for RTL library functions
|
||||
*/
|
||||
|
||||
#ifndef _RTL_LIB_ROM_H_
|
||||
#define _RTL_LIB_ROM_H_
|
||||
|
||||
|
||||
#include <basic_types.h>
|
||||
#include <diag.h>
|
||||
|
||||
#include <reent.h>
|
||||
|
||||
#include "../libc/rom/string/rom_libc_string.h"
|
||||
#include "../libgloss/rtl8195a/rom/rom_libgloss_retarget.h"
|
||||
|
||||
#ifndef _PTR
|
||||
#define _PTR void *
|
||||
#endif
|
||||
|
||||
#ifndef _AND
|
||||
#define _AND ,
|
||||
#endif
|
||||
|
||||
#ifndef _NOARGS
|
||||
#define _NOARGS void
|
||||
#endif
|
||||
|
||||
#ifndef _CONST
|
||||
#define _CONST const
|
||||
#endif
|
||||
|
||||
#ifndef _VOLATILE
|
||||
#define _VOLATILE volatile
|
||||
#endif
|
||||
|
||||
#ifndef _SIGNED
|
||||
#define _SIGNED signed
|
||||
#endif
|
||||
|
||||
#ifndef _DOTS
|
||||
#define _DOTS , ...
|
||||
#endif
|
||||
|
||||
#ifndef _VOID
|
||||
#define _VOID void
|
||||
#endif
|
||||
|
||||
|
||||
//
|
||||
// RTL library functions in ROM
|
||||
//
|
||||
|
||||
#define __rtl_memset __rtl_memset_v1_00
|
||||
#define __rtl_memchr __rtl_memchr_v1_00
|
||||
#define __rtl_memmove __rtl_memmove_v1_00
|
||||
#define __rtl_strcmp __rtl_strcmp_v1_00
|
||||
#define __rtl_memcpy __rtl_memcpy_v1_00
|
||||
|
||||
|
||||
|
||||
extern _LONG_CALL_ void * __rtl_memset_v1_00(void * m , int c , size_t n);
|
||||
extern _LONG_CALL_ void * __rtl_memchr_v1_00(const void * src_void , int c , size_t length);
|
||||
extern _LONG_CALL_ void * __rtl_memmove_v1_00( void * dst_void , const void * src_void , size_t length);
|
||||
extern _LONG_CALL_ int __rtl_strcmp_v1_00(const char *s1 , const char *s2);
|
||||
extern _LONG_CALL_ void * __rtl_memcpy_v1_00(void * __restrict dst0 , const void * __restrict src0 , size_t len0);
|
||||
|
||||
|
||||
//
|
||||
// rtl eabi functions
|
||||
//
|
||||
|
||||
#define __rtl_itod __rtl_itod_v1_00
|
||||
#define __rtl_dtoi __rtl_dtoi_v1_00
|
||||
#define __rtl_uitof __rtl_uitof_v1_00
|
||||
#define __rtl_uitod __rtl_uitod_v1_00
|
||||
|
||||
|
||||
|
||||
#define __rtl_dcmpeq __rtl_dcmpeq_v1_00
|
||||
#define __rtl_dcmplt __rtl_dcmplt_v1_00
|
||||
#define __rtl_dcmpgt __rtl_dcmpgt_v1_00
|
||||
|
||||
|
||||
#define __rtl_dadd __rtl_dadd_v1_00
|
||||
#define __rtl_dsub __rtl_dsub_v1_00
|
||||
#define __rtl_dmul __rtl_dmul_v1_00
|
||||
#define __rtl_ddiv __rtl_ddiv_v1_00
|
||||
|
||||
extern _LONG_CALL_ double __rtl_itod_v1_00(int lval);
|
||||
extern _LONG_CALL_ int __rtl_dtoi_v1_00(double d);
|
||||
extern _LONG_CALL_ float __rtl_uitof_v1_00(unsigned int lval);
|
||||
extern _LONG_CALL_ double __rtl_uitod_v1_00(unsigned int lval);
|
||||
|
||||
|
||||
extern _LONG_CALL_ int __rtl_dcmpeq_v1_00(double a, double b);
|
||||
extern _LONG_CALL_ int __rtl_dcmplt_v1_00(double a, double b);
|
||||
extern _LONG_CALL_ int __rtl_dcmpgt_v1_00(double a, double b);
|
||||
|
||||
|
||||
extern _LONG_CALL_ double __rtl_dadd_v1_00(double a, double b);
|
||||
extern _LONG_CALL_ double __rtl_dsub_v1_00(double a, double b);
|
||||
extern _LONG_CALL_ double __rtl_dmul_v1_00(double a, double b);
|
||||
extern _LONG_CALL_ double __rtl_ddiv_v1_00(double a, double b);
|
||||
|
||||
|
||||
//
|
||||
// mprec
|
||||
//
|
||||
|
||||
#include <reent.h>
|
||||
|
||||
|
||||
typedef struct _Bigint _Bigint;
|
||||
|
||||
|
||||
#define __rtl_Balloc __rtl_Balloc_v1_00
|
||||
#define __rtl_Bfree __rtl_Bfree_v1_00
|
||||
#define __rtl_d2b __rtl_d2b_v1_00
|
||||
#define __rtl_i2b __rtl_i2b_v1_00
|
||||
#define __rtl_pow5mult __rtl_pow5mult_v1_00
|
||||
#define __rtl_multadd __rtl_multadd_v1_00
|
||||
#define __rtl_mult __rtl_mult_v1_00
|
||||
#define __rtl_hi0bits __rtl_hi0bits_v1_00
|
||||
#define __rtl_lshift __rtl_lshift_v1_00
|
||||
#define __rtl_cmp __rtl_cmp_v1_00
|
||||
#define __rtl_diff __rtl_diff_v1_00
|
||||
|
||||
|
||||
extern _LONG_CALL_ _Bigint * __rtl_Balloc_v1_00(struct _reent *ptr, int k);
|
||||
|
||||
extern _LONG_CALL_ void __rtl_Bfree_v1_00(struct _reent *ptr, _Bigint * v);
|
||||
|
||||
extern _LONG_CALL_ _Bigint * __rtl_d2b_v1_00(struct _reent * ptr, double _d, int *e, int *bits);
|
||||
extern _LONG_CALL_ _Bigint * __rtl_i2b_v1_00(struct _reent *ptr, int i );
|
||||
extern _LONG_CALL_ _Bigint * __rtl_pow5mult_v1_00(struct _reent * ptr, _Bigint *b, int k);
|
||||
extern _LONG_CALL_ _Bigint * __rtl_multadd_v1_00(struct _reent *ptr, _Bigint * b, int m, int a);
|
||||
extern _LONG_CALL_ _Bigint * __rtl_mult_v1_00(struct _reent *ptr, _Bigint *a, _Bigint *b);
|
||||
extern _LONG_CALL_ int __rtl_hi0bits_v1_00(register __ULong x);
|
||||
extern _LONG_CALL_ _Bigint *__rtl_lshift_v1_00(struct _reent *ptr, _Bigint *b, int k);
|
||||
extern _LONG_CALL_ int __rtl_cmp_v1_00(_Bigint *a, _Bigint *b);
|
||||
extern _LONG_CALL_ _Bigint *__rtl_diff_v1_00(struct _reent* ptr, _Bigint *a, _Bigint *b);
|
||||
|
||||
//
|
||||
// dtoa
|
||||
//
|
||||
|
||||
#define __rtl_dtoa_r __rtl_dtoa_r_v1_00
|
||||
|
||||
extern char * __rtl_dtoa_r_v1_00(struct _reent *ptr, double _d, int mode, int ndigits, int *decpt, int *sign, char **rve);
|
||||
|
||||
//
|
||||
// mallocr
|
||||
//
|
||||
#include <sys/config.h>
|
||||
#include <reent.h>
|
||||
|
||||
|
||||
|
||||
#define __rom_mallocr_init __rom_mallocr_init_v1_00
|
||||
|
||||
#define __rtl_calloc_r __rtl_calloc_r_v1_00
|
||||
#define __rtl_cfree_r __rtl_cfree_r_v1_00
|
||||
#define __rtl_malloc_r __rtl_malloc_r_v1_00
|
||||
#define __rtl_free_r __rtl_free_r_v1_00
|
||||
#define __rtl_realloc_r __rtl_realloc_r_v1_00
|
||||
#define __rtl_memalign_r __rtl_memalign_r_v1_00
|
||||
#define __rtl_valloc_r __rtl_valloc_r_v1_00
|
||||
#define __rtl_pvalloc_r __rtl_pvalloc_r_v1_00
|
||||
|
||||
|
||||
extern _LONG_CALL_ void __rom_mallocr_init_v1_00(void);
|
||||
|
||||
|
||||
#define RARG struct _reent *reent_ptr,
|
||||
extern _LONG_CALL_ void* __rtl_calloc_r_v1_00(RARG size_t n, size_t elem_size);
|
||||
extern _LONG_CALL_ void __rtl_cfree_r_v1_00(void *mem);
|
||||
extern _LONG_CALL_ void* __rtl_malloc_r_v1_00(RARG size_t bytes);
|
||||
extern _LONG_CALL_ void __rtl_free_r_v1_00(RARG void* mem);
|
||||
extern _LONG_CALL_ void* __rtl_realloc_r_v1_00(RARG void* oldmem, size_t bytes);
|
||||
extern _LONG_CALL_ void* __rtl_memalign_r_v1_00(RARG size_t alignment, size_t bytes);
|
||||
extern _LONG_CALL_ void* __rtl_valloc_r_v1_00(RARG size_t bytes);
|
||||
extern _LONG_CALL_ void* __rtl_pvalloc_r_v1_00(RARG size_t bytes);
|
||||
|
||||
|
||||
//
|
||||
// stdio
|
||||
//
|
||||
extern int __rtl_errno;
|
||||
|
||||
#ifndef _READ_WRITE_RETURN_TYPE
|
||||
#define _READ_WRITE_RETURN_TYPE _ssize_t
|
||||
#endif
|
||||
|
||||
#ifndef _READ_WRITE_BUFSIZE_TYPE
|
||||
#define _READ_WRITE_BUFSIZE_TYPE int
|
||||
#endif
|
||||
|
||||
#define __rtl_sread __rtl_sread_v1_00
|
||||
#define __rtl_swrite __rtl_swrite_v1_00
|
||||
#define __rtl_seofread __rtl_seofread_v1_00
|
||||
#define __rtl_sseek __rtl_sseek_v1_00
|
||||
#define __rtl_sclose __rtl_sclose_v1_00
|
||||
#define __rtl_sbrk_r __rtl_sbrk_r_v1_00
|
||||
|
||||
extern _LONG_CALL_ _READ_WRITE_RETURN_TYPE __rtl_sread_v1_00(
|
||||
struct _reent *ptr,
|
||||
void *cookie,
|
||||
char *buf,
|
||||
_READ_WRITE_BUFSIZE_TYPE n);
|
||||
|
||||
extern _LONG_CALL_ _READ_WRITE_RETURN_TYPE __rtl_swrite_v1_00(
|
||||
struct _reent *ptr,
|
||||
void *cookie,
|
||||
char const *buf,
|
||||
_READ_WRITE_BUFSIZE_TYPE n);
|
||||
|
||||
extern _LONG_CALL_ _READ_WRITE_RETURN_TYPE __rtl_seofread_v1_00(
|
||||
struct _reent *_ptr,
|
||||
_PTR cookie,
|
||||
char *buf,
|
||||
_READ_WRITE_BUFSIZE_TYPE len);
|
||||
|
||||
extern _LONG_CALL_ _fpos_t __rtl_sseek_v1_00(
|
||||
struct _reent *ptr _AND
|
||||
void *cookie _AND
|
||||
_fpos_t offset _AND
|
||||
int whence);
|
||||
|
||||
extern _LONG_CALL_ int __rtl_sclose_v1_00(
|
||||
struct _reent *ptr _AND
|
||||
void *cookie);
|
||||
|
||||
extern _LONG_CALL_ void * __rtl_sbrk_r_v1_00(
|
||||
struct _reent *ptr,
|
||||
ptrdiff_t incr);
|
||||
|
||||
//
|
||||
// vfprintf
|
||||
//
|
||||
|
||||
#include <stdio.h>
|
||||
#include <stdarg.h>
|
||||
|
||||
#define __rtl_vfprintf_r __rtl_vfprintf_r_v1_00
|
||||
|
||||
extern _LONG_CALL_ int __rtl_vfprintf_r_v1_00(struct _reent *, FILE *, const char *, va_list);
|
||||
|
||||
#ifndef CONFIG_RELEASE_BUILD_LIBRARIES
|
||||
#define __rtl_fflush_r __rtl_fflush_r_v1_00
|
||||
extern _LONG_CALL_ int __rtl_fflush_r_v1_00(struct _reent *ptr, register FILE * fp);
|
||||
#endif
|
||||
|
||||
#endif /* _RTL_LIB_ROM_H_ */
|
||||
143
component/soc/realtek/8195a/misc/rtl_std_lib/include/rtl_lib.h
Normal file
143
component/soc/realtek/8195a/misc/rtl_std_lib/include/rtl_lib.h
Normal file
|
|
@ -0,0 +1,143 @@
|
|||
/*
|
||||
* rtl_lib.h
|
||||
*
|
||||
* Definitions for RTL library functions
|
||||
*/
|
||||
|
||||
#ifndef _RTL_LIB_H_
|
||||
#define _RTL_LIB_H_
|
||||
|
||||
|
||||
#include <basic_types.h>
|
||||
#include <diag.h>
|
||||
|
||||
|
||||
extern int __rtl_errno;
|
||||
|
||||
|
||||
void init_rom_libgloss_ram_map(void);
|
||||
|
||||
|
||||
//
|
||||
// RTL library functions for Libc::stdio
|
||||
//
|
||||
|
||||
extern int rtl_printf(IN const char* fmt, ...);
|
||||
extern int rtl_vprintf(const char *fmt, void *param);
|
||||
extern int rtl_sprintf(char* str, const char* fmt, ...);
|
||||
extern int rtl_snprintf(char* str, size_t size, const char* fmt, ...);
|
||||
extern int rtl_vsnprintf(char *str, size_t size, const char *fmt, void *param);
|
||||
|
||||
//
|
||||
// RTL library functions for string
|
||||
//
|
||||
|
||||
extern void * rtl_memchr(const void * src_void , int c , size_t length);
|
||||
extern int rtl_memcmp(const void * m1 , const void * m2 , size_t n);
|
||||
extern void * rtl_memcpy(void * dst0 , const void * src0 , size_t len0);
|
||||
extern void * rtl_memmove( void * dst_void , const void * src_void , size_t length);
|
||||
extern void * rtl_memset(void * m , int c , size_t n);
|
||||
extern char * rtl_strcat(char * s1 , const char * s2);
|
||||
extern char * rtl_strchr(const char *s1 , int i);
|
||||
extern int rtl_strcmp(const char *s1 , const char *s2);
|
||||
extern char* rtl_strcpy(char *dst0 , const char *src0);
|
||||
extern size_t rtl_strlen(const char *str);
|
||||
extern char * rtl_strncat(char * s1 , const char * s2 , size_t n);
|
||||
extern int rtl_strncmp(const char *s1 , const char *s2 , size_t n);
|
||||
extern char * rtl_strncpy(char * dst0 , const char * src0 , size_t count);
|
||||
extern char * rtl_strstr(const char *searchee , const char *lookfor);
|
||||
extern char * rtl_strsep(char **source_ptr , const char *delim);
|
||||
extern char * rtl_strtok(char * s , const char * delim);
|
||||
|
||||
//
|
||||
// RTL library functions for math
|
||||
//
|
||||
|
||||
|
||||
extern double rtl_fabs(double);
|
||||
extern float rtl_fabsf(float a);
|
||||
extern float rtl_cos_f32(float a);
|
||||
extern float rtl_sin_f32(float a);
|
||||
|
||||
extern float rtl_fadd(float a, float b);
|
||||
extern float rtl_fsub(float a, float b);
|
||||
extern float rtl_fmul(float a, float b);
|
||||
extern float rtl_fdiv(float a, float b);
|
||||
|
||||
extern int rtl_fcmplt(float a, float b);
|
||||
extern int rtl_fcmpgt(float a, float b);
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
//
|
||||
// RTL eabi functions
|
||||
|
||||
extern double rtl_ftod(float f);
|
||||
|
||||
extern double rtl_ddiv(double a, double b);
|
||||
|
||||
|
||||
//
|
||||
// Macro Library Functions
|
||||
//
|
||||
|
||||
typedef union
|
||||
{
|
||||
float value;
|
||||
u32 word;
|
||||
} ieee_float_shape_type;
|
||||
|
||||
/* Get a 32 bit int from a float. */
|
||||
|
||||
#define GET_FLOAT_WORD(i,d) \
|
||||
do { \
|
||||
ieee_float_shape_type gf_u; \
|
||||
gf_u.value = (d); \
|
||||
(i) = gf_u.word; \
|
||||
} while (0)
|
||||
|
||||
/* Set a float from a 32 bit int. */
|
||||
|
||||
#define SET_FLOAT_WORD(d,i) \
|
||||
do { \
|
||||
ieee_float_shape_type sf_u; \
|
||||
sf_u.word = (i); \
|
||||
(d) = sf_u.value; \
|
||||
} while (0)
|
||||
|
||||
static inline
|
||||
float rtl_nanf(void)
|
||||
{
|
||||
float x;
|
||||
|
||||
SET_FLOAT_WORD(x,0x7fc00000);
|
||||
return x;
|
||||
}
|
||||
|
||||
|
||||
//
|
||||
// Library Test functions
|
||||
//
|
||||
|
||||
extern int rtl_lib_test(IN u16 argc, IN u8 *argv[]);
|
||||
extern int rtl_math_test(IN u16 argc, IN u8 *argv[]);
|
||||
extern int rtl_string_test(IN u16 argc, IN u8 *argv[]);
|
||||
|
||||
|
||||
//
|
||||
// Macro functions
|
||||
//
|
||||
|
||||
#undef dbg_printf
|
||||
#define dbg_printf(fmt, args...) \
|
||||
rtl_printf("%s():%d : " fmt "\n", __FUNCTION__, __LINE__, ##args);
|
||||
|
||||
|
||||
#undef err_printf
|
||||
#define err_printf(fmt, args...) \
|
||||
rtl_printf("%s():%d : " fmt "\n", __FUNCTION__, __LINE__, ##args);
|
||||
|
||||
|
||||
#endif /* _RTL_LIB_H_ */
|
||||
Loading…
Add table
Add a link
Reference in a new issue