mirror of
https://github.com/pvvx/RTL00_WEB.git
synced 2024-12-25 07:25:17 +00:00
99 lines
2.3 KiB
Text
99 lines
2.3 KiB
Text
proc cortex_bootstrap {start} {
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# disable interrupts
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reg faultmask 0x01
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set vectors ""
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mem2array vectors 32 $start 2
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reg sp $vectors(0)
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reg pc $vectors(1)
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resume
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}
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proc cortex_reboot {} {
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set ddd [ format "0x%08x" [ rtl8710_flasher_mrw [ expr 0x40000210 ] ] ]
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# set aaa [ format "0x%08x" [ expr 0x40000210 ] ]
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echo "CLK_CTRL1 = $ddd"
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# echo "# Set processor clock to default before system reset"
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set ddd [ format "0x%08x" [ rtl8710_flasher_mrw [ expr 0x40000014 ] ] ]
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# set aaa [ format "0x%08x" [ expr 0x40000014 ] ]
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echo "SOC_FUNC_EN = $ddd"
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# mww 0x40000014 0x00000021
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sleep 10
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echo "# Reboot (system reset)"
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mww 0xE000ED0C 0x05FA0007
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}
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proc init_system {} {
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# Set processor clock to default before system reset
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# CLK_CTRL1
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# mww 0x40000014 0x00000011
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mww 0x40000014 0x00000021
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sleep 10
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# PESOC_SOC_CTRL
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# mww 0x40000304 0x1fc00001
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mww 0x40000304 0x1fc00002
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sleep 10
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# PESOC_CLK_SEL
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mww 0x40000250 0x00000400
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sleep 10
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# GPIO_PULL_CTRL4
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mww 0x40000340 0x00000000
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sleep 10
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# PESOC_CLK_CTRL
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# mww 0x40000230 0x0000d3c4
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mww 0x40000230 0x0000dcc4
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sleep 10
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# SOC_FUNC_EN: FUN|OCP|LXBUS|FLASH|CPU|LOG_UART|GTIMER|SECURITY_ENGINE
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# mww 0x40000210 0x00211117
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mww 0x40000210 0x00011117
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sleep 10
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# SOC_FUNC_EN: FUN|OCP|LXBUS|FLASH|CPU|LOG_UART|GTIMER|SECURITY_ENGINE + MEM_CTRL
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mww 0x40000210 0x00011157
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sleep 10
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# CPU_PERIPHERAL_CTRL SPI_FLASH_PIN_EN|SDR_PIN_EN|SWD_PIN_EN|LOG_UART_PIN_EN ?
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# mww 0x400002c0 0x00110000
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mww 0x400002c0 0x00110011
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sleep 10
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# GPIO_SHTDN_CTRL
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# mww 0x40000320 0x00000033
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mww 0x40000320 0xffffffff
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sleep 10
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mww 0x40005008 0x00000000
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sleep 10
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# PESOC_MEM_CTRL
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mww 0x40000300 0x0006005e
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sleep 10
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# set baudrate to 38400
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# mww 0x40003010 0x00000080
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# mww 0x40003008 0x00000022
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# mww 0x4000300C 0x00000000
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# mww 0x40003010 0x00000000
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}
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proc boot_from_flash {} {
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echo "# skip sdram init, it has been init in openocd config"
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mww 0x40000210 0x211157
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}
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proc boot_from_ram {} {
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echo "# boot from ram, igonore loading flash"
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mww 0x40000210 0x8011157
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}
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proc restart_from_falsh {} {
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init
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init_system
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boot_from_flash
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cortex_reboot
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}
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proc load_ram_binary { local_filename address } {
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# set address 0x10000BC8
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init
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reset halt
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set size [file size $local_filename]
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load_image $local_filename $address bin $address $size
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boot_from_ram
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resume
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}
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