diff --git a/.cproject b/.cproject
index 7761f3a..523a983 100644
--- a/.cproject
+++ b/.cproject
@@ -668,10 +668,10 @@
 			</target>
 			<target name="reset" path="" targetID="org.eclipse.cdt.build.MakeTargetBuilder">
 				<buildCommand>mingw32-make.exe</buildCommand>
-				<buildArguments/>
+				<buildArguments>-s</buildArguments>
 				<buildTarget>reset</buildTarget>
 				<stopOnError>true</stopOnError>
-				<useDefaultCommand>false</useDefaultCommand>
+				<useDefaultCommand>true</useDefaultCommand>
 				<runAllBuilders>false</runAllBuilders>
 			</target>
 			<target name="test" path="" targetID="org.eclipse.cdt.build.MakeTargetBuilder">
diff --git a/USDK/component/common/mbed/targets/hal/rtl8195a/sys_api.c b/USDK/component/common/mbed/targets/hal/rtl8195a/sys_api.c
index a9416b3..93345c7 100644
--- a/USDK/component/common/mbed/targets/hal/rtl8195a/sys_api.c
+++ b/USDK/component/common/mbed/targets/hal/rtl8195a/sys_api.c
@@ -38,12 +38,13 @@ extern VOID HalJtagPinOff(VOID);
 
 extern void HalInitLogUart(void);
 extern void HalDeinitLogUart(void);
-
+/*
 #ifdef	CONFIG_SDR_EN
 //#if defined ( __ICCARM__ )
 extern u8 IsSdrPowerOn();
 //#endif
 #endif
+*/
 /**
  *  @brief   Turn off the JTAG function
  *
@@ -203,12 +204,12 @@ void sys_reset(void)
 	                              (1 << 2));                                  // SYSRESETREQ
 }
 
+/*
 #ifdef	CONFIG_SDR_EN
 u8 sys_is_sdram_power_on(void)
 {
 	return IsSdrPowerOn();
 }
-
 void sys_sdram_off(void)
 {
 	if (IsSdrPowerOn()) {
@@ -216,3 +217,4 @@ void sys_sdram_off(void)
 	}
 }
 #endif
+*/
diff --git a/USDK/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c b/USDK/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c
index 1fcfab6..471f9b3 100644
--- a/USDK/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c
+++ b/USDK/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c
@@ -568,7 +568,7 @@ LOCAL void BOOT_RAM_TEXT_SECTION EnterImage15(int flg) {
 		//----- SDRAM Off
 		SDR_PIN_FCTRL(OFF);
 		LDO25M_CTRL(OFF);
-		HAL_PERI_ON_WRITE32(REG_SOC_FUNC_EN, HAL_PERI_ON_READ32(REG_SOC_FUNC_EN) | BIT(21)); // Flag SDRAM Off
+		HAL_PERI_ON_WRITE32(REG_SOC_FUNC_EN, HAL_PERI_ON_READ32(REG_SOC_FUNC_EN) | BIT(21)); // Flag SDRAM Init
 	} else {
 		//----- SDRAM On
 		LDO25M_CTRL(ON);
@@ -580,7 +580,7 @@ LOCAL void BOOT_RAM_TEXT_SECTION EnterImage15(int flg) {
 		DBG_8195A("Spic Init Error!\n");
 		RtlConsolRam();
 	};
-	if ((HAL_PERI_ON_READ32(REG_SOC_FUNC_EN) & BIT(21)) == 0) { // уже загружена?
+	if ((HAL_PERI_ON_READ32(REG_SOC_FUNC_EN) & BIT(21)) == 0) { // Flag SDRAM Init?
 //		extern DRAM_DEVICE_INFO SdrDramInfo_rom;  // 50 MHz
 		if (!SdrControllerInit_rom(&SdrDramInfo)) { // 100 MHz
 			DBG_8195A("SDR Controller Init fail!\n");
@@ -604,7 +604,7 @@ LOCAL void BOOT_RAM_TEXT_SECTION EnterImage15(int flg) {
 			DBG_8195A("SDR tst end\n");
 		};
 #endif // test
-		HAL_PERI_ON_WRITE32(REG_SOC_FUNC_EN, HAL_PERI_ON_READ32(REG_SOC_FUNC_EN) | BIT(21));
+		HAL_PERI_ON_WRITE32(REG_SOC_FUNC_EN, HAL_PERI_ON_READ32(REG_SOC_FUNC_EN) | BIT(21)); // Flag SDRAM Init
 	};
 
 	if (!flg)
diff --git a/USDK/component/soc/realtek/8195a/fwlib/rtl8195a/rtl8195a_peri_on.h b/USDK/component/soc/realtek/8195a/fwlib/rtl8195a/rtl8195a_peri_on.h
index ac2ad51..af4a40f 100644
--- a/USDK/component/soc/realtek/8195a/fwlib/rtl8195a/rtl8195a_peri_on.h
+++ b/USDK/component/soc/realtek/8195a/fwlib/rtl8195a/rtl8195a_peri_on.h
@@ -24,7 +24,7 @@
 //2 REG_NOT_VALID
 
 //2 REG_SOC_FUNC_EN
-// BIT(21) SDRAM
+// BIT(21) = 1 -> SDRAM Init
 #define BIT_SOC_SECURITY_ENGINE_EN BIT(20)
 #define BIT_SOC_GTIMER_EN BIT(16)
 #define BIT_SOC_GDMA1_EN BIT(14)
diff --git a/USDK/component/soc/realtek/8195a/fwlib/src/bitband_io.c b/USDK/component/soc/realtek/8195a/fwlib/src/bitband_io.c
index ac45f96..b1ab94c 100644
--- a/USDK/component/soc/realtek/8195a/fwlib/src/bitband_io.c
+++ b/USDK/component/soc/realtek/8195a/fwlib/src/bitband_io.c
@@ -41,7 +41,9 @@ volatile uint8_t * HardSetPin(PinName pin, HAL_GPIO_PIN_MODE pmode, uint8_t val)
 		if(_pHAL_Gpio_Adapter->Gpio_Func_En == 0) GPIO_FuncOn_8195a();
 		delayMicroseconds(100);
 		// paddr = 0x42000000 + (0x40001000 + 0x0c * (ippin >> 5) - 0x40000000) * 32 + ((ippin & 0x1f) * 4);
+#if CONFIG_DEBUG_LOG > 3		
 		GpioFunctionChk(ippin, ENABLE);
+#endif		
     	GPIO_PullCtrl_8195a(ippin, HAL_GPIO_HIGHZ); // Make the pin pull control default as High-Z
 		paddr = BitBandPeriAddr((void *)(GPIO_REG_BASE + GPIO_PORTB_DR * (ippin >> 5)),  ippin & 0x1f);
 		*paddr = val;						// data register
diff --git a/USDK/component/soc/realtek/8195a/fwlib/src/hal_gpio.c b/USDK/component/soc/realtek/8195a/fwlib/src/hal_gpio.c
index ed665ac..3b3c8dd 100644
--- a/USDK/component/soc/realtek/8195a/fwlib/src/hal_gpio.c
+++ b/USDK/component/soc/realtek/8195a/fwlib/src/hal_gpio.c
@@ -95,6 +95,7 @@ HAL_GPIO_Init(
     port_num = HAL_GPIO_GET_PORT_BY_NAME(GPIO_Pin->pin_name);
     pin_num = HAL_GPIO_GET_PIN_BY_NAME(GPIO_Pin->pin_name);
     chip_pin = GPIO_GetChipPinName_8195a(port_num, pin_num);
+#if CONFIG_DEBUG_LOG > 3
     if (GpioFunctionChk(chip_pin, ENABLE) == _FALSE) {
 //    	if((chip_pin > 0x03) && (chip_pin != 0x25)) {
     		DBG_GPIO_ERR("HAL_GPIO_Init: GPIO Pin(%x) Unavailable\n ", chip_pin);
@@ -102,15 +103,16 @@ HAL_GPIO_Init(
 //    	}
 //    	else DBG_GPIO_WARN("HAL_GPIO_Init: GPIO Pin(%x) Warning for RTL8710AF!\n ", chip_pin);
     }
-
+#endif
     // Make the pin pull control default as High-Z
     GPIO_PullCtrl_8195a(chip_pin, HAL_GPIO_HIGHZ);
 
     ret = HAL_GPIO_Init_8195a(GPIO_Pin);
-    
+#if CONFIG_DEBUG_LOG > 3
     if (ret != HAL_OK) {
         GpioFunctionChk(chip_pin, DISABLE);
     }
+#endif
 }
 
 /**
@@ -146,18 +148,21 @@ HAL_GPIO_Irq_Init(
     port_num = HAL_GPIO_GET_PORT_BY_NAME(GPIO_Pin->pin_name);
     pin_num = HAL_GPIO_GET_PIN_BY_NAME(GPIO_Pin->pin_name);
     chip_pin = GPIO_GetChipPinName_8195a(port_num, pin_num);
+#if CONFIG_DEBUG_LOG > 3
     if (GpioFunctionChk(chip_pin, ENABLE) == _FALSE) {
         DBG_GPIO_ERR("HAL_GPIO_Irq_Init: GPIO Pin(%x) Unavailable\n ", chip_pin);
         return;
     }
-
+#endif
     DBG_GPIO_INFO("HAL_GPIO_Irq_Init: GPIO(name=0x%x)(mode=%d)\n ", GPIO_Pin->pin_name, 
         GPIO_Pin->pin_mode);
     HAL_GPIO_MaskIrq_8195a(GPIO_Pin);
     ret = HAL_GPIO_Init_8195a(GPIO_Pin);
+#if CONFIG_DEBUG_LOG > 3
     if (ret != HAL_OK) {
         GpioFunctionChk(chip_pin, DISABLE);
-    }    
+    }
+#endif
 }
 
 /**
@@ -199,8 +204,9 @@ HAL_GPIO_DeInit(
     pin_num = HAL_GPIO_GET_PIN_BY_NAME(GPIO_Pin->pin_name);
     chip_pin = GPIO_GetChipPinName_8195a(port_num, pin_num);
     HAL_GPIO_DeInit_8195a(GPIO_Pin);
-
+#if CONFIG_DEBUG_LOG > 3
     GpioFunctionChk(chip_pin, DISABLE);
+#endif
 }
 
 
diff --git a/USDK/component/soc/realtek/8195a/fwlib/src/hal_soc_ps_monitor.c b/USDK/component/soc/realtek/8195a/fwlib/src/hal_soc_ps_monitor.c
index 37436e6..12ce624 100644
--- a/USDK/component/soc/realtek/8195a/fwlib/src/hal_soc_ps_monitor.c
+++ b/USDK/component/soc/realtek/8195a/fwlib/src/hal_soc_ps_monitor.c
@@ -207,6 +207,10 @@ SDRSleep(
                     
     HAL_WRITE32(0x40005000, 0X10, HAL_READ32(0x40005000, 0x10)|BIT28);
     ACTCK_SDR_CCTRL(OFF);
+
+    GPIOState[PORT_G] = 0;
+    GPIOState[PORT_J] = 0;
+
     gpio_init(&gpio_obj, PG_1);
     gpio_mode(&gpio_obj, PullUp);
     gpio_dir(&gpio_obj, PIN_OUTPUT);
@@ -243,6 +247,7 @@ SDRSleep(
     gpio_mode(&gpio_obj, PullUp);
     gpio_dir(&gpio_obj, PIN_OUTPUT);
     gpio_write(&gpio_obj, GPIO_PIN_LOW);
+
 }
 #endif
 
diff --git a/USDK/component/soc/realtek/8195a/misc/os/freertos_pmu_8195a.c b/USDK/component/soc/realtek/8195a/misc/os/freertos_pmu_8195a.c
index bf5e9b6..487f927 100644
--- a/USDK/component/soc/realtek/8195a/misc/os/freertos_pmu_8195a.c
+++ b/USDK/component/soc/realtek/8195a/misc/os/freertos_pmu_8195a.c
@@ -74,8 +74,7 @@ void freertos_pre_sleep_processing(unsigned int *expected_idle_time) {
     uint32_t tick_after_sleep;
     uint32_t tick_passed;
     uint32_t backup_systick_reg;
-    unsigned char IsDramOn = 1;
-    unsigned char suspend_sdram = 1;
+    unsigned char suspend_sdram;
 
     /* To disable freertos sleep function and use our sleep function, 
      * we can set original expected idle time to 0. */
@@ -91,23 +90,20 @@ void freertos_pre_sleep_processing(unsigned int *expected_idle_time) {
     // Store gtimer timestamp before sleep
     tick_before_sleep = us_ticker_read();
 
-    if ( sys_is_sdram_power_on() == 0 ) {
-        IsDramOn = 0;
-    }
-
-    if (IsDramOn) {
-#if defined(FREERTOS_PMU_TICKLESS_SUSPEND_SDRAM) && (FREERTOS_PMU_TICKLESS_SUSPEND_SDRAM==0)
-        // sdram is turned on, and we don't want suspend sdram
-        suspend_sdram = 0;
-#endif
-    } else {
-        // sdram didn't turned on, we should not suspend it
-        suspend_sdram = 0;
-    }
-
     backup_systick_reg = portNVIC_SYSTICK_CURRENT_VALUE_REG;
 
-    // sleep
+#if defined(FREERTOS_PMU_TICKLESS_SUSPEND_SDRAM) && (FREERTOS_PMU_TICKLESS_SUSPEND_SDRAM==0)
+	suspend_sdram = 0;
+#else
+#ifdef	CONFIG_SDR_EN
+	extern u8 IsSdrPowerOn();
+	suspend_sdram = IsSdrPowerOn(); // = 0 if SDRAM уже init
+#else
+	suspend_sdram = 0;
+#endif
+#endif
+
+	// sleep
     sleep_ex_selective(wakeup_event, stime, reserve_pll, suspend_sdram);
 
     portNVIC_SYSTICK_CURRENT_VALUE_REG = backup_systick_reg;
diff --git a/project/inc/platform_autoconf.h b/project/inc/platform_autoconf.h
index 8907c51..f3f3127 100644
--- a/project/inc/platform_autoconf.h
+++ b/project/inc/platform_autoconf.h
@@ -156,7 +156,7 @@
 #undef  CONFIG_SPIC_TEST
 #define CONFIG_SPIC_MODULE 1
 #define CONFIG_ADC_EN 1
-//#define CONFIG_DAC_EN 1
+#define CONFIG_DAC_EN 1
 #define CONFIG_NOR_FLASH 1
 #undef  CONFIG_SPI_FLASH
 #undef  CONFIG_NAND_FLASH
diff --git a/project/inc/platform_opts.h b/project/inc/platform_opts.h
index 2be83fe..6ab6663 100644
--- a/project/inc/platform_opts.h
+++ b/project/inc/platform_opts.h
@@ -39,7 +39,7 @@
  * For FreeRTOS tickless configurations
  */
 #define FREERTOS_PMU_TICKLESS_PLL_RESERVED   0   // In sleep mode, 0: close PLL clock, 1: reserve PLL clock
-#define FREERTOS_PMU_TICKLESS_SUSPEND_SDRAM  1   // In sleep mode, 1: suspend SDRAM, 0: no act
+#define FREERTOS_PMU_TICKLESS_SUSPEND_SDRAM  0   // In sleep mode, 1: suspend SDRAM, 0: no act
 
 /******************************************************************************/
 
diff --git a/project/src/console/atcmd_user.c b/project/src/console/atcmd_user.c
index 03a0173..8fc7e5d 100644
--- a/project/src/console/atcmd_user.c
+++ b/project/src/console/atcmd_user.c
@@ -283,6 +283,16 @@ LOCAL void fATLW(int argc, char *argv[]) 	// Info Lwip
 	print_udp_pcb();
 	print_tcp_pcb();
 }
+
+//------------------------------------------------------------------------------
+// GPIO Info
+//------------------------------------------------------------------------------
+LOCAL void fATGI(int argc, char *argv[])
+{
+    int i;
+	for (i = 0; i < _PORT_MAX; i++)
+		printf("Port %c state: 0x%04x\n", i + 'A', GPIOState[i]);
+}
 //------------------------------------------------------------------------------
 // Deep sleep
 //------------------------------------------------------------------------------
@@ -350,6 +360,7 @@ LOCAL void fATSP(int argc, char *argv[])
 MON_RAM_TAB_SECTION COMMAND_TABLE console_commands_at[] = {
 		{"ATST", 0, fATST, ": Memory info"},
 		{"ATLW", 0, fATLW, ": LwIP Info"},
+		{"ATGI", 0, fATGI, ": GPIO Info"},
 		{"ATSB", 1, fATSB, "=<ADDRES(hex)>[,COUNT(dec)]: Dump byte register"},
 		{"ATSD", 1, fATSD, "=<ADDRES(hex)>[,COUNT(dec)]: Dump dword register"},
 		{"ATSW", 2, fATSW, "=<ADDRES(hex)>,<DATA(hex)>: Set register"},
diff --git a/project/src/console/flash_tst.c b/project/src/console/flash_tst.c
index 2499e0d..10246b8 100644
--- a/project/src/console/flash_tst.c
+++ b/project/src/console/flash_tst.c
@@ -30,7 +30,7 @@ LOCAL void FlashDump(int argc, char *argv[]) {
 }
 
 MON_RAM_TAB_SECTION COMMAND_TABLE console_flash_tst[] = {
-		{"FLASHDB", 1, FlashDump, ": <faddr(HEX)>[,size]: Flash Dump"}
+		{"FLASHDB", 1, FlashDump, "=<faddr(HEX)>[,size]: Flash Dump"}
 };
 
 
diff --git a/project/src/console/sd_fat.c b/project/src/console/sd_fat.c
index 69bf080..d481f46 100644
--- a/project/src/console/sd_fat.c
+++ b/project/src/console/sd_fat.c
@@ -377,8 +377,8 @@ LOCAL void fATHS(int argc, char *argv[]) {
 
 
 MON_RAM_TAB_SECTION COMMAND_TABLE console_commands_dscard[] = {
-		{"ATHS", 0, fATHS, ": SD test"},
-		{"ATHF", 0, fATHF, ": SD file read"}
+		{"ATHS", 0, fATHS, "=[dir]: SD test"},
+		{"ATHF", 0, fATHF, "=[dir]: SD file read"}
 };
 
 #endif // CONFIG_SDIO_HOST_EN
diff --git a/project/src/console/spi_tst.c b/project/src/console/spi_tst.c
index 7548065..804bf1c 100644
--- a/project/src/console/spi_tst.c
+++ b/project/src/console/spi_tst.c
@@ -79,5 +79,5 @@ LOCAL void fATSSI(int argc, char *argv[])
 }
 
 MON_RAM_TAB_SECTION COMMAND_TABLE console_commands_spitst[] = {
-		{"ATSSI", 0, fATSSI, "[len[,count[,clk[,ssn]]]]: Spi test"}
+		{"ATSSI", 0, fATSSI, "=[len[,count[,clk[,ssn]]]]: Spi test"}
 };
diff --git a/userset.mk b/userset.mk
index c71a79e..80b2342 100644
--- a/userset.mk
+++ b/userset.mk
@@ -6,8 +6,8 @@ SDK_PATH = USDK/
 #GCC_PATH = d:/MCU/GNU_Tools_ARM_Embedded/6.2017-q1-update/bin/# + or set in PATH
 OPENOCD_PATH = D:/MCU/OpenOCD/bin/
 TOOLS_PATH ?= $(SDK_PATH)component/soc/realtek/8195a/misc/iar_utility/common/tools/
-#FLASHER_TYPE = Jlink
-FLASHER_TYPE = cmsis-dap
+FLASHER_TYPE = Jlink
+#FLASHER_TYPE = cmsis-dap
 FLASHER_SPEED = 3500
 FLASHER_PATH = flasher/
 JLINK_PATH ?= D:/MCU/SEGGER/JLink_V612i/