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pvvx 2017-09-22 10:44:42 +03:00
parent 9ffd9dac1a
commit eac35630e6
31 changed files with 185 additions and 130 deletions
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35
USDK/component/soc/realtek/8195a/fwlib/ram_lib/rtl_boot.c
View file

@ -414,7 +414,7 @@ LOCAL uint32 BOOT_RAM_TEXT_SECTION get_seg_id(uint32 addr, int32 size) {
ptr += 2;
} while (ret < SEG_ID_MAX);
};
return 0;
return 0; // UNK
}
LOCAL uint32 BOOT_RAM_TEXT_SECTION load_img2_head(uint32 faddr, PIMG2HEAD hdr) {
@ -422,13 +422,13 @@ LOCAL uint32 BOOT_RAM_TEXT_SECTION load_img2_head(uint32 faddr, PIMG2HEAD hdr) {
uint32 ret = get_seg_id(hdr->seg.ldaddr, hdr->seg.size);
if (hdr->sign[1] == IMG_SIGN2_RUN) {
if (hdr->sign[0] == IMG_SIGN1_RUN) {
ret |= 1 << 9;
ret |= 1 << 9; // есть сигнатура RUN
} else if (hdr->sign[0] == IMG_SIGN1_SWP) {
ret |= 1 << 8;
ret |= 1 << 8; // есть сигнатура SWP
};
}
if (*(u32 *) (&hdr->rtkwin) == IMG2_SIGN_DW1_TXT) {
ret |= 1 << 10;
ret |= 1 << 10; // есть подпись "RTKW"
};
return ret;
}
@ -474,21 +474,23 @@ LOCAL int BOOT_RAM_TEXT_SECTION loadUserImges(int imgnum) {
while (1) {
faddr = (faddr + FLASH_SECTOR_SIZE - 1) & (~(FLASH_SECTOR_SIZE - 1));
uint32 img_id = load_img2_head(faddr, &hdr);
if ((img_id >> 8) > 4 || (uint8) img_id != 0) {
faddr = load_segs(faddr + 0x10, (PIMG2HEAD) &hdr.seg, imagenum == imgnum);
if (imagenum == imgnum) {
uint32 img_id = load_img2_head(faddr, &hdr); // проверить заголовки запись
if ((img_id >> 8) > 4 && (uint8) img_id != 0) { // есть подпись "RTKW" + RUN или SWP, сегмент != unknown
// загрузить, если imagenum == imgnum
faddr = load_segs(faddr + 0x10, (PIMG2HEAD) &hdr.seg, imagenum == imgnum); // faddr == fnextaddr
if (imagenum == imgnum) { // если искомая img
// DBG_8195A("Image%d: %s\n", imgnum, hdr.name);
break;
}
imagenum++;
} else if (imagenum) {
imagenum++; // перейти к следующей
} else if (imagenum) { // нет подписей у заданной imgnum
DBG_8195A("No Image%d! Trying Image0...\n", imgnum);
// пробуем загрузить image по умолчанию, по записи в секторе установок
flashcpy(FLASH_SYSTEM_DATA_ADDR, &faddr, sizeof(faddr));
if (faddr < 0x8000000)
faddr += SPI_FLASH_BASE;
if (get_seg_id(faddr, 0x100) == SEG_ID_FLASH) {
if (get_seg_id(faddr, 0x100) == SEG_ID_FLASH) { // указывает в Flash?
// будем пробовать грузить
imagenum = 0;
imgnum = 0;
} else {
@ -497,7 +499,7 @@ LOCAL int BOOT_RAM_TEXT_SECTION loadUserImges(int imgnum) {
break;
};
} else {
imagenum = -1;
imagenum = -1; // нет записей image
break;
}
};
@ -605,6 +607,15 @@ LOCAL void BOOT_RAM_TEXT_SECTION EnterImage15(int flg) {
};
DBG_8195A("SDR tst end\n");
};
#endif // test
#ifdef CONFIG_SDR_EN
// Тест и ожидание загрузки Jlink-ом sdram.bin (~7 sec)
if(flg && *((uint32 *)0x1FFF0000) == 0x12345678) {
*((volatile uint32 *)0x1FFF0000) = 0x87654321;
uint32 tt = 0x03ffffff; // ~7 sec
DBG_8195A("Waiting for SDRAM to load...\n");
while(*((volatile uint32 *)0x1FFF0000) == 0x87654321 && tt--);
}
#endif // test
HAL_PERI_ON_WRITE32(REG_SOC_FUNC_EN, HAL_PERI_ON_READ32(REG_SOC_FUNC_EN) | BIT(21)); // Flag SDRAM Init
};

4
USDK/component/soc/realtek/8195a/fwlib/ram_lib/usb_otg/include/usb.h
View file

@ -1358,7 +1358,7 @@ struct usb_hcd {
unsigned long hcd_priv[0];
#elif defined (__GNUC__)
unsigned long hcd_priv[0];
__attribute__ ((aligned(sizeof(s64))));
//? __attribute__ ((aligned(sizeof(s64))));
#endif
};
@ -2067,7 +2067,7 @@ struct usb_device_id {
kernel_ulong_t driver_info;
#elif defined (__GNUC__)
kernel_ulong_t driver_info;
__attribute__((aligned(sizeof(kernel_ulong_t))));
//? __attribute__((aligned(sizeof(kernel_ulong_t))));
#endif
};

30
USDK/component/soc/realtek/8195a/fwlib/rtl8195a/src/rtl8195a_sdio_host_open.c
View file

@ -73,7 +73,7 @@ HAL_Status SdioHostSdClkCtrl(void *Data, int En, u8 Divisor) { // SD_CLK_DIVISOR
static HAL_Status CheckSramAddress(void* address)
{
// SRAM: 0x10000000... 0x1006ffff
if (address >= 0x10070000 || address < 0x10000000 || ((uint32_t)address & 3) !=0)
if ((uint32_t)address >= 0x10070000 || (uint32_t)address < 0x10000000 || ((uint32_t)address & 3) !=0)
return HAL_ERR_PARA;
return HAL_OK;
}
@ -351,7 +351,7 @@ void SdioHostIsrHandle(void *Data) {
*/
}
}
ir_end:
// ir_end:
HAL_SDIOH_REG16(REG_SDIO_HOST_NORMAL_INT_SIG_EN)
= NOR_INT_SIG_EN_CMD_COMP
| NOR_INT_SIG_EN_XFER_COMP
@ -485,7 +485,7 @@ HAL_Status SdioHostSwitchFunction(void *Data, int Mode, int Fn2Sel, int Fn1Sel,
if (result)
return result;
HAL_SDIOH_REG32(REG_SDIO_HOST_ADMA_SYS_ADDR) = pAdmaDescTbl;
HAL_SDIOH_REG32(REG_SDIO_HOST_ADMA_SYS_ADDR) = (uint32_t)pAdmaDescTbl;
HAL_SDIOH_REG16(REG_SDIO_HOST_BLK_SIZE) = 64;
HAL_SDIOH_REG16(REG_SDIO_HOST_BLK_CNT) =1;
HAL_SDIOH_REG16(REG_SDIO_HOST_XFER_MODE) =
@ -610,7 +610,7 @@ HAL_Status HalSdioHostChangeSdClockRtl8195a(IN VOID *Data, IN uint8_t Frequency)
// а malloc не гарантирует размещение в SRAM в любых ситуациях
StatusData = (uint8_t*)pAdmaDescTbl + sizeof(ADMA2_DESC_FMT);
HAL_SDIOH_REG32(REG_SDIO_HOST_ADMA_SYS_ADDR) = pAdmaDescTbl;
HAL_SDIOH_REG32(REG_SDIO_HOST_ADMA_SYS_ADDR) = (uint32_t)pAdmaDescTbl;
HAL_SDIOH_REG16(REG_SDIO_HOST_BLK_SIZE) = 8; // v40058004 = 8;
HAL_SDIOH_REG16(REG_SDIO_HOST_BLK_CNT) =1;
HAL_SDIOH_REG16(REG_SDIO_HOST_XFER_MODE) =
@ -625,7 +625,7 @@ HAL_Status HalSdioHostChangeSdClockRtl8195a(IN VOID *Data, IN uint8_t Frequency)
pAdmaDescTbl->Attrib1.Int = 0;
pAdmaDescTbl->Attrib1.Act1= 0;
pAdmaDescTbl->Attrib1.Act2=1;
pAdmaDescTbl->Addr1 = StatusData;
pAdmaDescTbl->Addr1 = (uint32_t)StatusData;
pAdmaDescTbl->Len1 = 8;
result = SdioHostChkCmdInhibitCMD();
@ -797,8 +797,8 @@ HAL_Status HalSdioHostReadBlocksDmaRtl8195a(IN VOID *Data, IN u64 ReadAddr,
admadesc_ptr = psha->AdmaDescTbl;
// проверка валидности адреса и дескриптора ADMA2
result = CheckSramAddress(admadesc_ptr) |
CheckSramAddress(admadesc_ptr->Addr1);
result = CheckSramAddress((void*)admadesc_ptr) |
CheckSramAddress((void*)admadesc_ptr->Addr1);
if (result)
return result;
@ -807,7 +807,7 @@ HAL_Status HalSdioHostReadBlocksDmaRtl8195a(IN VOID *Data, IN u64 ReadAddr,
sd_read_addr =ReadAddr >> 9; // sdhc: адрес в блоках
HAL_SDIOH_REG32(REG_SDIO_HOST_ADMA_SYS_ADDR) =admadesc_ptr;
HAL_SDIOH_REG32(REG_SDIO_HOST_ADMA_SYS_ADDR) = (uint32_t)admadesc_ptr;
HAL_SDIOH_REG16(REG_SDIO_HOST_BLK_SIZE) = DATA_BLK_LEN;
result = SdioHostChkCmdInhibitCMD();
if (result) {
@ -1058,7 +1058,7 @@ HAL_Status HalSdioHostWriteBlocksDmaRtl8195a(IN VOID *Data, IN uint64 WriteAddr,
// проверка валидности адреса и дескриптора ADMA2
admadesc_ptr = psha->AdmaDescTbl;
// проверим адрес дескриптора ADMA2
if (CheckSramAddress(admadesc_ptr) || CheckSramAddress(admadesc_ptr->Addr1))
if (CheckSramAddress((void *)admadesc_ptr) || CheckSramAddress((void *)admadesc_ptr->Addr1))
return HAL_ERR_PARA;
// адрес в байтах или блоках ?
if (psha->IsSdhc)
@ -1220,7 +1220,7 @@ HAL_Status HalSdioHostGetCardStatusRtl8195a(IN VOID *Data) {
if (result)
return result;
// Send Status command
Cmd.Arg = Cmd.Arg = psha->RCA << 16;
Cmd.Arg = psha->RCA << 16;
Cmd.CmdFmt.CmdIdx = CMD_SEND_STATUS;
Cmd.CmdFmt.RespType = RSP_LEN_48;
Cmd.CmdFmt.CmdCrcChkEn = 1;
@ -1280,7 +1280,7 @@ HAL_Status HalSdioHostGetSdStatusRtl8195a(IN VOID *Data) {
pAdmaDescTbl->Attrib1.End=1;
pAdmaDescTbl->Attrib1.Act1=0;
pAdmaDescTbl->Attrib1.Act2=1;
pAdmaDescTbl->Addr1 = &psha->SdStatus[0];
pAdmaDescTbl->Addr1 = (uint32_t) &psha->SdStatus[0];
pAdmaDescTbl->Attrib1.Valid =1;
//memset(&psha->SdStatus[0], 0x55, SD_STATUS_LEN);
@ -1325,7 +1325,7 @@ HAL_Status HalSdioHostGetSdStatusRtl8195a(IN VOID *Data) {
if (result)
return result;
HAL_SDIOH_REG32(REG_SDIO_HOST_ADMA_SYS_ADDR) = pAdmaDescTbl;
HAL_SDIOH_REG32(REG_SDIO_HOST_ADMA_SYS_ADDR) = (uint32_t)pAdmaDescTbl;
HAL_SDIOH_REG16(REG_SDIO_HOST_BLK_SIZE) = 64;
HAL_SDIOH_REG16(REG_SDIO_HOST_XFER_MODE) =
@ -1388,7 +1388,7 @@ HAL_Status HalSdioHostIrqInitRtl8195a(IN VOID *Data) // PIRQ_HANDLE Data
HAL_Status result;
PIRQ_HANDLE pih = (PIRQ_HANDLE)Data;
if (pih) {
pih->Data = Data;
pih->Data = (uint32_t)Data;
pih->IrqNum = SDIO_HOST_IRQ;
pih->IrqFun = SdioHostIsrHandle;
pih->Priority = 6;
@ -1516,7 +1516,7 @@ HAL_Status HalSdioHostDeInitRtl8195a(IN VOID *Data) {
//----- HalSdioHostStopTransferRtl8195a
HAL_Status HalSdioHostStopTransferRtl8195a(IN VOID *Data) {
HAL_Status result;
// HAL_Status result;
SDIO_HOST_CMD Cmd;
PHAL_SDIO_HOST_ADAPTER psha = (PHAL_SDIO_HOST_ADAPTER)Data;
uint32_t x;
@ -1757,7 +1757,7 @@ IN uint64_t EndAddr) {
HAL_Status HalSdioHostGetWriteProtectRtl8195a(IN VOID *Data) {
PHAL_SDIO_HOST_ADAPTER psha = (PHAL_SDIO_HOST_ADAPTER)Data;
HAL_Status result;
SDIO_HOST_CMD Cmd; // [sp+0h] [bp-18h]@1
// SDIO_HOST_CMD Cmd; // [sp+0h] [bp-18h]@1
if (!psha)
return HAL_ERR_PARA;

2
USDK/component/soc/realtek/8195a/fwlib/src/hal_sdio_host.c
View file

@ -98,7 +98,7 @@ HAL_Status HalSdioHostDisable(IN VOID *Data) {
//----- HalSdioHostOpInit(PHAL_SDIO_HOST_ADAPTER)
void HalSdioHostOpInit(void *Data) {
PHAL_SDIO_HOST_OP phsha = (PHAL_SDIO_HOST_ADAPTER)Data;
PHAL_SDIO_HOST_OP phsha = (PHAL_SDIO_HOST_OP)Data;
phsha->HalSdioHostInitHost = &HalSdioHostInitHostRtl8195a;
phsha->HalSdioHostInitCard = &HalSdioHostInitCardRtl8195a;
phsha->HalSdioHostDeInit = &HalSdioHostDeInitRtl8195a;