mirror of
https://github.com/pvvx/RTL00_WEB.git
synced 2025-07-31 20:31:05 +00:00
update
This commit is contained in:
Victor
parent
8529849a5a
commit
d1e4ee31f1
70 changed files with 523 additions and 2274 deletions
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@ -20,42 +20,29 @@ clean:
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clean_all:
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@$(MAKE) -f $(SDK_PATH)sdkbuild.mk clean_all
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.PHONY: flashburn runram reset test readfullflash flashwebfs flashboot
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flashboot:
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@$(MAKE) -f $(SDK_PATH)flasher.mk flashboot
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flashburn:
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#JLinkGDB-WrFlash.bat
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@$(MAKE) -f $(SDK_PATH)flasher.mk flashburn
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.PHONY: flash_images runram reset test readfullflash flash_webfs flash_boot
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flash_boot:
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@$(MAKE) -f $(SDK_PATH)flasher.mk flash_boot
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flash_images:
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@$(MAKE) -f $(SDK_PATH)flasher.mk flash_images
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flash_OTA:
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@$(MAKE) -f $(SDK_PATH)flasher.mk flash_OTA
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webfs:
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@$(MAKE) -f webfs.mk
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flashwebfs:
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@$(MAKE) -f webfs.mk
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@$(MAKE) -f $(SDK_PATH)flasher.mk flashwebfs
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#JLinkGDB-WrWebFs.bat
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runram:
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#JLink-RunRAM.bat
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@$(MAKE) --f $(SDK_PATH)flasher.mk runram
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runsdram:
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#JLink-RunRAM.bat
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@$(MAKE) --f $(SDK_PATH)flasher.mk runsdram
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reset:
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#JLink-Reset.bat
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@$(MAKE) -f $(SDK_PATH)flasher.mk reset
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test:
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JLink-RTL00ConsoleROM.bat
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#@make -f flasher.mk test
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readfullflash:
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#JLink-RdFullFlash.bat
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@$(MAKE) -f $(SDK_PATH)flasher.mk readfullflash
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@ -518,7 +518,7 @@ int wifi_connect(
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struct {
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u8 bssid[ETH_ALEN + 2];
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void * p;
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} bs = { 0 };
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} bs;
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memcpy(bs.bssid, pWifi->bssid.octet, ETH_ALEN);
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for(int i = 0; i < ETH_ALEN; i++) {
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flg += bs.bssid[i];
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@ -529,6 +529,9 @@ int wifi_connect(
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}
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else {
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use_bssid = 1;
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bs.bssid[ETH_ALEN] = 0;
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bs.bssid[ETH_ALEN+1] = 0;
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bs.p = 0;
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wext_set_bssid(WLAN0_NAME, bs.bssid);
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}
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}
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@ -75,7 +75,8 @@ int32_t spi_master_write_stream(spi_t *obj, char *tx_buffer, uint32_t length);
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int32_t spi_master_write_read_stream(spi_t *obj, char *tx_buffer,
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char *rx_buffer, uint32_t length);
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int32_t spi_slave_read_stream_timeout(spi_t *obj, char *rx_buffer, uint32_t length, uint32_t timeout_ms);
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void spi_flush_rx_fifo (spi_t *obj);
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void spi_set_tmod(spi_t *obj, SSI_CTRLR0_TMOD tmod); // 0 Read & Write, 1 Write only, 2 Read Only
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#ifdef CONFIG_GDMA_EN
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int32_t spi_slave_read_stream_dma(spi_t *obj, char *rx_buffer, uint32_t length);
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int32_t spi_slave_write_stream_dma(spi_t *obj, char *tx_buffer, uint32_t length);
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@ -28,7 +28,7 @@ s8 spdio_tx_done_cb(void *padapter, u8 *data, u16 offset, u16 pktsize, u8 type){
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s8 spdio_tx(struct spdio_t *obj, struct spdio_buf_t *pbuf){
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extern s8 HalSdioRxCallback(PHAL_SDIO_ADAPTER pSDIODev, VOID *pData, u16 Offset, u16 PktSize, u8 CmdType);
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//extern s8 HalSdioRxCallback(PHAL_SDIO_ADAPTER pSDIODev, VOID *pData, u16 Offset, u16 PktSize, u8 CmdType);
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return HalSdioRxCallback((u8 *)pbuf, 0, pbuf->buf_size, pbuf->type); // ?????????
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}
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@ -554,6 +554,7 @@ int32_t spi_master_write_stream(spi_t *obj, char *tx_buffer, uint32_t length)
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pHalSsiOp = &obj->spi_op;
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obj->state |= SPI_STATE_TX_BUSY;
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/* as Master mode, sending data will receive data at sametime, so we need to
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drop those received dummy data */
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if ((ret=pHalSsiOp->HalSsiWriteInterrupt(pHalSsiAdaptor, (u8 *) tx_buffer, length)) != HAL_OK) {
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@ -562,6 +563,14 @@ int32_t spi_master_write_stream(spi_t *obj, char *tx_buffer, uint32_t length)
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return ret;
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}
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VOID HalSsiTModRtl8195a(VOID *Adaptor, SSI_CTRLR0_TMOD tmod);
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// SSI_CTRLR0_TMOD tmod
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void spi_set_tmod(spi_t *obj, SSI_CTRLR0_TMOD tmod)
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{
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PHAL_SSI_ADAPTOR pHalSsiAdaptor = &obj->spi_adp;
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HalSsiTModRtl8195a(pHalSsiAdaptor, tmod);
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}
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// Master mode write a sequence of data by interrupt mode
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// The length unit is byte, for both 16-bits and 8-bits mode
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int32_t spi_master_write_read_stream(spi_t *obj, char *tx_buffer,
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@ -165,9 +165,9 @@ time_t sntp_gen_system_time(int timezone)
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sntp_get_lasttime(&update_sec, &update_usec, &update_tick);
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unsigned int current_tick = xTaskGetTickCount();
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if(update_tick) {
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unsigned int current_tick = xTaskGetTickCount();
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long tick_diff_sec, tick_diff_ms;
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tick_diff_sec = (current_tick - update_tick) / configTICK_RATE_HZ;
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@ -176,10 +176,9 @@ time_t sntp_gen_system_time(int timezone)
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update_usec += (tick_diff_ms * 1000);
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current_sec = update_sec + update_usec / 1000000 + timezone * 3600;
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}
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else {
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// else {
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// current_sec = current_tick / configTICK_RATE_HZ;
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current_sec = update_usec;
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}
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// }
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return current_sec;
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/*
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current_tm = *(localtime(¤t_sec));
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@ -13,27 +13,27 @@
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/*
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* in hal_platform.h
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#define BITBAND_REG_BASE 0x40001000
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#define GPIO_REG_BASE 0x40001000
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*/
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/*
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* in rtl8195a_gpio.h
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*
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#define BITBAND_PORTA_DR 0x00 // data register
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#define BITBAND_PORTA_DDR 0x04 // data direction
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#define BITBAND_PORTA_CTRL 0x08 // data source control, we should keep it as default: data source from software
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#define REG_PORTA_DR 0x00 // data register
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#define REG_PORTA_DDR 0x04 // data direction
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#define REG_PORTA_CTRL 0x08 // data source control, we should keep it as default: data source from software
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#define BITBAND_PORTB_DR 0x0c // data register
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#define BITBAND_PORTB_DDR 0x10 // data direction
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#define BITBAND_PORTB_CTRL 0x14 // data source control, we should keep it as default: data source from software
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#define REG_PORTB_DR 0x0c // data register
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#define REG_PORTB_DDR 0x10 // data direction
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#define REG_PORTB_CTRL 0x14 // data source control, we should keep it as default: data source from software
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#define BITBAND_PORTC_DR 0x18 // data register
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#define BITBAND_PORTC_DDR 0x1c // data direction
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#define BITBAND_PORTC_CTRL 0x20 // data source control, we should keep it as default: data source from software
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#define REG_PORTC_DR 0x18 // data register
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#define REG_PORTC_DDR 0x1c // data direction
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#define REG_PORTC_CTRL 0x20 // data source control, we should keep it as default: data source from software
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#define BITBAND_EXT_PORTA 0x50 // GPIO IN read or OUT read back
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#define BITBAND_EXT_PORTB 0x54 // GPIO IN read or OUT read back
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#define BITBAND_EXT_PORTC 0x58 // GPIO IN read or OUT read back
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#define REG_EXT_PORTA 0x50 // GPIO IN read or OUT read back
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#define REG_EXT_PORTB 0x54 // GPIO IN read or OUT read back
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#define REG_EXT_PORTC 0x58 // GPIO IN read or OUT read back
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*/
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#define BITBAND_PERI_REF 0x40000000
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@ -147,7 +147,8 @@
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volatile uint8_t * BitBandAddr(void *addr, uint8_t bit);
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volatile uint8_t * BitBandPeriAddr(void *addr, uint8_t bit);
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volatile uint8_t * GetOutPinBitBandAddr(PinName pin);
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#define GetDirPinBitBandAddr(pin) (GetOutPinBitBandAddr(pin) + 4*32)
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volatile uint8_t * GetInPinBitBandAddr(PinName pin);
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volatile uint8_t * HardSetPin(PinName pin, HAL_GPIO_PIN_MODE pmode, uint8_t val);
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volatile uint8_t * HardSetPin(PinName pin, HAL_GPIO_PIN_MODE pmode, uint8_t val); /* return pointer bit out register */
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#endif // _BITBAND_IO_H_
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@ -794,6 +794,15 @@ VOID HalSsiTxFIFOThresholdRtl8195a(VOID *Adaptor, u32 txftl)
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HAL_SSI_WRITE32(Index, REG_DW_SSI_TXFTLR, TxftlrValue);
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}
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VOID HalSsiTModRtl8195a(VOID *Adaptor, SSI_CTRLR0_TMOD tmod)
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{
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PHAL_SSI_ADAPTOR pHalSsiAdaptor = (PHAL_SSI_ADAPTOR) Adaptor;
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u8 Index = pHalSsiAdaptor->Index;
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/* REG_DW_SSI_CTRLR0 */
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u32 Ctrlr0Value = HAL_SSI_READ32(Index, REG_DW_SSI_CTRLR0) & BIT_INVC_CTRLR0_TMOD;
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Ctrlr0Value |= BIT_CTRLR0_TMOD(pHalSsiAdaptor->TransferMode);
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HAL_SSI_WRITE32(Index, REG_DW_SSI_CTRLR0, Ctrlr0Value);
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}
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HAL_Status
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HalSsiIntWriteRtl8195a(
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@ -45,14 +45,15 @@ volatile uint8_t * HardSetPin(PinName pin, HAL_GPIO_PIN_MODE pmode, uint8_t val)
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extern HAL_GPIO_ADAPTER gBoot_Gpio_Adapter;
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_pHAL_Gpio_Adapter = &gBoot_Gpio_Adapter;
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}
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if(_pHAL_Gpio_Adapter->Gpio_Func_En == 0) GPIO_FuncOn_8195a();
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wait_us(100);
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// delayMicroseconds(100);
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if(_pHAL_Gpio_Adapter->Gpio_Func_En == 0) {
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GPIO_FuncOn_8195a();
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HalDelayUs(100); // delayMicroseconds(100); wait_us(100);
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}
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// paddr = 0x42000000 + (0x40001000 + 0x0c * (ippin >> 5) - 0x40000000) * 32 + ((ippin & 0x1f) * 4);
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#if CONFIG_DEBUG_LOG > 3
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GpioFunctionChk(ippin, ENABLE);
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#endif
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GPIO_PullCtrl_8195a(ippin, HAL_GPIO_HIGHZ); // Make the pin pull control default as High-Z
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GPIO_PullCtrl_8195a(pin, HAL_GPIO_HIGHZ); // Make the pin pull control default as High-Z
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paddr = BitBandPeriAddr((void *)(GPIO_REG_BASE + GPIO_PORTB_DR * (ippin >> 5)), ippin & 0x1f);
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*paddr = val; // data register
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HAL_GPIO_PIN gpio;
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@ -61,7 +62,7 @@ volatile uint8_t * HardSetPin(PinName pin, HAL_GPIO_PIN_MODE pmode, uint8_t val)
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HAL_GPIO_Init_8195a(&gpio);
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*paddr = val; // data register
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// paddr[(GPIO_PORTB_DDR - GPIO_PORTB_DR) * 32] = pmode == DOUT_PUSH_PULL; // data direction
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// GPIO_PullCtrl_8195a(ippin, pmode); // set GPIO_PULL_CTRLx
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// GPIO_PullCtrl_8195a(pin, pmode); // set GPIO_PULL_CTRLx
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// paddr[(GPIO_PORTB_CTRL - GPIO_PORTB_DR) * 32] = 0; // data source control, we should keep it as default: data source from software
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}
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return paddr;
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@ -2,9 +2,10 @@
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* ram_libgloss_retarget.o
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* pvvx 2016
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*/
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#ifdef SWO_DEBUG_OUT_ENA
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#include "device.h"
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#endif
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#include "rtl_bios_data.h"
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//-------------------------------------------------------------------------
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// Function declarations
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@ -86,6 +87,15 @@ char *ram_libgloss_sbrk(int incr) {
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return prev_heap_end;
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}
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#ifdef SWO_DEBUG_OUT_ENA
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//----- ram_libgloss_write()
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int ram_libgloss_write(int file, const char *ptr, int len) {
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int i;
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for (i = 0; i < len; ++i)
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ITM_SendChar(ptr[i]);
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return len;
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}
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#else
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//----- ram_libgloss_write()
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int ram_libgloss_write(int file, const char *ptr, int len) {
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int i;
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@ -93,6 +103,7 @@ int ram_libgloss_write(int file, const char *ptr, int len) {
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HalSerialPutcRtl8195a(ptr[i]);
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return len;
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}
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#endif
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//----- ram_libgloss_open()
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int ram_libgloss_open(char *file, int flags, int mode) {
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@ -115,6 +126,9 @@ int ram_libgloss_open(char *file, int flags, int mode) {
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//----- init_rom_libgloss_ram_map()
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void init_rom_libgloss_ram_map(void) {
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#ifdef SWO_DEBUG_OUT_ENA
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//#error @TODO: Not init SWO!
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#endif
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rom_libgloss_ram_map.libgloss_close = ram_libgloss_close;
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rom_libgloss_ram_map.libgloss_fstat = ram_libgloss_fstat;
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rom_libgloss_ram_map.libgloss_isatty = ram_libgloss_isatty;
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221
USDK/flasher.mk
221
USDK/flasher.mk
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@ -4,81 +4,33 @@ include userset.mk
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include $(SDK_PATH)paths.mk
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include project.mk
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#---------------------------
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||||
#FLASHER = stlink-v2-1
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#FLASHER = stlink-v2
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FLASHER ?= Jlink
|
||||
JLINK_PATH ?= D:/MCU/SEGGER/JLink_V612i/
|
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#---------------------------
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# Default
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#---------------------------
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# TARGET dirs
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TARGET ?= build
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OBJ_DIR ?= build/obj
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BIN_DIR ?= build/bin
|
||||
ELFFILE ?= $(OBJ_DIR)/$(TARGET).axf
|
||||
FLASHER_TYPE ?= Jlink
|
||||
FLASHER_PATH ?= $(SDK_PATH)flasher/
|
||||
FLASHER_SPEED ?= 1000 # Start speed 1000 kHz
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||||
#---------------------------
|
||||
# Compilation tools
|
||||
CROSS_COMPILE ?= $(GCC_PATH)arm-none-eabi-
|
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AR ?= $(CROSS_COMPILE)ar
|
||||
CC ?= $(CROSS_COMPILE)gcc
|
||||
AS ?= $(CROSS_COMPILE)as
|
||||
NM ?= $(CROSS_COMPILE)nm
|
||||
LD ?= $(CROSS_COMPILE)gcc
|
||||
GDB ?= $(CROSS_COMPILE)gdb
|
||||
SIZE ?= $(CROSS_COMPILE)size
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||||
OBJCOPY ?= $(CROSS_COMPILE)objcopy
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||||
OBJDUMP ?= $(CROSS_COMPILE)objdump
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||||
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||||
# Make bunary tools
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||||
TOOLS_PATH ?= component/soc/realtek/8195a/misc/iar_utility/common/tools/
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||||
ifneq ($(shell uname), Linux)
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||||
EXE = .exe
|
||||
endif
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||||
PICK = $(TOOLS_PATH)pick$(EXE)
|
||||
PADDING = $(TOOLS_PATH)padding$(EXE)
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||||
CHCKSUM = $(TOOLS_PATH)checksum$(EXE)
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||||
IMAGETOOL = $(TOOLS_PATH)rtlaimage$(EXE)
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||||
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||||
IMAGETOOL ?= $(PYTHON) $(SDK_PATH)rtlaimage.py
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||||
#---------------------------
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||||
# openocd tools
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OPENOCD = $(OPENOCD_PATH)openocd.exe
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||||
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||||
JLINK_GDB ?= JLinkGDBServer.exe
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||||
OPENOCD ?= d:/MCU/OpenOCD/bin/openocd.exe
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||||
#---------------------------
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||||
# jlink tools
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||||
JLINK_PATH ?= D:/MCU/SEGGER/JLink_V612i/
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||||
JLINK_EXE ?= JLink.exe
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||||
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||||
ifeq ($(FLASHER), Jlink)
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||||
# Jlink FLASHER_SPEED ..4000 kHz
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||||
FLASHER_SPEED ?= 3500
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else
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||||
ifeq ($(FLASHER),stlink-v2)
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||||
# stlink-v2 FLASHER_SPEED ..1800 kHz
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FLASHER_SPEED ?= 1800
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else
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# over FLASHER_SPEED ..1000 kHz ?
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FLASHER_SPEED ?= 1000
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||||
endif
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endif
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||||
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||||
# COMPILED_BOOT if defined -> extract image1, boot head in elf
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||||
COMPILED_BOOT=1
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# COMPILED_BOOT_BIN if !defined -> use source startup boot
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||||
#COMPILED_BOOT_BIN=1
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||||
# PADDINGSIZE defined -> image2 OTA
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PADDINGSIZE =44k
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||||
JLINK_GDB ?= JLinkGDBServer.exe
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||||
|
||||
NMAPFILE = $(OBJ_DIR)/$(TARGET).nmap
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||||
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||||
#FLASHER_PATH ?= flasher/
|
||||
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||||
#RAM_IMAGE?= $(BIN_DIR)/ram.bin
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||||
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||||
RAM1_IMAGE ?= $(BIN_DIR)/ram_1.bin
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||||
RAM1P_IMAGE ?= $(BIN_DIR)/ram_1.p.bin
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||||
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||||
RAM2_IMAGE = $(BIN_DIR)/ram_2.bin
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||||
RAM2P_IMAGE = $(BIN_DIR)/ram_2.p.bin
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||||
RAM2_IMAGE ?= $(BIN_DIR)/ram_2.bin
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||||
RAM2P_IMAGE ?= $(BIN_DIR)/ram_2.p.bin
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||||
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||||
RAM3_IMAGE = $(BIN_DIR)/sdram.bin
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||||
RAM3P_IMAGE = $(BIN_DIR)/sdram.p.bin
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||||
RAM3_IMAGE ?= $(BIN_DIR)/sdram.bin
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||||
RAM3P_IMAGE ?= $(BIN_DIR)/sdram.p.bin
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||||
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||||
FLASH_IMAGE = $(BIN_DIR)/ram_all.bin
|
||||
OTA_IMAGE = $(BIN_DIR)/ota.bin
|
||||
|
|
@ -89,8 +41,8 @@ mp: FLASH_IMAGE = $(BIN_DIR)/ram_all_mp.bin
|
|||
mp: OTA_IMAGE = $(BIN_DIR)/ota_mp.bin
|
||||
|
||||
|
||||
.PHONY: genbin flashburn reset test readfullflash flashboot flashwebfs flash_OTA runram runsdram
|
||||
.NOTPARALLEL: all mp genbin flashburn reset test readfullflash _endgenbin flashwebfs flash_OTA
|
||||
.PHONY: genbin flashburn reset test readfullflash flash_boot flash_webfs flash_OTA flash_images runram runsdram
|
||||
.NOTPARALLEL: all mp genbin flashburn reset test readfullflash _endgenbin flash_webfs flash_OTA flash_images
|
||||
|
||||
all: $(ELFFILE) $(FLASH_IMAGE) _endgenbin
|
||||
mp: $(ELFFILE) $(FLASH_IMAGE) _endgenbin
|
||||
|
|
@ -110,9 +62,6 @@ $(NMAPFILE): $(ELFFILE)
|
|||
$(FLASH_IMAGE):$(ELFFILE)
|
||||
@echo "==========================================================="
|
||||
$(IMAGETOOL) -a -r -o $(BIN_DIR)/ $(ELFFILE)
|
||||
ifdef USE_SDRAM
|
||||
@cat $(RAM3P_IMAGE) >> $(RAM2P_IMAGE)
|
||||
endif
|
||||
|
||||
_endgenbin:
|
||||
@echo "-----------------------------------------------------------"
|
||||
|
|
@ -123,16 +72,58 @@ _endgenbin:
|
|||
ifeq ($(FLASHER_TYPE), Jlink)
|
||||
|
||||
reset:
|
||||
@$(JLINK_PATH)$(JLINK_EXE) -Device CORTEX-M3 -If SWD -Speed 1000 $(FLASHER_PATH)RTL_Reset.JLinkScript
|
||||
@$(JLINK_PATH)$(JLINK_EXE) -Device CORTEX-M3 -If SWD -Speed $(FLASHER_SPEED) $(FLASHER_PATH)RTL_Reset.JLinkScript
|
||||
|
||||
runram:
|
||||
$(JLINK_PATH)$(JLINK_EXE) -Device CORTEX-M3 -If SWD -Speed 1000 $(FLASHER_PATH)RTL_RunRAM.JLinkScript
|
||||
@$(JLINK_PATH)$(JLINK_EXE) -Device CORTEX-M3 -If SWD -Speed $(FLASHER_SPEED) $(FLASHER_PATH)RTL_RunRAM.JLinkScript
|
||||
|
||||
runsdram:
|
||||
$(JLINK_PATH)$(JLINK_EXE) -Device CORTEX-M3 -If SWD -Speed 1000 $(FLASHER_PATH)RTL_RunRAM_SDR.JLinkScript
|
||||
@$(JLINK_PATH)$(JLINK_EXE) -Device CORTEX-M3 -If SWD -Speed $(FLASHER_SPEED) $(FLASHER_PATH)RTL_RunRAM_SDR.JLinkScript
|
||||
|
||||
readfullflash:
|
||||
@$(JLINK_PATH)$(JLINK_EXE) -Device CORTEX-M3 -If SWD -Speed 1000 $(FLASHER_PATH)RTL_FFlash.JLinkScript
|
||||
@$(JLINK_PATH)$(JLINK_EXE) -Device CORTEX-M3 -If SWD -Speed $(FLASHER_SPEED) $(FLASHER_PATH)RTL_FFlash.JLinkScript
|
||||
|
||||
|
||||
flash_boot:
|
||||
@echo define call1>$(FLASHER_PATH)file_info.jlink
|
||||
@echo set '$$'ImageSize = $(shell printf '0x%X\n' $$(stat --printf="%s" $(RAM1P_IMAGE))>>$(FLASHER_PATH)file_info.jlink
|
||||
@echo set '$$'ImageAddr = 0x000000>>$(FLASHER_PATH)file_info.jlink
|
||||
@echo end>>$(FLASHER_PATH)file_info.jlink
|
||||
@echo define call2>>$(FLASHER_PATH)file_info.jlink
|
||||
@echo FlasherWrite $(RAM2P_IMAGE) '$$'ImageAddr '$$'ImageSize>>$(FLASHER_PATH)file_info.jlink
|
||||
@echo end>>$(FLASHER_PATH)file_info.jlink
|
||||
@cmd /K start $(JLINK_PATH)$(JLINK_GDBSRV) -device Cortex-M3 -if SWD -ir -endian little -speed $(FLASHER_SPEED)
|
||||
@$(GDB) -x $(FLASHER_PATH)gdb_wrfile.jlink
|
||||
|
||||
flash_images:
|
||||
@cmd /K start $(JLINK_PATH)$(JLINK_GDBSRV) -device Cortex-M3 -if SWD -ir -endian little -speed $(FLASHER_SPEED)
|
||||
@$(GDB) -x $(FLASHER_PATH)gdb_images.jlink
|
||||
|
||||
flash_OTA:
|
||||
@cmd /K start $(JLINK_PATH)$(JLINK_GDBSRV) -device Cortex-M3 -if SWD -ir -endian little -speed $(FLASHER_SPEED)
|
||||
@$(GDB) -x $(FLASHER_PATH)gdb_ota.jlink
|
||||
|
||||
flash_webfs:
|
||||
@echo define call1>$(FLASHER_PATH)file_info.jlink
|
||||
@echo set '$$'ImageSize = $(shell printf '0x%X\n' $$(stat --printf="%s" $(BIN_DIR)/WEBFiles.bin))>>$(FLASHER_PATH)file_info.jlink
|
||||
@echo set '$$'ImageAddr = 0x0D0000>>$(FLASHER_PATH)file_info.jlink
|
||||
@echo end>>$(FLASHER_PATH)file_info.jlink
|
||||
@echo define call2>>$(FLASHER_PATH)file_info.jlink
|
||||
@echo FlasherWrite $(BIN_DIR)/WEBFiles.bin '$$'ImageAddr '$$'ImageSize>>$(FLASHER_PATH)file_info.jlink
|
||||
@echo end>>$(FLASHER_PATH)file_info.jlink
|
||||
@cmd /K start $(JLINK_PATH)$(JLINK_GDBSRV) -device Cortex-M3 -if SWD -ir -endian little -speed $(FLASHER_SPEED)
|
||||
@$(GDB) -x $(FLASHER_PATH)gdb_wrfile.jlink
|
||||
|
||||
flash_espfs:
|
||||
@echo define call1>$(FLASHER_PATH)file_info.jlink
|
||||
@echo set '$$'ImageSize = $(shell printf '0x%X\n' $$(stat --printf="%s" $(BIN_DIR)/webpages.espfs))>>$(FLASHER_PATH)file_info.jlink
|
||||
@echo set '$$'ImageAddr = 0x0D0000>>$(FLASHER_PATH)file_info.jlink
|
||||
@echo end>>$(FLASHER_PATH)file_info.jlink
|
||||
@echo define call2>>$(FLASHER_PATH)file_info.jlink
|
||||
@echo FlasherWrite $(BIN_DIR)/webpages.espfs '$$'ImageAddr '$$'ImageSize>>$(FLASHER_PATH)file_info.jlink
|
||||
@echo end>>$(FLASHER_PATH)file_info.jlink
|
||||
@cmd /K start $(JLINK_PATH)$(JLINK_GDBSRV) -device Cortex-M3 -if SWD -ir -endian little -speed $(FLASHER_SPEED)
|
||||
@$(GDB) -x $(FLASHER_PATH)gdb_wrfile.jlink
|
||||
|
||||
|
||||
flashburn:
|
||||
|
|
@ -145,119 +136,75 @@ flashburn:
|
|||
@echo define call3>>$(FLASHER_PATH)flash_file.jlink
|
||||
@echo FlasherWrite build/bin/ram_all.bin '$$'Image2Addr '$$'Image2Size>>$(FLASHER_PATH)flash_file.jlink
|
||||
@echo end>>$(FLASHER_PATH)flash_file.jlink
|
||||
@cmd /K start $(JLINK_PATH)$(JLINK_GDBSRV) -device Cortex-M3 -if SWD -ir -endian little -speed 1000
|
||||
@cmd /K start $(JLINK_PATH)$(JLINK_GDBSRV) -device Cortex-M3 -if SWD -ir -endian little -speed $(FLASHER_SPEED)
|
||||
@$(GDB) -x $(FLASHER_PATH)gdb_wrflash.jlink
|
||||
#@taskkill /F /IM $(JLINK_GDBSRV)
|
||||
|
||||
flashboot:
|
||||
@echo define call1>$(FLASHER_PATH)file_info.jlink
|
||||
@echo set '$$'ImageSize = $(shell printf '0x%X\n' $$(stat --printf="%s" $(BIN_DIR)/ram_1.p.bin))>>$(FLASHER_PATH)file_info.jlink
|
||||
@echo set '$$'ImageAddr = 0x000000>>$(FLASHER_PATH)file_info.jlink
|
||||
@echo end>>$(FLASHER_PATH)file_info.jlink
|
||||
@echo define call2>>$(FLASHER_PATH)file_info.jlink
|
||||
@echo FlasherWrite $(BIN_DIR)/ram_1.p.bin '$$'ImageAddr '$$'ImageSize>>$(FLASHER_PATH)file_info.jlink
|
||||
@echo end>>$(FLASHER_PATH)file_info.jlink
|
||||
@cmd /K start $(JLINK_PATH)$(JLINK_GDBSRV) -device Cortex-M3 -if SWD -ir -endian little -speed 1000
|
||||
@$(GDB) -x $(FLASHER_PATH)gdb_wrfile.jlink
|
||||
|
||||
flashwebfs:
|
||||
@echo define call1>$(FLASHER_PATH)file_info.jlink
|
||||
@echo set '$$'ImageSize = $(shell printf '0x%X\n' $$(stat --printf="%s" $(BIN_DIR)/WEBFiles.bin))>>$(FLASHER_PATH)file_info.jlink
|
||||
@echo set '$$'ImageAddr = 0x0D0000>>$(FLASHER_PATH)file_info.jlink
|
||||
@echo end>>$(FLASHER_PATH)file_info.jlink
|
||||
@echo define call2>>$(FLASHER_PATH)file_info.jlink
|
||||
@echo FlasherWrite $(BIN_DIR)/WEBFiles.bin '$$'ImageAddr '$$'ImageSize>>$(FLASHER_PATH)file_info.jlink
|
||||
@echo end>>$(FLASHER_PATH)file_info.jlink
|
||||
@cmd /K start $(JLINK_PATH)$(JLINK_GDBSRV) -device Cortex-M3 -if SWD -ir -endian little -speed 1000
|
||||
@$(GDB) -x $(FLASHER_PATH)gdb_wrfile.jlink
|
||||
#@taskkill /F /IM $(JLINK_GDBSRV)
|
||||
|
||||
flashespfs:
|
||||
@echo define call1>$(FLASHER_PATH)file_info.jlink
|
||||
@echo set '$$'ImageSize = $(shell printf '0x%X\n' $$(stat --printf="%s" $(BIN_DIR)/webpages.espfs))>>$(FLASHER_PATH)file_info.jlink
|
||||
@echo set '$$'ImageAddr = 0x0D0000>>$(FLASHER_PATH)file_info.jlink
|
||||
@echo end>>$(FLASHER_PATH)file_info.jlink
|
||||
@echo define call2>>$(FLASHER_PATH)file_info.jlink
|
||||
@echo FlasherWrite $(BIN_DIR)/webpages.espfs '$$'ImageAddr '$$'ImageSize>>$(FLASHER_PATH)file_info.jlink
|
||||
@echo end>>$(FLASHER_PATH)file_info.jlink
|
||||
@cmd /K start $(JLINK_PATH)$(JLINK_GDBSRV) -device Cortex-M3 -if SWD -ir -endian little -speed 1000
|
||||
@$(GDB) -x $(FLASHER_PATH)gdb_wrfile.jlink
|
||||
#@taskkill /F /IM $(JLINK_GDBSRV)
|
||||
|
||||
|
||||
flash_OTA:
|
||||
@cmd /K start $(JLINK_PATH)$(JLINK_GDBSRV) -device Cortex-M3 -if SWD -ir -endian little -speed 1000
|
||||
@$(GDB) -x $(FLASHER_PATH)gdb_ota.jlink
|
||||
#@taskkill /F /IM $(JLINK_GDBSRV)
|
||||
|
||||
else
|
||||
ifeq ($(FLASHER_TYPE),cmsis-dap)
|
||||
FLASHER:=cmsis-dap
|
||||
|
||||
flashboot:
|
||||
@$(OPENOCD) -f interface/$(FLASHER).cfg -c 'transport select swd' -c 'adapter_khz 1000' \
|
||||
flash_boot:
|
||||
@$(OPENOCD) -f interface/$(FLASHER_TYPE).cfg -c 'transport select swd' -c 'adapter_khz 1000' \
|
||||
-f $(FLASHER_PATH)rtl8710.ocd -c 'init' -c 'reset halt' -c 'adapter_khz $(FLASHER_SPEED)' \
|
||||
-c 'rtl8710_flash_auto_erase 1' -c 'rtl8710_flash_auto_verify 1' \
|
||||
-c 'rtl8710_flash_write $(RAM1P_IMAGE) 0' \
|
||||
-c 'rtl8710_reboot' -c 'reset run' -c shutdown
|
||||
|
||||
flashburn:
|
||||
@$(OPENOCD) -f interface/$(FLASHER).cfg -c 'transport select swd' -c 'adapter_khz 1000' \
|
||||
flash_images:
|
||||
@$(OPENOCD) -f interface/$(FLASHER_TYPE).cfg -c 'transport select swd' -c 'adapter_khz 1000' \
|
||||
-f $(FLASHER_PATH)rtl8710.ocd -c 'init' -c 'reset halt' -c 'adapter_khz $(FLASHER_SPEED)' \
|
||||
-c 'rtl8710_flash_auto_erase 1' -c 'rtl8710_flash_auto_verify 1' \
|
||||
-c 'rtl8710_flash_write $(RAM1P_IMAGE) 0' \
|
||||
-c 'rtl8710_flash_write $(RAM2P_IMAGE) 0xb000' \
|
||||
-c 'rtl8710_reboot' -c 'reset run' -c shutdown
|
||||
|
||||
flashimage2p:
|
||||
@$(OPENOCD) -f interface/$(FLASHER).cfg -c 'transport select swd' -c 'adapter_khz 1000' \
|
||||
-f $(FLASHER_PATH)rtl8710.ocd -c 'init' -c 'reset halt' -c 'adapter_khz $(FLASHER_SPEED)' \
|
||||
-c 'rtl8710_flash_auto_erase 1' -c 'rtl8710_flash_auto_verify 1' \
|
||||
-c 'rtl8710_flash_write $(RAM2P_IMAGE) 0xb000' \
|
||||
-c 'rtl8710_flash_write $(OTA_IMAGE) 0x0b000' \
|
||||
-c 'rtl8710_reboot' -c 'reset run' -c shutdown
|
||||
|
||||
flash_OTA:
|
||||
@$(OPENOCD) -f interface/$(FLASHER).cfg -c 'transport select swd' -c 'adapter_khz 1000' \
|
||||
@$(OPENOCD) -f interface/$(FLASHER_TYPE).cfg -c 'transport select swd' -c 'adapter_khz 1000' \
|
||||
-f $(FLASHER_PATH)rtl8710.ocd -c 'init' -c 'reset halt' -c 'adapter_khz $(FLASHER_SPEED)' \
|
||||
-c 'rtl8710_flash_auto_erase 1' -c 'rtl8710_flash_auto_verify 1' \
|
||||
-c 'rtl8710_flash_write $(RAM2P_IMAGE) 0x80000' \
|
||||
-c 'rtl8710_flash_write $(OTA_IMAGE) 0x80000' \
|
||||
-c 'rtl8710_reboot' -c 'reset run' -c shutdown
|
||||
|
||||
flashwebfs:
|
||||
@$(OPENOCD) -f interface/$(FLASHER).cfg -c 'transport select swd' -c 'adapter_khz 1000' \
|
||||
flash_webfs:
|
||||
@$(OPENOCD) -f interface/$(FLASHER_TYPE).cfg -c 'transport select swd' -c 'adapter_khz 1000' \
|
||||
-f $(FLASHER_PATH)rtl8710.ocd -c 'init' -c 'reset halt' -c 'adapter_khz $(FLASHER_SPEED)' \
|
||||
-c 'rtl8710_flash_auto_erase 1' -c 'rtl8710_flash_auto_verify 1' \
|
||||
-c 'rtl8710_flash_write $(BIN_DIR)/WEBFiles.bin 0xd0000' \
|
||||
-c 'rtl8710_reboot' -c 'reset run' -c shutdown
|
||||
|
||||
flashespfs:
|
||||
@$(OPENOCD) -f interface/$(FLASHER).cfg -c 'transport select swd' -c 'adapter_khz 1000' \
|
||||
@$(OPENOCD) -f interface/$(FLASHER_TYPE).cfg -c 'transport select swd' -c 'adapter_khz 1000' \
|
||||
-f $(FLASHER_PATH)rtl8710.ocd -c 'init' -c 'reset halt' -c 'adapter_khz $(FLASHER_SPEED)' \
|
||||
-c 'rtl8710_flash_auto_erase 1' -c 'rtl8710_flash_auto_verify 1' \
|
||||
-c 'rtl8710_flash_write $(BIN_DIR)/webpages.espfs 0xd0000' \
|
||||
-c 'rtl8710_reboot' -c 'reset run' -c shutdown
|
||||
|
||||
reset:
|
||||
@$(OPENOCD) -f interface/$(FLASHER).cfg -c 'transport select swd' -c 'adapter_khz 1000' \
|
||||
@$(OPENOCD) -f interface/$(FLASHER_TYPE).cfg -c 'transport select swd' -c 'adapter_khz 1000' \
|
||||
-f $(FLASHER_PATH)rtl8710.ocd -c 'init' -c 'reset halt' -c 'adapter_khz $(FLASHER_SPEED)' \
|
||||
-c 'mww 0x40000210 0x111157' -c 'rtl8710_reboot' -c shutdown
|
||||
|
||||
runram:
|
||||
$(OPENOCD) -f interface/$(FLASHER).cfg -c 'transport select swd' -c 'adapter_khz 1000' \
|
||||
@$(OPENOCD) -f interface/$(FLASHER_TYPE).cfg -c 'transport select swd' -c 'adapter_khz 1000' \
|
||||
-f $(FLASHER_PATH)rtl8710.ocd -c 'init' -c 'reset halt' -c 'adapter_khz $(FLASHER_SPEED)' \
|
||||
-c 'load_image $(RAM1_IMAGE) 0x10000bc8 bin' \
|
||||
-c 'load_image $(RAM2_IMAGE) 0x10006000 bin' \
|
||||
-c 'mww 0x40000210 0x20111157' -c 'rtl8710_reboot' -c shutdown
|
||||
|
||||
runsdram:
|
||||
@$(OPENOCD) -f interface/$(FLASHER).cfg -c 'transport select swd' -c 'adapter_khz 1000' \
|
||||
@$(OPENOCD) -f interface/$(FLASHER_TYPE).cfg -c 'transport select swd' -c 'adapter_khz 1000' \
|
||||
-f $(FLASHER_PATH)rtl8710.ocd -c 'init' -c 'reset halt' -c 'adapter_khz $(FLASHER_SPEED)' \
|
||||
-c 'load_image $(RAM1_IMAGE) 0x10000bc8 bin' \
|
||||
-c 'load_image $(RAM2_IMAGE) 0x10006000 bin' \
|
||||
-c 'boot_load_srdam $(RAM3_IMAGE) 0x30000000' \
|
||||
-c shutdown
|
||||
|
||||
endif
|
||||
flashburn:
|
||||
@$(OPENOCD) -f interface/$(FLASHER_TYPE).cfg -c 'transport select swd' -c 'adapter_khz 1000' \
|
||||
-f $(FLASHER_PATH)rtl8710.ocd -c 'init' -c 'reset halt' -c 'adapter_khz $(FLASHER_SPEED)' \
|
||||
-c 'rtl8710_flash_auto_erase 1' -c 'rtl8710_flash_auto_verify 1' \
|
||||
-c 'rtl8710_flash_write $(RAM1P_IMAGE) 0' \
|
||||
-c 'rtl8710_flash_write $(OTA_IMAGE) 0xb000' \
|
||||
-c 'rtl8710_reboot' -c 'reset run' -c shutdown
|
||||
|
||||
endif
|
||||
|
||||
clean:
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
@echo off
|
||||
call paths.bat
|
||||
cd flasher
|
||||
cd USDK\flasher
|
||||
openocd -f interface/cmsis-dap.cfg -c "adapter_khz 1000" -f rtl8710.ocd -f cortex.ocd -c "init" -c "reset halt" -c "load_ram_binary RTL00Console_ROM.bin 0x10000BA8" -c "exit"
|
||||
rem -c "shutdown"
|
||||
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
@echo off
|
||||
call paths.bat
|
||||
cd flasher
|
||||
openocd -f interface/cmsis-dap.cfg -c "adapter_khz 1000" -f rtl8710.ocd -f cortex.ocd -c "init" -c "reset halt" -c "rtl8710_flash_read_id" -c "adapter_khz 5000" -c "rtl8710_flash_read ../fullflash.bin 0 1048576" -c "shutdown"
|
||||
cd USDK\flasher
|
||||
openocd -f interface/cmsis-dap.cfg -c "adapter_khz 1000" -f rtl8710.ocd -f cortex.ocd -c "init" -c "reset halt" -c "rtl8710_flash_read_id" -c "adapter_khz 1000" -c "rtl8710_flash_read ../../fullflash.bin 0 2097152" -c "shutdown"
|
||||
echo flash read fullflash.bin
|
||||
pause
|
||||
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
@echo off
|
||||
call paths.bat
|
||||
@cd flasher
|
||||
@cd USDK\flasher
|
||||
openocd -f interface/cmsis-dap.cfg -c "adapter_khz 1000" -f rtl8710.ocd -f cortex.ocd -c "init" -c "reset halt" -c "restart_from_falsh" -c "shutdown"
|
||||
rem
|
||||
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
@echo off
|
||||
call paths.bat
|
||||
cd flasher
|
||||
openocd -f interface/cmsis-dap.cfg -c "adapter_khz 3500" -f rtl8710.ocd -f cortex.ocd -c "init" -c "reset halt" -c "rtl8710_flash_read_id" -c "rtl8710_flash_auto_erase 1" -c "rtl8710_flash_auto_verify 1" -c "rtl8710_flash_write fullflash.bin 0" -c "shutdown"
|
||||
cd USDK\flasher
|
||||
openocd -f interface/cmsis-dap.cfg -c "adapter_khz 3500" -f rtl8710.ocd -f cortex.ocd -c "init" -c "reset halt" -c "rtl8710_flash_read_id" -c "rtl8710_flash_auto_erase 1" -c "rtl8710_flash_auto_verify 1" -c "rtl8710_flash_write ../../fullflash.bin 0" -c "shutdown"
|
||||
pause
|
||||
|
||||
|
|
|
|||
|
|
@ -1,3 +1,3 @@
|
|||
@echo off
|
||||
call paths.bat
|
||||
start JLink.exe -Device CORTEX-M3 -If SWD -Speed 4000 flasher\RTL00ConsoleROM.JLinkScript
|
||||
start JLink.exe -Device CORTEX-M3 -If SWD -Speed 4000 USDK\flasher\RTL00ConsoleROM.JLinkScript
|
||||
|
|
|
|||
|
|
@ -1,3 +1,3 @@
|
|||
@echo off
|
||||
call paths.bat
|
||||
JLink.exe -Device CORTEX-M3 -If SWD -Speed 10000 flasher/RTL_FFlash.JLinkScript
|
||||
JLink.exe -Device CORTEX-M3 -If SWD -Speed 10000 USDK/flasher/RTL_FFlash.JLinkScript
|
||||
|
|
|
|||
|
|
@ -1,3 +1,3 @@
|
|||
@echo off
|
||||
call paths.bat
|
||||
JLink.exe -Device CORTEX-M3 -If SWD -Speed 1000 flasher\RTL_Reset.JLinkScript
|
||||
JLink.exe -Device CORTEX-M3 -If SWD -Speed 1000 USDK\flasher\RTL_Reset.JLinkScript
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
@echo off
|
||||
call paths.bat
|
||||
start JLinkGDBServer.exe -device Cortex-M3 -if SWD -ir -endian little -speed 1000
|
||||
arm-none-eabi-gdb.exe -x flasher/gdb_init.jlink
|
||||
arm-none-eabi-gdb.exe -x USDK/flasher/gdb_init.jlink
|
||||
taskkill /F /IM JLinkGDBServer.exe
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
@echo off
|
||||
call paths.bat
|
||||
taskkill /F /IM openocd.exe
|
||||
start openocd -f interface\Jlink.cfg -f flasher\ameba1.cfg
|
||||
start openocd -f USDK\interface\Jlink.cfg -f flasher\ameba1.cfg
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
PATH=D:\MCU\GNU_Tools_ARM_Embedded\5.4_2016q2\bin;D:\MCU\SEGGER\JLink_V612i;%PATH%
|
||||
PATH=D:\MCU\GNU_Tools_ARM_Embedded\7.2017-q4-major\bin;D:\MCU\SEGGER\JLink_V630g;D:\MCU\OpenOCD\bin;%PATH%
|
||||
|
|
@ -1,19 +1,22 @@
|
|||
#---------------------------
|
||||
# User defined (in userset.mk)
|
||||
# Set Paths & Tools
|
||||
#---------------------------
|
||||
SDK_PATH ?= ../SDKRTLA/USDK/
|
||||
#GCC_PATH = d:/MCU/GNU_Tools_ARM_Embedded/6.2017-q1-update/bin/# + or set in PATH
|
||||
OPENOCD_PATH = d:/MCU/OpenOCD/bin/
|
||||
TOOLS_PATH ?= $(SDK_PATH)component/soc/realtek/8195a/misc/iar_utility/common/tools/
|
||||
SDK_PATH ?= ../RTL00_WEB/USDK/
|
||||
#GCC_PATH ?= d:/MCU/GNU_Tools_ARM_Embedded/7.2017-q4-major/bin/# + or set in PATH
|
||||
TOOLS_PATH ?= $(SDK_PATH)
|
||||
|
||||
FLASHER_TYPE ?= Jlink
|
||||
PYTHON27_PATH ?= c:/Python27/
|
||||
#FLASHER_TYPE ?= OCD
|
||||
FLASHER_PATH ?= $(SDK_PATH)flasher/
|
||||
JLINK_PATH ?= D:/MCU/SEGGER/JLink_V612i/
|
||||
JLINK_GDBSRV ?= JLinkGDBServer.exe
|
||||
#---------------------------
|
||||
# Default
|
||||
#---------------------------
|
||||
|
||||
ifneq ($(shell uname), Linux)
|
||||
PYTHON ?= C:/Python27/python
|
||||
OPENOCD ?= d:/MCU/OpenOCD/bin/openocd.exe
|
||||
JLINK_PATH ?= D:/MCU/SEGGER/JLink_V630g/
|
||||
else
|
||||
PYTHON ?= python
|
||||
OPENOCD ?= /mnt/d/MCU/OpenOCD/bin/openocd.exe
|
||||
JLINK_PATH ?= /mnt/d/MCU/SEGGER/JLink_V630g/
|
||||
endif
|
||||
|
||||
# Compilation tools
|
||||
CROSS_COMPILE = $(GCC_PATH)arm-none-eabi-
|
||||
AR = $(CROSS_COMPILE)ar
|
||||
|
|
@ -32,15 +35,4 @@ OBJ_DIR ?= $(TARGET)/obj
|
|||
BIN_DIR ?= $(TARGET)/bin
|
||||
ELFFILE ?= $(OBJ_DIR)/$(TARGET).axf
|
||||
|
||||
# Make bunary tools
|
||||
ifneq ($(shell uname), Linux)
|
||||
EXE = .exe
|
||||
endif
|
||||
PICK = $(TOOLS_PATH)pick$(EXE)
|
||||
PADDING = $(TOOLS_PATH)padding$(EXE)
|
||||
CHCKSUM = $(TOOLS_PATH)checksum$(EXE)
|
||||
PYTHON = $(PYTHON27)python$(EXE)
|
||||
|
||||
# openocd tools
|
||||
OPENOCD = $(OPENOCD_PATH)openocd
|
||||
|
||||
|
|
|
|||
|
|
@ -18,11 +18,6 @@ SRC_C_LIST = $(patsubst sdk/%,$(SDK_PATH)%,$(ADD_SRC_C)) $(patsubst sdk/%,$(SDK_
|
|||
OBJ_LIST = $(addprefix $(OBJ_DIR)/,$(patsubst %.c,%.o,$(SRC_C_LIST)))
|
||||
DEPENDENCY_LIST = $(patsubst %.c,$(OBJ_DIR)/%.d,$(SRC_C_LIST))
|
||||
|
||||
TARGET ?= build
|
||||
OBJ_DIR ?= $(TARGET)/obj
|
||||
BIN_DIR ?= $(TARGET)/bin
|
||||
ELFFILE ?= $(OBJ_DIR)/$(TARGET).axf
|
||||
|
||||
all: prerequirement application
|
||||
mp: prerequirement application
|
||||
|
||||
|
|
|
|||
|
|
@ -52,7 +52,7 @@ all: LIBS +=_rtsp _usbh _usbd
|
|||
mp: LIBS +=_rtsp _usbh _usbd
|
||||
endif
|
||||
# m c nosys gcc
|
||||
PATHLIBS = sdk/component/soc/realtek/8195a/misc/bsp/lib/common/gcc
|
||||
PATHLIBS = sdk/component/soc/realtek/8195a/misc/bsp/lib/common/GCC
|
||||
|
||||
ifdef USE_SDRAM
|
||||
CFLAGS += -DUSE_SDRAM=1
|
||||
|
|
@ -412,6 +412,10 @@ SRC_C += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_libc.c
|
|||
SRC_C += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_libgloss_retarget.c
|
||||
SRC_C += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/rtl_eabi_cast_ram.c
|
||||
SRC_C += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/rtl_math_ram.c
|
||||
ifdef SWO_DEBUG_OUT_ENA
|
||||
INCLUDES += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd
|
||||
SRC_C += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/swo.c
|
||||
endif
|
||||
#if +- nostdlib..
|
||||
ifndef USE_GCC_LIB
|
||||
SRC_C += sdk/component/soc/realtek/8195a/misc/rtl_std_lib/lib_rtlstd/ram_pvvx_libc.c
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue