mirror of
https://github.com/pvvx/RTL00_WEB.git
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update -Wall
This commit is contained in:
pvvx
parent
af72faa906
commit
c98cbe6e00
86 changed files with 523 additions and 352 deletions
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@ -9,22 +9,30 @@
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#define DATA_IRAM_ATTR
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#define ICACHE_RAM_ATTR
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#define os_printf(...) rtl_printf(__VA_ARGS__)
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#define os_printf_plus(...) rtl_printf(__VA_ARGS__)
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#define os_sprintf_fd(...) rtl_sprintf(__VA_ARGS__)
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#define ets_sprintf(...) rtl_sprintf(__VA_ARGS__)
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#ifndef os_malloc
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#define os_malloc pvPortMalloc
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#define os_zalloc pvPortZalloc
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#define os_calloc pvPortCalloc
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#define os_realloc pvPortRealloc
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#endif
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#undef os_free
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#define os_free vPortFree
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#define system_get_free_heap_size xPortGetFreeHeapSize
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#undef os_realloc
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#define os_realloc pvPortReAlloc
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#define os_printf rtl_printf
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#define os_printf_plus rtl_printf
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#define os_sprintf_fd rtl_sprintf
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#define ets_sprintf rtl_sprintf
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//#ifndef os_malloc
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#undef os_malloc
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extern void *pvPortMalloc(size_t xWantedSize);
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#define os_malloc pvPortMalloc
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#undef os_zalloc
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extern void *pvPortZalloc(size_t xWantedSize);
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#define os_zalloc pvPortZalloc
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//#undef os_calloc
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//#define os_calloc pvPortCalloc
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#undef os_realloc
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extern void *pvPortReAlloc(void *pv, size_t xWantedSize);
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#define os_realloc pvPortReAlloc
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#undef os_free
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extern void vPortFree(void *pv);
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#define os_free vPortFree
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//#endif
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extern size_t xPortGetFreeHeapSize(void);
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#define system_get_free_heap_size xPortGetFreeHeapSize
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#define os_bzero rtl_bzero
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#define os_delay_us wait_us // HalDelayUs
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@ -104,22 +112,28 @@ extern SpiFlashChip * flashchip; // in RAM-BIOS: 0x3fffc714
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#define spi_flash_read(faddr, pbuf, size) flash_stream_read(&flashobj, faddr, size, (uint8_t *)pbuf)
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#define spi_flash_erase_block(blk) flash_erase_block(&flashobj, (blk)<<16);
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#ifndef ip4_addr1
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#define ip4_addr1(ipaddr) (((u8_t*)(ipaddr))[0])
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#define ip4_addr2(ipaddr) (((u8_t*)(ipaddr))[1])
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#define ip4_addr3(ipaddr) (((u8_t*)(ipaddr))[2])
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#define ip4_addr4(ipaddr) (((u8_t*)(ipaddr))[3])
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#endif
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/* These are cast to u16_t, with the intent that they are often arguments
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* to printf using the U16_F format from cc.h. */
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#ifndef ip4_addr1_16
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#define ip4_addr1_16(ipaddr) ((u16_t)ip4_addr1(ipaddr))
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#define ip4_addr2_16(ipaddr) ((u16_t)ip4_addr2(ipaddr))
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#define ip4_addr3_16(ipaddr) ((u16_t)ip4_addr3(ipaddr))
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#define ip4_addr4_16(ipaddr) ((u16_t)ip4_addr4(ipaddr))
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#endif
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#undef IP2STR
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#define IP2STR(ipaddr) ip4_addr1_16(ipaddr), \
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ip4_addr2_16(ipaddr), \
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ip4_addr3_16(ipaddr), \
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ip4_addr4_16(ipaddr)
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#undef IPSTR
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#define IPSTR "%d.%d.%d.%d"
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#ifndef MAC2STR
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@ -157,6 +157,9 @@ extern unsigned char dhcp_mode_sta;
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#include "freertos/wrapper.h"
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#include "skbuff.h"
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extern unsigned char is_promisc_enabled(void);
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extern int promisc_set(rtw_rcr_level_t enabled, void (*callback)(unsigned char*, unsigned int, void*), unsigned char len_used);
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//------------------------------------------------------------------------end-patch//
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static int wifi_connect_local(rtw_network_info_t *pWifi) {
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int ret = 0;
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@ -278,8 +281,8 @@ static void wifi_disconn_hdl(char* buf, int buf_len, int flags, void* userdata)
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else if (rtw_join_status == 0)
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error_flag = RTW_CONNECT_FAIL;
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else if (rtw_join_status == JOIN_COMPLETE | JOIN_SECURITY_COMPLETE
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| JOIN_ASSOCIATED | JOIN_AUTHENTICATED | JOIN_LINK_READY)
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else if (rtw_join_status == (JOIN_COMPLETE | JOIN_SECURITY_COMPLETE
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| JOIN_ASSOCIATED | JOIN_AUTHENTICATED | JOIN_LINK_READY))
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error_flag = RTW_WRONG_PASSWORD;
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}
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@ -368,6 +371,7 @@ void restore_wifi_info_to_flash() {
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#endif
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int wext_set_bssid(const char *ifname, const __u8 *bssid);
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//----------------------------------------------------------------------------//
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int wifi_connect(
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unsigned char bssid[ETH_ALEN],
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@ -380,7 +384,7 @@ int wifi_connect(
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int ssid_len = 0;
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int password_len = 0;
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int bssid_len = 6;
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// int bssid_len = 6;
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xSemaphoreHandle join_semaphore;
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rtw_result_t result = RTW_SUCCESS;
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u8 wep_hex = 0;
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@ -440,7 +444,7 @@ int wifi_connect(
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if (password_len == 10) {
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u32 g[5] = { 0 };
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unsigned int g[5] = { 0 };
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u8 i = 0;
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sscanf((const char*) password, "%02x%02x%02x%02x%02x", &g[0],
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&g[1], &g[2], &g[3], &g[4]);
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@ -450,7 +454,7 @@ int wifi_connect(
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password_len = 5;
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wep_hex = 1;
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} else if (password_len == 26) {
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u32 g[13] = { 0 };
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unsigned int g[13] = { 0 };
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u8 i = 0;
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sscanf((const char*) password, "%02x%02x%02x%02x%02x%02x%02x"
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"%02x%02x%02x%02x%02x%02x", &g[0], &g[1], &g[2], &g[3],
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@ -731,8 +735,10 @@ int wifi_get_ap_info(rtw_bss_info_t * ap_info, rtw_security_t* security) {
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return ret;
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}
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extern int wext_get_drv_ability(const char *ifname, __u32 *ability);
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int wifi_get_drv_ability(uint32_t *ability) {
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return wext_get_drv_ability(WLAN0_NAME, ability);
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return wext_get_drv_ability(WLAN0_NAME, (__u32 *)ability);
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}
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//----------------------------------------------------------------------------//
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@ -861,6 +867,9 @@ int wifi_on(rtw_mode_t mode) {
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return ret;
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}
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extern void dhcps_deinit(void); //#include "dhcps.h"
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int wifi_off(void) {
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// int ret = 0;
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@ -948,6 +957,8 @@ int wifi_get_last_error(void) {
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int wpas_wps_init(const char* ifname);
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#endif
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extern int set_hidden_ssid(const char *ifname, uint8_t value);
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int wifi_start_ap(char *ssid, rtw_security_t security_type, char *password, int channel, char ssid_hidden) {
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const char *ifname = WLAN0_NAME;
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int ssid_len = 0;
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@ -1489,6 +1500,8 @@ void wifi_enter_promisc_mode() {
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}
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}
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extern void dhcps_init(struct netif * pnetif);
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int wifi_restart_ap(unsigned char *ssid, rtw_security_t security_type,
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unsigned char *password, int channel) {
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unsigned char idx = 0;
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@ -1543,10 +1556,8 @@ int wifi_restart_ap(unsigned char *ssid, rtw_security_t security_type,
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printf("AP: security_type=%d\n", setting.security_type);
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printf("AP: password=%s\n", (char* )setting.password);
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printf("AP: key_idx =%d\n", setting.key_idx);
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ret = wifi_connect((char*) setting.ssid, setting.security_type,
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(char*) setting.password, strlen((char* )setting.ssid),
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strlen((char* )setting.password), setting.key_idx,
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NULL);
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ret = wifi_connect(NULL, 0 , (char*) setting.ssid, setting.security_type,
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(char*) setting.password, setting.key_idx, NULL);
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if (ret == RTW_SUCCESS) {
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#if CONFIG_DHCP_CLIENT
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/* Start DHCPClient */
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@ -1723,25 +1734,32 @@ int wifi_disable_packet_filter(unsigned char filter_id) {
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int wifi_remove_packet_filter(unsigned char filter_id) {
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return promisc_remove_packet_filter(filter_id);
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}
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#endif
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#endif // CONFIG_PROMISC
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#ifdef CONFIG_AP_MODE
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extern int wext_enable_forwarding(const char *ifname);
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int wifi_enable_forwarding(void) {
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return wext_enable_forwarding(WLAN0_NAME);
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}
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extern int wext_disable_forwarding(const char *ifname);
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int wifi_disable_forwarding(void) {
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return wext_disable_forwarding(WLAN0_NAME);
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}
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#endif
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#endif // CONFIG_AP_MODE
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/* API to set flag for concurrent mode wlan1 issue_deauth when channel switched by wlan0
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* usage: wifi_set_ch_deauth(0) -> wlan0 wifi_connect -> wifi_set_ch_deauth(1)
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*/
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#ifdef CONFIG_CONCURRENT_MODE
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extern int wext_set_ch_deauth(const char *ifname, __u8 enable);
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int wifi_set_ch_deauth(__u8 enable) {
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return wext_set_ch_deauth(WLAN1_NAME, enable);
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}
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#endif
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//----------------------------------------------------------------------------//
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@ -102,103 +102,103 @@ void wifi_indication(WIFI_EVENT_INDICATE event, unsigned char *buf, int buf_len,
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// , and tries not to share the same stack with wlan driver if remaining stack space is
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// not available for the following operations.
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// ex: using semaphore to notice another thread.
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switch (event) {
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switch ((u32)event) {
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case WIFI_EVENT_DISCONNECT:
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#if(WIFI_INDICATE_MSG>0)
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info_printf("%s(%d): Disconnection indication received\n", __func__, event);
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#endif
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break;
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#if(WIFI_INDICATE_MSG>0)
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case WIFI_EVENT_CONNECT:
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// For WPA/WPA2 mode, indication of connection does not mean data can be
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// correctly transmitted or received. Data can be correctly transmitted or
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// received only when 4-way handshake is done.
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// Please check WIFI_EVENT_FOURWAY_HANDSHAKE_DONE event
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#if(WIFI_INDICATE_MSG>0)
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// Sample: return mac address
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if (buf != NULL && buf_len == 6) {
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info_printf(
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"%s(%d): Connect indication received: %02x:%02x:%02x:%02x:%02x:%02x\n",
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__func__, event, buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]);
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}
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#endif
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break;
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case WIFI_EVENT_FOURWAY_HANDSHAKE_DONE:
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#endif
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#if(WIFI_INDICATE_MSG>0)
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case WIFI_EVENT_FOURWAY_HANDSHAKE_DONE:
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if (buf != NULL)
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info_printf("%s(%d): %s\n", __func__, event, buf);
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#endif
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break;
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#endif
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#if(WIFI_INDICATE_MSG>0)
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case WIFI_EVENT_SCAN_RESULT_REPORT:
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#if(WIFI_INDICATE_MSG>0)
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info_printf("%s(%d): WIFI_EVENT_SCAN_RESULT_REPORT\n", __func__, event);
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#endif
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break;
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case WIFI_EVENT_SCAN_DONE:
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#endif
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#if(WIFI_INDICATE_MSG>0)
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case WIFI_EVENT_SCAN_DONE:
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info_printf("%s(%d): WIFI_EVENT_SCAN_DONE\n", __func__, event);
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//#if CONFIG_DEBUG_LOG > 3
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// debug_printf("Time at start %d ms.\n", xTaskGetTickCount());
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//#endif
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#endif
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break;
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#endif
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#if(WIFI_INDICATE_MSG>0)
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case WIFI_EVENT_RECONNECTION_FAIL:
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#if(WIFI_INDICATE_MSG>0)
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info_printf("%s(%d): %s\n", __func__, event, buf);
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#endif
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break;
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#endif
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#if(WIFI_INDICATE_MSG>0)
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case WIFI_EVENT_NO_NETWORK:
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#if(WIFI_INDICATE_MSG>0)
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info_printf("%s(%d): %s\n", __func__, event, buf);
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#endif
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break;
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#endif
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#if CONFIG_ENABLE_P2P
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#if(WIFI_INDICATE_MSG>0)
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case WIFI_EVENT_SEND_ACTION_DONE:
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#if(WIFI_INDICATE_MSG>0)
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info_printf("%s(%d): %s\n", __func__, event, buf);
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#endif
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break;
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#endif
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#if(WIFI_INDICATE_MSG>0)
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case WIFI_EVENT_RX_MGNT:
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#if(WIFI_INDICATE_MSG>0)
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info_printf("%s(%d): WIFI_EVENT_RX_MGNT\n", __func__, event);
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#endif
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break;
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#endif
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#endif //CONFIG_ENABLE_P2P
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#if(WIFI_INDICATE_MSG>0)
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case WIFI_EVENT_STA_ASSOC:
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#if(WIFI_INDICATE_MSG>0)
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info_printf("%s(%d): WIFI_EVENT_STA_ASSOC\n", __func__, event);
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#endif
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break;
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#endif
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#if(WIFI_INDICATE_MSG>0)
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case WIFI_EVENT_STA_DISASSOC:
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#if(WIFI_INDICATE_MSG>0)
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info_printf("%s(%d): WIFI_EVENT_STA_DISASSOC\n", __func__, event);
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#endif
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break;
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#endif
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#ifdef CONFIG_WPS
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#if(WIFI_INDICATE_MSG>0)
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case WIFI_EVENT_STA_WPS_START:
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#if(WIFI_INDICATE_MSG>0)
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info_printf("%s(%d): WIFI_EVENT_STA_WPS_START\n", __func__, event);
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#endif
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break;
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#endif
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#if(WIFI_INDICATE_MSG>0)
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case WIFI_EVENT_WPS_FINISH:
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#if(WIFI_INDICATE_MSG>0)
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info_printf("%s(%d): WIFI_EVENT_WPS_FINISH\n", __func__, event);
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#endif
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break;
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case WIFI_EVENT_EAPOL_RECVD:
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#endif
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#if(WIFI_INDICATE_MSG>0)
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case WIFI_EVENT_EAPOL_RECVD:
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info_printf("%s(%d): WIFI_EVENT_EAPOL_RECVD\n", __func__, event);
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#endif
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break;
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#endif
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case WIFI_EVENT_BEACON_AFTER_DHCP:
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#if(WIFI_INDICATE_MSG>1)
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info_printf("%s(%d): WIFI_EVENT_BEACON_AFTER_DHCP\n", __func__, event);
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#endif
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#if(WIFI_INDICATE_MSG>1)
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case WIFI_EVENT_BEACON_AFTER_DHCP:
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info_printf("%s(%d): WIFI_EVENT_BEACON_AFTER_DHCP\n", __func__, event);
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#if 0 // test beacon
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gpio_write(&gpio_led, 1);
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gpio_write(&gpio_led, 0);
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#endif
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break;
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#endif
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}
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#if CONFIG_INIC_EN
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@ -55,6 +55,7 @@ int promisc_set(rtw_rcr_level_t enabled, void (*callback)(unsigned char*, unsign
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unsigned char is_promisc_enabled(void)
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{
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#ifdef CONFIG_PROMISC
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extern unsigned char _is_promisc_enabled(void);
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return _is_promisc_enabled();
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#else
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return 0;
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@ -64,6 +65,7 @@ unsigned char is_promisc_enabled(void)
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int promisc_get_fixed_channel(void *fixed_bssid, u8 *ssid, int *ssid_length)
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{
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#ifdef CONFIG_PROMISC
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extern int _promisc_get_fixed_channel(void *fixed_bssid, u8 *ssid, int *ssid_length);
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return _promisc_get_fixed_channel(fixed_bssid, ssid, ssid_length);
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#else
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return 0;
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@ -111,7 +113,7 @@ static struct eth_buffer eth_buffer;
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#ifdef CONFIG_PROMISC
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#define MAX_PACKET_FILTER_INFO 5
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#define FILTER_ID_INIT_VALUE 10
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rtw_packet_filter_info_t paff_array[MAX_PACKET_FILTER_INFO]={0, 0, 0, 0, 0};
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rtw_packet_filter_info_t paff_array[MAX_PACKET_FILTER_INFO]; //={0, 0, 0, 0, 0};
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static u8 packet_filter_enable_num = 0;
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void promisc_init_packet_filter()
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@ -321,7 +321,6 @@ int wext_set_tdma_param(const char *ifname, __u8 slot_period,
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return ret;
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#else
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struct iwreq iwr;
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int ret = -1;
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__u16 pindex = 7;
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__u8 para[16]; // 7+(1+1+4)
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int cmd_len = sizeof("pm_set");
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@ -409,7 +408,6 @@ int wext_get_lps_dtim(const char *ifname, __u8 *lps_dtim) {
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int wext_set_tos_value(const char *ifname, __u8 *tos_value) {
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struct iwreq iwr;
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int ret = -1;
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__u8 para[sizeof("set_tos_value") + 4];
|
||||
int cmd_len = sizeof("set_tos_value");
|
||||
memset(&iwr, 0, sizeof(iwr));
|
||||
|
|
@ -753,7 +751,7 @@ int wext_private_command_with_retval(const char *ifname, char *cmd,
|
|||
iwr.u.data.length = buf_size;
|
||||
iwr.u.data.flags = 0;
|
||||
ret = iw_ioctl(ifname, SIOCDEVPRIVATE, &iwr);
|
||||
if (ret >= 0 & ret_buf != NULL) {
|
||||
if (ret >= 0 && ret_buf != NULL) {
|
||||
if (ret_len > iwr.u.data.length)
|
||||
ret_len = iwr.u.data.length;
|
||||
memcpy(ret_buf, (char *) iwr.u.data.pointer, ret_len);
|
||||
|
|
@ -925,7 +923,6 @@ int wext_set_gen_ie(const char *ifname, char *buf, __u16 buf_len, __u16 flags) {
|
|||
int wext_set_autoreconnect(const char *ifname, __u8 mode, __u8 retyr_times,
|
||||
__u16 timeout) {
|
||||
struct iwreq iwr;
|
||||
int ret = 0;
|
||||
__u8 para[sizeof("SetAutoRecnt") + 4];
|
||||
int cmd_len = sizeof("SetAutoRecnt");
|
||||
memset(&iwr, 0, sizeof(iwr));
|
||||
|
|
@ -1019,7 +1016,7 @@ int wext_update_custom_ie(const char *ifname, void * cus_ie, int ie_index) {
|
|||
#endif
|
||||
} else {
|
||||
memset(&iwr, 0, sizeof(iwr));
|
||||
cmd_len = para = pvPortMalloc((4) * 2 + cmd_len); //size:addr len+cmd_len
|
||||
para = pvPortMalloc((4) * 2 + cmd_len); //size:addr len+cmd_len
|
||||
if (para != NULL) {
|
||||
//Cmd
|
||||
snprintf(para, cmd_len, "UpdateIE");
|
||||
|
|
|
|||
|
|
@ -74,7 +74,7 @@ WIFI_CONFIG wifi_cfg = {
|
|||
SOFTAP_CONFIG wifi_ap_cfg = {
|
||||
.ssid = DEF_AP_SSID,
|
||||
.password = DEF_AP_PASSWORD,
|
||||
.security = DEF_AP_SECURITY, // RTW_SECURITY_WPA2_AES_PSK or RTW_SECURITY_OPEN
|
||||
.security = (unsigned char)DEF_AP_SECURITY, // RTW_SECURITY_WPA2_AES_PSK or RTW_SECURITY_OPEN
|
||||
.beacon_interval = DEF_AP_BEACON,
|
||||
.channel = DEF_AP_CHANNEL,
|
||||
.ssid_hidden = 0,
|
||||
|
|
@ -91,7 +91,7 @@ STATION_CONFIG wifi_st_cfg = {
|
|||
.ssid = DEF_ST_SSID,
|
||||
.password = DEF_ST_PASSWORD,
|
||||
.bssid = DEF_ST_BSSID,
|
||||
.flg = DEF_ST_BSSID,
|
||||
.flg = DEF_ST_USE_BSSID,
|
||||
.security = DEF_ST_SECURITY,
|
||||
.autoreconnect = DEF_ST_AUTORECONNECT,
|
||||
.reconnect_pause = DEF_ST_RECONNECT_PAUSE,
|
||||
|
|
@ -204,8 +204,8 @@ LOCAL int wlan_init_done_callback(void) {
|
|||
//char wlan_st_name[] = WLAN0_NAME;
|
||||
char wlan_st_name[] = WLAN0_NAME;
|
||||
char wlan_ap_name[] = WLAN1_NAME;
|
||||
char wlan_st_netifn = 0;
|
||||
char wlan_ap_netifn = 1;
|
||||
unsigned char wlan_st_netifn = 0;
|
||||
unsigned char wlan_ap_netifn = 1;
|
||||
|
||||
|
||||
uint32 get_new_ip(void)
|
||||
|
|
@ -283,7 +283,7 @@ rtw_result_t _wext_enable_powersave(int adapter_num, uint8 ips_mode, uint8 lps_m
|
|||
return ret;
|
||||
}
|
||||
|
||||
LOCAL int _wext_cmp_ssid(int adapter_num, uint8 *ssid)
|
||||
LOCAL int _wext_cmp_ssid(int adapter_num, unsigned char *ssid)
|
||||
{
|
||||
_adapter * pad = get_padaptern(adapter_num);
|
||||
int ret = 0;
|
||||
|
|
@ -362,7 +362,7 @@ LOCAL rtw_result_t wifi_run_ap(void) {
|
|||
int timeout = wifi_test_timeout_ms / wifi_test_timeout_step_ms;
|
||||
while (1) {
|
||||
#if 1
|
||||
if (_wext_cmp_ssid(WLAN_AP_NETIF_NUM, &wifi_ap_cfg.ssid )) {
|
||||
if (_wext_cmp_ssid(WLAN_AP_NETIF_NUM, wifi_ap_cfg.ssid )) {
|
||||
#else
|
||||
char essid[33];
|
||||
if ((wext_get_ssid(wlan_ap_name, (unsigned char *) essid) > 0)
|
||||
|
|
@ -409,7 +409,7 @@ LOCAL rtw_result_t StartStDHCPClient(void)
|
|||
debug_printf("Start DHCPClient...\n");
|
||||
int ret = RTW_SUCCESS;
|
||||
struct netif * pnetif = &xnetif[WLAN_ST_NETIF_NUM];
|
||||
DHCP_CONFIG *p = (dhcp_cfg *)&wifi_st_dhcp;
|
||||
DHCP_CONFIG *p = (DHCP_CONFIG *)&wifi_st_dhcp;
|
||||
unsigned char mode = p->mode;
|
||||
if(mode == 2 && p->ip != IP4ADDR(255,255,255,255) && p->ip != IP4ADDR(0,0,0,0)) { // fixed ip
|
||||
netif_set_addr(pnetif, (ip_addr_t *)&p->ip, (ip_addr_t *)&p->mask, (ip_addr_t *)&p->gw);
|
||||
|
|
@ -602,8 +602,8 @@ LOCAL void _LwIP_Init(void)
|
|||
xnetif[idx].name[0] = 'r';
|
||||
xnetif[idx].name[1] = '0' + idx;
|
||||
}
|
||||
netif_add(&xnetif[WLAN_ST_NETIF_NUM], (struct netif *)&wifi_st_dhcp.ip, (struct netif *)&wifi_st_dhcp.mask, (struct netif *)&wifi_st_dhcp.gw, NULL, ðernetif_init, &tcpip_input);
|
||||
netif_add(&xnetif[WLAN_AP_NETIF_NUM], (struct netif *)&wifi_ap_dhcp.ip, (struct netif *)&wifi_ap_dhcp.mask, (struct netif *)&wifi_ap_dhcp.gw, NULL, ðernetif_init, &tcpip_input);
|
||||
netif_add(&xnetif[WLAN_ST_NETIF_NUM], (ip_addr_t *)&wifi_st_dhcp.ip, (ip_addr_t *)&wifi_st_dhcp.mask, (ip_addr_t *)&wifi_st_dhcp.gw, NULL, ðernetif_init, &tcpip_input);
|
||||
netif_add(&xnetif[WLAN_AP_NETIF_NUM], (ip_addr_t *)&wifi_ap_dhcp.ip, (ip_addr_t *)&wifi_ap_dhcp.mask, (ip_addr_t *)&wifi_ap_dhcp.gw, NULL, ðernetif_init, &tcpip_input);
|
||||
#if CONFIG_ETHERNET // && NET_IF_NUM > 2
|
||||
{
|
||||
struct ip_addr ipaddr;
|
||||
|
|
@ -628,6 +628,8 @@ LOCAL void _LwIP_Init(void)
|
|||
}
|
||||
}
|
||||
|
||||
extern int rltk_set_tx_power_percentage(rtw_tx_pwr_percentage_t power_percentage_idx);
|
||||
|
||||
int wifi_run(rtw_mode_t mode) {
|
||||
int ret = 0;
|
||||
#if CONFIG_DEBUG_LOG > 4
|
||||
|
|
@ -668,8 +670,8 @@ int wifi_run(rtw_mode_t mode) {
|
|||
netbios_set_name(WLAN_ST_NETIF_NUM, lwip_host_name[0]);
|
||||
#endif
|
||||
#endif
|
||||
netif_set_addr(&xnetif[WLAN_ST_NETIF_NUM], &wifi_st_dhcp.ip,
|
||||
&wifi_st_dhcp.mask, &wifi_st_dhcp.gw);
|
||||
netif_set_addr(&xnetif[WLAN_ST_NETIF_NUM], (ip_addr_t *) &wifi_st_dhcp.ip,
|
||||
(ip_addr_t *) &wifi_st_dhcp.mask, (ip_addr_t *) &wifi_st_dhcp.gw);
|
||||
pnif = &xnetif[WLAN_AP_NETIF_NUM];
|
||||
#if LWIP_NETIF_HOSTNAME
|
||||
// @todo ethernetif_init()...
|
||||
|
|
@ -678,8 +680,8 @@ int wifi_run(rtw_mode_t mode) {
|
|||
netbios_set_name(WLAN_AP_NETIF_NUM, lwip_host_name[1]);
|
||||
#endif
|
||||
#endif
|
||||
netif_set_addr(&xnetif[WLAN_AP_NETIF_NUM], &wifi_ap_dhcp.ip,
|
||||
&wifi_ap_dhcp.mask, &wifi_ap_dhcp.gw);
|
||||
netif_set_addr(&xnetif[WLAN_AP_NETIF_NUM], (ip_addr_t *) &wifi_ap_dhcp.ip,
|
||||
(ip_addr_t *) &wifi_ap_dhcp.mask, (ip_addr_t *) &wifi_ap_dhcp.gw);
|
||||
|
||||
}
|
||||
switch(mode) {
|
||||
|
|
|
|||
|
|
@ -10,10 +10,12 @@
|
|||
#include "wifi_constants.h"
|
||||
#include "queue.h"
|
||||
|
||||
#ifndef ip4_addr1
|
||||
#define ip4_addr1(ipaddr) (((uint8_t*)(ipaddr))[0])
|
||||
#define ip4_addr2(ipaddr) (((uint8_t*)(ipaddr))[1])
|
||||
#define ip4_addr3(ipaddr) (((uint8_t*)(ipaddr))[2])
|
||||
#define ip4_addr4(ipaddr) (((uint8_t*)(ipaddr))[3])
|
||||
#endif
|
||||
|
||||
#define IPSTR "%d.%d.%d.%d"
|
||||
|
||||
|
|
@ -118,8 +120,8 @@ extern unsigned char wifi_mode; // rtw_mode_t
|
|||
extern unsigned char wifi_st_status; // WIFI_STA_ENUM
|
||||
extern char wlan_st_name[];
|
||||
extern char wlan_ap_name[];
|
||||
extern char wlan_st_netifn;
|
||||
extern char wlan_ap_netifn;
|
||||
extern unsigned char wlan_st_netifn;
|
||||
extern unsigned char wlan_ap_netifn;
|
||||
|
||||
/* WiFi Station & scan security */
|
||||
typedef enum {
|
||||
|
|
|
|||
|
|
@ -90,7 +90,7 @@ LOCAL void _wifi_scan_done_hdl(char* buf, int buf_len, int flags, void* userdata
|
|||
web_scan_handler_t * pwscn_rec = &web_scan_handler_ptr;
|
||||
if(pscan_rec->gscan_result_handler) {
|
||||
// сторонний вывод
|
||||
(*pscan_rec->gscan_result_handler)(pscan_rec);
|
||||
(*pscan_rec->gscan_result_handler)((rtw_scan_handler_result_t *) pscan_rec);
|
||||
}
|
||||
else {
|
||||
// оставить структуру pscan_rec->pap_details[i] для вывода в web scan на 5 сек
|
||||
|
|
@ -136,6 +136,7 @@ LOCAL int _wifi_scan_networks(rtw_scan_result_handler_t results_handler) {
|
|||
}
|
||||
|
||||
/* -------- wext_set_pscan_channels ----------------- */
|
||||
extern int iw_ioctl(const char * ifname, unsigned long request, struct iwreq * pwrq);
|
||||
|
||||
LOCAL int wext_set_pscan_channels(void) {
|
||||
struct iwreq iwr;
|
||||
|
|
@ -183,7 +184,7 @@ rtw_result_t api_wifi_scan(api_scan_result_handler_t scan_result_cb)
|
|||
// error_printf("Error xTimerStart\n");
|
||||
} else if(wext_set_pscan_channels() < 0) {
|
||||
// error_printf("ERROR: wifi set partial scan channel fail\n");
|
||||
} else if(_wifi_scan_networks(scan_result_cb) != RTW_SUCCESS) {
|
||||
} else if(_wifi_scan_networks((rtw_scan_result_handler_t) scan_result_cb) != RTW_SUCCESS) {
|
||||
// error_printf("ERROR: wifi scan failed\n");
|
||||
} else if(scan_result_cb) {
|
||||
int i = 300;
|
||||
|
|
|
|||
|
|
@ -208,6 +208,7 @@
|
|||
#if defined(CONFIG_HARDWARE_8188F)
|
||||
#define NET_IF_NUM 2
|
||||
#else
|
||||
#undef NET_IF_NUM
|
||||
#define NET_IF_NUM ((CONFIG_ETHERNET) + (CONFIG_WLAN) + 1)
|
||||
#endif
|
||||
#else
|
||||
|
|
|
|||
|
|
@ -56,6 +56,7 @@
|
|||
#include <section_config.h>
|
||||
//#include "rtl_utility_ram.h"
|
||||
#include "platform/platform_stdlib.h"
|
||||
|
||||
#else
|
||||
#define SRAM_BD_DATA_SECTION
|
||||
#define WLAN_ROM_TEXT_SECTION
|
||||
|
|
@ -114,7 +115,7 @@ enum _NIC_VERSION {
|
|||
|
||||
};
|
||||
|
||||
typedef struct _ADAPTER _adapter, ADAPTER,*PADAPTER;
|
||||
typedef struct _ADAPTER _adapter, ADAPTER, *PADAPTER;
|
||||
|
||||
#include "wireless.h"
|
||||
#include <netdev.h>
|
||||
|
|
|
|||
|
|
@ -39,21 +39,21 @@
|
|||
// 0x0000h ~ 0x00FFh System Configuration
|
||||
//
|
||||
//-----------------------------------------------------
|
||||
#define REG_SYS_ISO_CTRL 0x0000
|
||||
#define REG_SYS_FUNC_EN 0x0002
|
||||
#define REG_SYS_ISO_CTRL_ 0x0000
|
||||
#define REG_SYS_FUNC_EN_ 0x0002
|
||||
#define REG_APS_FSMCO 0x0004
|
||||
#define REG_SYS_CLKR 0x0008
|
||||
#define REG_9346CR 0x000A
|
||||
#define REG_SYS_EEPROM_CTRL 0x000A
|
||||
#define REG_SYS_EEPROM_CTRL 0x000A
|
||||
#define REG_EE_VPD 0x000C
|
||||
#define REG_AFE_MISC 0x0010
|
||||
#define REG_SPS0_CTRL 0x0011
|
||||
#define REG_SPS0_CTRL_6 0x0016
|
||||
#define REG_POWER_OFF_IN_PROCESS 0x0017
|
||||
#define REG_SPS_OCP_CFG 0x0018
|
||||
#define REG_SPS_OCP_CFG 0x0018
|
||||
#define REG_RSV_CTRL 0x001C
|
||||
#define REG_RF_CTRL 0x001F
|
||||
#define REG_LDOA15_CTRL 0x0020
|
||||
#define REG_LDOA15_CTRL 0x0020
|
||||
#define REG_LDOV12D_CTRL 0x0021
|
||||
#define REG_LDOHCI12_CTRL 0x0022
|
||||
#define REG_LPLDO_CTRL 0x0023
|
||||
|
|
@ -67,9 +67,9 @@
|
|||
#define REG_PWR_DATA 0x0038
|
||||
#define REG_CAL_TIMER 0x003C
|
||||
#define REG_ACLK_MON 0x003E
|
||||
#define REG_GPIO_MUXCFG 0x0040
|
||||
#define REG_GPIO_MUXCFG 0x0040
|
||||
#define REG_GPIO_IO_SEL 0x0042
|
||||
#define REG_MAC_PINMUX_CFG 0x0043
|
||||
#define REG_MAC_PINMUX_CFG 0x0043
|
||||
#define REG_GPIO_PIN_CTRL 0x0044
|
||||
#define REG_GPIO_INTM 0x0048
|
||||
#define REG_LEDCFG0 0x004C
|
||||
|
|
@ -80,18 +80,18 @@
|
|||
#define REG_FSISR 0x0054
|
||||
#define REG_HSIMR 0x0058
|
||||
#define REG_HSISR 0x005c
|
||||
#define REG_GPIO_PIN_CTRL_2 0x0060 // RTL8723 WIFI/BT/GPS Multi-Function GPIO Pin Control.
|
||||
#define REG_GPIO_PIN_CTRL_2 0x0060 // RTL8723 WIFI/BT/GPS Multi-Function GPIO Pin Control.
|
||||
#define REG_GPIO_IO_SEL_2 0x0062 // RTL8723 WIFI/BT/GPS Multi-Function GPIO Select.
|
||||
#define REG_MULTI_FUNC_CTRL 0x0068 // RTL8723 WIFI/BT/GPS Multi-Function control source.
|
||||
#define REG_MULTI_FUNC_CTRL 0x0068 // RTL8723 WIFI/BT/GPS Multi-Function control source.
|
||||
#define REG_GSSR 0x006c
|
||||
#define REG_AFE_XTAL_CTRL_EXT 0x0078 //RTL8188E
|
||||
#define REG_XCK_OUT_CTRL 0x007c //RTL8188E
|
||||
#define REG_MCUFWDL 0x0080
|
||||
#define REG_MCUFWDL 0x0080
|
||||
#define REG_WOL_EVENT 0x0081 //RTL8188E
|
||||
#define REG_MCUTSTCFG 0x0084
|
||||
#define REG_FDHM0 0x0088
|
||||
#define REG_HOST_SUSP_CNT 0x00BC // RTL8192C Host suspend counter on FPGA platform
|
||||
#define REG_SYSTEM_ON_CTRL 0x00CC // For 8723AE Reset after S3
|
||||
#define REG_SYSTEM_ON_CTRL 0x00CC // For 8723AE Reset after S3
|
||||
#define REG_EFUSE_ACCESS 0x00CF // Efuse access protection for RTL8723
|
||||
#define REG_BIST_SCAN 0x00D0
|
||||
#define REG_BIST_RPT 0x00D4
|
||||
|
|
@ -101,16 +101,16 @@
|
|||
#define REG_PCIE_MIO_INTD 0x00E8
|
||||
#define REG_HPON_FSM 0x00EC
|
||||
#define REG_SYS_CFG 0x00F0
|
||||
#define REG_GPIO_OUTSTS 0x00F4 // For RTL8723 only.
|
||||
#define REG_GPIO_OUTSTS 0x00F4 // For RTL8723 only.
|
||||
#define REG_TYPE_ID 0x00FC
|
||||
|
||||
|
||||
#define REG_WL_CLK_CTRL 0x0002
|
||||
#define REG_WL_FUNC_EN 0x0004
|
||||
#define REG_WL_PMC_CTRL 0x0020
|
||||
#define REG_WL_CLK_CTRL 0x0002
|
||||
#define REG_WL_FUNC_EN 0x0004
|
||||
#define REG_WL_PMC_CTRL 0x0020
|
||||
#define REG_WL_AFE_CTRL 0x0050
|
||||
#define REG_WL_PMC_IMR 0x0080
|
||||
#define REG_WL_PMC_ISR 0x0084
|
||||
#define REG_WL_PMC_IMR 0x0080
|
||||
#define REG_WL_PMC_ISR 0x0084
|
||||
|
||||
|
||||
//-----------------------------------------------------
|
||||
|
|
@ -121,7 +121,7 @@
|
|||
#define REG_CR 0x0100
|
||||
#define REG_PBP 0x0104
|
||||
#define REG_PKT_BUFF_ACCESS_CTRL 0x0106
|
||||
#define REG_TRXDMA_CTRL 0x010C
|
||||
#define REG_TRXDMA_CTRL 0x010C
|
||||
#define REG_TRXFF_BNDY 0x0114
|
||||
#define REG_TRXFF_STATUS 0x0118
|
||||
#define REG_RXFF_PTR 0x011C
|
||||
|
|
@ -134,25 +134,25 @@
|
|||
#define REG_FWISR 0x0134
|
||||
#define REG_FTIMR 0x0138
|
||||
#define REG_FTISR 0x013C //RTL8192C
|
||||
#define REG_PKTBUF_DBG_CTRL 0x0140
|
||||
#define REG_PKTBUF_DBG_CTRL 0x0140
|
||||
#define REG_RXPKTBUF_CTRL (REG_PKTBUF_DBG_CTRL+2)
|
||||
#define REG_PKTBUF_DBG_DATA_L 0x0144
|
||||
#define REG_PKTBUF_DBG_DATA_H 0x0148
|
||||
#define REG_PKTBUF_DBG_DATA_H 0x0148
|
||||
|
||||
#define REG_TC0_CTRL 0x0150
|
||||
#define REG_TC1_CTRL 0x0154
|
||||
#define REG_TC2_CTRL 0x0158
|
||||
#define REG_TC3_CTRL 0x015C
|
||||
#define REG_TC4_CTRL 0x0160
|
||||
#define REG_TCUNIT_BASE 0x0164
|
||||
#define REG_MBIST_START 0x0174
|
||||
#define REG_TCUNIT_BASE 0x0164
|
||||
#define REG_MBIST_START 0x0174
|
||||
#define REG_MBIST_DONE 0x0178
|
||||
#define REG_MBIST_FAIL 0x017C
|
||||
#define REG_32K_CTRL 0x0194 //RTL8188E
|
||||
#define REG_C2HEVT_MSG_NORMAL 0x01A0
|
||||
#define REG_C2HEVT_MSG_NORMAL 0x01A0
|
||||
#define REG_C2HEVT_CLEAR 0x01AF
|
||||
#define REG_MCUTST_1 0x01c0
|
||||
#define REG_MCUTST_WOWLAN 0x01C7 // Defined after 8188E series.
|
||||
#define REG_MCUTST_WOWLAN 0x01C7 // Defined after 8188E series.
|
||||
#define REG_FMETHR 0x01C8
|
||||
#define REG_HMETFR 0x01CC
|
||||
#define REG_HMEBOX_0 0x01D0
|
||||
|
|
@ -180,7 +180,7 @@
|
|||
// 0x0280h ~ 0x02FFh RXDMA Configuration
|
||||
//
|
||||
//-----------------------------------------------------
|
||||
#define REG_RXDMA_AGG_PG_TH 0x0280
|
||||
#define REG_RXDMA_AGG_PG_TH 0x0280
|
||||
#define REG_RXPKT_NUM 0x0284
|
||||
#define REG_RXDMA_STATUS 0x0288
|
||||
#define REG_C2H_PKT_8723B 0x0294
|
||||
|
|
@ -194,7 +194,7 @@
|
|||
#define REG_PCIE_CTRL_REG 0x0300
|
||||
#define REG_INT_MIG 0x0304 // Interrupt Migration
|
||||
#define REG_BCNQ_DESA 0x0308 // TX Beacon Descriptor Address
|
||||
#define REG_HQ_DESA 0x0310 // TX High Queue Descriptor Address
|
||||
#define REG_HQ_DESA 0x0310 // TX High Queue Descriptor Address
|
||||
#define REG_MGQ_DESA 0x0318 // TX Manage Queue Descriptor Address
|
||||
#define REG_VOQ_DESA 0x0320 // TX VO Queue Descriptor Address
|
||||
#define REG_VIQ_DESA 0x0328 // TX VI Queue Descriptor Address
|
||||
|
|
@ -203,9 +203,9 @@
|
|||
#define REG_RX_DESA 0x0340 // RX Queue Descriptor Address
|
||||
//sherry added for DBI Read/Write 20091126
|
||||
#define REG_DBI_WDATA 0x0348 // Backdoor REG for Access Configuration
|
||||
#define REG_DBI_RDATA 0x034C //Backdoor REG for Access Configuration
|
||||
#define REG_DBI_CTRL 0x0350 //Backdoor REG for Access Configuration
|
||||
#define REG_DBI_FLAG 0x0352 //Backdoor REG for Access Configuration
|
||||
#define REG_DBI_RDATA 0x034C //Backdoor REG for Access Configuration
|
||||
#define REG_DBI_CTRL 0x0350 //Backdoor REG for Access Configuration
|
||||
#define REG_DBI_FLAG 0x0352 //Backdoor REG for Access Configuration
|
||||
#define REG_MDIO 0x0354 // MDIO for Access PCIE PHY
|
||||
#define REG_DBG_SEL 0x0360 // Debug Selection Register
|
||||
#define REG_PCIE_HRPWM 0x0361 //PCIe RPWM
|
||||
|
|
@ -214,88 +214,88 @@
|
|||
|
||||
// For new buffer descriptor ring architecture
|
||||
|
||||
#define REG_LX_CTRL1 0x0300 // 4 Bytes
|
||||
#define REG_LX_CTRL1 0x0300 // 4 Bytes
|
||||
|
||||
#define REG_BCNQ_TXBD_DESA 0x0308 // 8 Bytes
|
||||
#define REG_MGQ_TXBD_DESA 0x0310 // 8 Bytes
|
||||
#define REG_BCNQ_TXBD_DESA 0x0308 // 8 Bytes
|
||||
#define REG_MGQ_TXBD_DESA 0x0310 // 8 Bytes
|
||||
#define REG_VOQ_TXBD_DESA 0x0318 // 8 Bytes
|
||||
#define REG_VIQ_TXBD_DESA 0x0320 // 8 Bytes
|
||||
#define REG_BEQ_TXBD_DESA 0x0328 // 8 Bytes
|
||||
#define REG_BKQ_TXBD_DESA 0x0330 // 8 Bytes
|
||||
#define REG_RXQ_RXBD_DESA 0x0338 // 8 Bytes
|
||||
#define REG_HI0Q_TXBD_DESA 0x0340 // 8 Bytes
|
||||
#define REG_HI1Q_TXBD_DESA 0x0348 // 8 Bytes
|
||||
#define REG_HI2Q_TXBD_DESA 0x0350 // 8 Bytes
|
||||
#define REG_HI3Q_TXBD_DESA 0x0358 // 8 Bytes
|
||||
#define REG_HI4Q_TXBD_DESA 0x0360 // 8 Bytes
|
||||
#define REG_HI5Q_TXBD_DESA 0x0368 // 8 Bytes
|
||||
#define REG_VIQ_TXBD_DESA 0x0320 // 8 Bytes
|
||||
#define REG_BEQ_TXBD_DESA 0x0328 // 8 Bytes
|
||||
#define REG_BKQ_TXBD_DESA 0x0330 // 8 Bytes
|
||||
#define REG_RXQ_RXBD_DESA 0x0338 // 8 Bytes
|
||||
#define REG_HI0Q_TXBD_DESA 0x0340 // 8 Bytes
|
||||
#define REG_HI1Q_TXBD_DESA 0x0348 // 8 Bytes
|
||||
#define REG_HI2Q_TXBD_DESA 0x0350 // 8 Bytes
|
||||
#define REG_HI3Q_TXBD_DESA 0x0358 // 8 Bytes
|
||||
#define REG_HI4Q_TXBD_DESA 0x0360 // 8 Bytes
|
||||
#define REG_HI5Q_TXBD_DESA 0x0368 // 8 Bytes
|
||||
#define REG_HI6Q_TXBD_DESA 0x0370 // 8 Bytes
|
||||
#define REG_HI7Q_TXBD_DESA 0x0378 // 8 Bytes
|
||||
#define REG_HI7Q_TXBD_DESA 0x0378 // 8 Bytes
|
||||
|
||||
#define REG_MGQ_TXBD_NUM 0x0380 // 2 Bytes
|
||||
#define REG_RX_RXBD_NUM 0x0382 // 2 Bytes
|
||||
#define REG_VOQ_TXBD_NUM 0x0384 // 2 Bytes
|
||||
#define REG_VIQ_TXBD_NUM 0x0386 // 2 Bytes
|
||||
#define REG_BEQ_TXBD_NUM 0x0388 // 2 Bytes
|
||||
#define REG_BKQ_TXBD_NUM 0x038A // 2 Bytes
|
||||
#define REG_HI0Q_TXBD_NUM 0x038C // 2 Bytes
|
||||
#define REG_HI1Q_TXBD_NUM 0x038E // 2 Bytes
|
||||
#define REG_HI2Q_TXBD_NUM 0x0390 // 2 Bytes
|
||||
#define REG_HI3Q_TXBD_NUM 0x0392 // 2 Bytes
|
||||
#define REG_HI4Q_TXBD_NUM 0x0394 // 2 Bytes
|
||||
#define REG_HI5Q_TXBD_NUM 0x0396 // 2 Bytes
|
||||
#define REG_HI6Q_TXBD_NUM 0x0398 // 2 Bytes
|
||||
#define REG_HI7Q_TXBD_NUM 0x039A // 2 Bytes
|
||||
#define REG_MGQ_TXBD_NUM 0x0380 // 2 Bytes
|
||||
#define REG_RX_RXBD_NUM 0x0382 // 2 Bytes
|
||||
#define REG_VOQ_TXBD_NUM 0x0384 // 2 Bytes
|
||||
#define REG_VIQ_TXBD_NUM 0x0386 // 2 Bytes
|
||||
#define REG_BEQ_TXBD_NUM 0x0388 // 2 Bytes
|
||||
#define REG_BKQ_TXBD_NUM 0x038A // 2 Bytes
|
||||
#define REG_HI0Q_TXBD_NUM 0x038C // 2 Bytes
|
||||
#define REG_HI1Q_TXBD_NUM 0x038E // 2 Bytes
|
||||
#define REG_HI2Q_TXBD_NUM 0x0390 // 2 Bytes
|
||||
#define REG_HI3Q_TXBD_NUM 0x0392 // 2 Bytes
|
||||
#define REG_HI4Q_TXBD_NUM 0x0394 // 2 Bytes
|
||||
#define REG_HI5Q_TXBD_NUM 0x0396 // 2 Bytes
|
||||
#define REG_HI6Q_TXBD_NUM 0x0398 // 2 Bytes
|
||||
#define REG_HI7Q_TXBD_NUM 0x039A // 2 Bytes
|
||||
|
||||
#define REG_BD_RWPTR_CLR 0x039C // 4 Bytes
|
||||
#define REG_VOQ_TXBD_IDX 0x03A0 // 4 Bytes
|
||||
#define REG_VIQ_TXBD_IDX 0x03A4 // 4 Bytes
|
||||
#define REG_BEQ_TXBD_IDX 0x03A8 // 4 Bytes
|
||||
#define REG_BKQ_TXBD_IDX 0x03AC // 4 Bytes
|
||||
#define REG_MGQ_TXBD_IDX 0x03B0 // 4 Bytes
|
||||
#define REG_RXQ_RXBD_IDX 0x03B4 // 4 Bytes
|
||||
#define REG_HI0Q_TXBD_IDX 0x03B8 // 4 Bytes
|
||||
#define REG_HI1Q_TXBD_IDX 0x03BC // 4 Bytes
|
||||
#define REG_HI2Q_TXBD_IDX 0x03C0 // 4 Bytes
|
||||
#define REG_HI3Q_TXBD_IDX 0x03C4 // 4 Bytes
|
||||
#define REG_HI4Q_TXBD_IDX 0x03C8 // 4 Bytes
|
||||
#define REG_HI5Q_TXBD_IDX 0x03CC // 4 Bytes
|
||||
#define REG_HI6Q_TXBD_IDX 0x03D0 // 4 Bytes
|
||||
#define REG_HI7Q_TXBD_IDX 0x03D4 // 4 Bytes
|
||||
#define REG_BD_RWPTR_CLR 0x039C // 4 Bytes
|
||||
#define REG_VOQ_TXBD_IDX 0x03A0 // 4 Bytes
|
||||
#define REG_VIQ_TXBD_IDX 0x03A4 // 4 Bytes
|
||||
#define REG_BEQ_TXBD_IDX 0x03A8 // 4 Bytes
|
||||
#define REG_BKQ_TXBD_IDX 0x03AC // 4 Bytes
|
||||
#define REG_MGQ_TXBD_IDX 0x03B0 // 4 Bytes
|
||||
#define REG_RXQ_RXBD_IDX 0x03B4 // 4 Bytes
|
||||
#define REG_HI0Q_TXBD_IDX 0x03B8 // 4 Bytes
|
||||
#define REG_HI1Q_TXBD_IDX 0x03BC // 4 Bytes
|
||||
#define REG_HI2Q_TXBD_IDX 0x03C0 // 4 Bytes
|
||||
#define REG_HI3Q_TXBD_IDX 0x03C4 // 4 Bytes
|
||||
#define REG_HI4Q_TXBD_IDX 0x03C8 // 4 Bytes
|
||||
#define REG_HI5Q_TXBD_IDX 0x03CC // 4 Bytes
|
||||
#define REG_HI6Q_TXBD_IDX 0x03D0 // 4 Bytes
|
||||
#define REG_HI7Q_TXBD_IDX 0x03D4 // 4 Bytes
|
||||
|
||||
//CPWM &RPWM
|
||||
#define REG_LX_HRPWM_8711B 0x03D9 // 1 Bytes
|
||||
#define REG_LX_HCPWM_8711B 0x03DA // 1 Bytes //from 0x14c
|
||||
#define REG_LX_HRPWM_8711B 0x03D9 // 1 Bytes
|
||||
#define REG_LX_HCPWM_8711B 0x03DA // 1 Bytes //from 0x14c
|
||||
|
||||
#define REG_LX_CTRL2 0x03DB // 1 Bytes
|
||||
#define REG_LX_CTRL2 0x03DB // 1 Bytes
|
||||
|
||||
#define REG_LX_HRPWM2_8711B 0x03DC // 2 Bytes //REG_LX_HCPWM1_8711B
|
||||
#define REG_LX_HCPWM2_8711B 0x03DE // 2 Bytes
|
||||
#define REG_LX_HRPWM2_8711B 0x03DC // 2 Bytes //REG_LX_HCPWM1_8711B
|
||||
#define REG_LX_HCPWM2_8711B 0x03DE // 2 Bytes
|
||||
#define REG_LX_H2C_MSG_V1 0x03E0 // 4 Bytes
|
||||
#define REG_LX_C2H_MSG_V1 0x03E4 // 4 Bytes
|
||||
|
||||
|
||||
#define REG_LX_DMA_ISR 0x03E8 // 4 Bytes
|
||||
#define REG_LX_DMA_IMR 0x03EC // 4 Bytes
|
||||
#define REG_LX_DMA_DBG 0x03F0 // 4 Bytes
|
||||
#define REG_LX_DMA_ISR 0x03E8 // 4 Bytes
|
||||
#define REG_LX_DMA_IMR 0x03EC // 4 Bytes
|
||||
#define REG_LX_DMA_DBG 0x03F0 // 4 Bytes
|
||||
|
||||
#define REG_BUS_MIX_CFG 0x03F8 // 4 Bytes#
|
||||
#define REG_BUS_MIX_CFG1 0x03FC // 4 Bytes
|
||||
#define REG_BUS_MIX_CFG 0x03F8 // 4 Bytes#
|
||||
#define REG_BUS_MIX_CFG1 0x03FC // 4 Bytes
|
||||
|
||||
//-----------------------------------------------------
|
||||
//
|
||||
// 0x0400h ~ 0x047Fh Protocol Configuration
|
||||
//
|
||||
//-----------------------------------------------------
|
||||
#define REG_VOQ_INFORMATION 0x0400
|
||||
#define REG_VIQ_INFORMATION 0x0404
|
||||
#define REG_BEQ_INFORMATION 0x0408
|
||||
#define REG_BKQ_INFORMATION 0x040C
|
||||
#define REG_MGQ_INFORMATION 0x0410
|
||||
#define REG_HGQ_INFORMATION 0x0414
|
||||
#define REG_VOQ_INFORMATION 0x0400
|
||||
#define REG_VIQ_INFORMATION 0x0404
|
||||
#define REG_BEQ_INFORMATION 0x0408
|
||||
#define REG_BKQ_INFORMATION 0x040C
|
||||
#define REG_MGQ_INFORMATION 0x0410
|
||||
#define REG_HGQ_INFORMATION 0x0414
|
||||
#define REG_BCNQ_INFORMATION 0x0418
|
||||
#define REG_TXPKT_EMPTY 0x041A
|
||||
#define REG_CPU_MGQ_INFORMATION 0x041C
|
||||
#define REG_TXPKT_EMPTY 0x041A
|
||||
#define REG_CPU_MGQ_INFORMATION 0x041C
|
||||
#define REG_FWHW_TXQ_CTRL 0x0420
|
||||
#define REG_HWSEQ_CTRL 0x0423
|
||||
#define REG_BCNQ_BDNY 0x0424
|
||||
|
|
@ -314,8 +314,8 @@
|
|||
#define REG_BCNQ1_BDNY 0x0457
|
||||
|
||||
#define REG_AGGLEN_LMT 0x0458
|
||||
#define REG_AMPDU_MIN_SPACE 0x045C
|
||||
#define REG_WMAC_LBK_BF_HD 0x045D
|
||||
#define REG_AMPDU_MIN_SPACE 0x045C
|
||||
#define REG_WMAC_LBK_BF_HD 0x045D
|
||||
#define REG_FAST_EDCA_CTRL 0x0460
|
||||
#define REG_RD_RESP_PKT_TH 0x0463
|
||||
|
||||
|
|
@ -326,24 +326,24 @@
|
|||
|
||||
#define REG_POWER_STAGE1 0x04B4
|
||||
#define REG_POWER_STAGE2 0x04B8
|
||||
#define REG_PKT_VO_VI_LIFE_TIME 0x04C0
|
||||
#define REG_PKT_BE_BK_LIFE_TIME 0x04C2
|
||||
#define REG_PKT_VO_VI_LIFE_TIME 0x04C0
|
||||
#define REG_PKT_BE_BK_LIFE_TIME 0x04C2
|
||||
#define REG_STBC_SETTING 0x04C4
|
||||
#define REG_QUEUE_CTRL 0x04C6
|
||||
#define REG_SINGLE_AMPDU_CTRL 0x04c7
|
||||
#define REG_PROT_MODE_CTRL 0x04C8
|
||||
#define REG_PROT_MODE_CTRL 0x04C8
|
||||
#define REG_MAX_AGGR_NUM 0x04CA
|
||||
#define REG_RTS_MAX_AGGR_NUM 0x04CB
|
||||
#define REG_BAR_MODE_CTRL 0x04CC
|
||||
#define REG_RA_TRY_RATE_AGG_LMT 0x04CF
|
||||
#define REG_RA_TRY_RATE_AGG_LMT 0x04CF
|
||||
//#define REG_EARLY_MODE_CONTROL 0x04D0
|
||||
#define REG_MACID_SLEEP_2 0x04D0
|
||||
#define REG_MACID_SLEEP 0x04D4
|
||||
#define REG_MACID_SLEEP_2 0x04D0
|
||||
#define REG_MACID_SLEEP 0x04D4
|
||||
#define REG_NQOS_SEQ 0x04DC
|
||||
#define REG_QOS_SEQ 0x04DE
|
||||
#define REG_NEED_CPU_HANDLE 0x04E0
|
||||
#define REG_QOS_SEQ 0x04DE
|
||||
#define REG_NEED_CPU_HANDLE 0x04E0
|
||||
#define REG_PKT_LOSE_RPT 0x04E1
|
||||
#define REG_PTCL_ERR_STATUS 0x04E2
|
||||
#define REG_PTCL_ERR_STATUS 0x04E2
|
||||
#define REG_TX_RPT_CTRL 0x04EC
|
||||
#define REG_TX_RPT_TIME 0x04F0 // 2 byte
|
||||
#define REG_DUMMY 0x04FC
|
||||
|
|
@ -358,12 +358,12 @@
|
|||
#define REG_EDCA_BE_PARAM 0x0508
|
||||
#define REG_EDCA_BK_PARAM 0x050C
|
||||
#define REG_BCNTCFG 0x0510
|
||||
#define REG_PIFS 0x0512
|
||||
#define REG_PIFS 0x0512
|
||||
#define REG_RDG_PIFS 0x0513
|
||||
#define REG_SIFS_CTX 0x0514
|
||||
#define REG_SIFS_TRX 0x0516
|
||||
#define REG_TSFTR_SYN_OFFSET 0x0518
|
||||
#define REG_AGGR_BREAK_TIME 0x051A
|
||||
#define REG_AGGR_BREAK_TIME 0x051A
|
||||
#define REG_SLOT 0x051B
|
||||
#define REG_TX_PTCL_CTRL 0x0520
|
||||
#define REG_TXPAUSE 0x0522
|
||||
|
|
@ -394,9 +394,9 @@
|
|||
#define REG_BCN_INTERVAL 0x0554 // The same as REG_MBSSID_BCN_SPACE
|
||||
#define REG_DRVERLYINT 0x0558
|
||||
#define REG_BCNDMATIM 0x0559
|
||||
#define REG_ATIMWND 0x055A
|
||||
#define REG_ATIMWND 0x055A
|
||||
#define REG_USTIME_TSF 0x055C
|
||||
#define REG_BCN_MAX_ERR 0x055D
|
||||
#define REG_BCN_MAX_ERR 0x055D
|
||||
#define REG_RXTSF_OFFSET_CCK 0x055E
|
||||
#define REG_RXTSF_OFFSET_OFDM 0x055F
|
||||
#define REG_TSFTR 0x0560
|
||||
|
|
@ -408,17 +408,17 @@
|
|||
#define REG_TIMER1 0x0588
|
||||
#define REG_ACMHWCTRL 0x05C0
|
||||
#define REG_NOA_DESC_SEL 0x05CF
|
||||
#define REG_NOA_DESC_DURATION 0x05E0
|
||||
#define REG_NOA_DESC_DURATION 0x05E0
|
||||
#define REG_NOA_DESC_INTERVAL 0x05E4
|
||||
#define REG_NOA_DESC_START 0x05E8
|
||||
#define REG_NOA_DESC_COUNT 0x05EC
|
||||
#define REG_NOA_DESC_START 0x05E8
|
||||
#define REG_NOA_DESC_COUNT 0x05EC
|
||||
|
||||
#define REG_DMC 0x05F0 //Dual MAC Co-Existence Register
|
||||
#define REG_SCH_TX_CMD 0x05F8
|
||||
|
||||
#define REG_FW_RESET_TSF_CNT_1 0x05FC
|
||||
#define REG_FW_RESET_TSF_CNT_0 0x05FD
|
||||
#define REG_FW_BCN_DIS_CNT 0x05FE
|
||||
#define REG_FW_RESET_TSF_CNT_1 0x05FC
|
||||
#define REG_FW_RESET_TSF_CNT_0 0x05FD
|
||||
#define REG_FW_BCN_DIS_CNT 0x05FE
|
||||
|
||||
//-----------------------------------------------------
|
||||
//
|
||||
|
|
@ -430,7 +430,7 @@
|
|||
#define REG_TCR 0x0604
|
||||
#define REG_RCR 0x0608
|
||||
#define REG_RX_PKT_LIMIT 0x060C
|
||||
#define REG_RX_DLK_TIME 0x060D
|
||||
#define REG_RX_DLK_TIME 0x060D
|
||||
#define REG_RX_DRVINFO_SZ 0x060F
|
||||
|
||||
#define REG_MACID 0x0610
|
||||
|
|
@ -438,15 +438,15 @@
|
|||
#define REG_MAR 0x0620
|
||||
#define REG_MBIDCAMCFG 0x0628
|
||||
|
||||
#define REG_USTIME_EDCA 0x0638
|
||||
#define REG_USTIME_EDCA 0x0638
|
||||
#define REG_MAC_SPEC_SIFS 0x063A
|
||||
// 20100719 Joseph: Hardware register definition change. (HW datasheet v54)
|
||||
#define REG_RESP_SIFS_CCK 0x063C // [15:8]SIFS_R2T_OFDM, [7:0]SIFS_R2T_CCK
|
||||
#define REG_RESP_SIFS_OFDM 0x063E // [15:8]SIFS_T2T_OFDM, [7:0]SIFS_T2T_CCK
|
||||
#define REG_RESP_SIFS_OFDM 0x063E // [15:8]SIFS_T2T_OFDM, [7:0]SIFS_T2T_CCK
|
||||
|
||||
#define REG_ACKTO 0x0640
|
||||
#define REG_CTS2TO 0x0641
|
||||
#define REG_EIFS 0x0642
|
||||
#define REG_EIFS 0x0642
|
||||
|
||||
#define REG_PORT_CTRL 0x076D
|
||||
|
||||
|
|
@ -454,19 +454,19 @@
|
|||
#define RXERR_TYPE_OFDM_PPDU 0
|
||||
#define RXERR_TYPE_OFDM_FALSE_ALARM 1
|
||||
#define RXERR_TYPE_OFDM_MPDU_OK 2
|
||||
#define RXERR_TYPE_OFDM_MPDU_FAIL 3
|
||||
#define RXERR_TYPE_OFDM_MPDU_FAIL 3
|
||||
#define RXERR_TYPE_CCK_PPDU 4
|
||||
#define RXERR_TYPE_CCK_FALSE_ALARM 5
|
||||
#define RXERR_TYPE_CCK_MPDU_OK 6
|
||||
#define RXERR_TYPE_CCK_FALSE_ALARM 5
|
||||
#define RXERR_TYPE_CCK_MPDU_OK 6
|
||||
#define RXERR_TYPE_CCK_MPDU_FAIL 7
|
||||
#define RXERR_TYPE_HT_PPDU 8
|
||||
#define RXERR_TYPE_HT_FALSE_ALARM 9
|
||||
#define RXERR_TYPE_HT_FALSE_ALARM 9
|
||||
#define RXERR_TYPE_HT_MPDU_TOTAL 10
|
||||
#define RXERR_TYPE_HT_MPDU_OK 11
|
||||
#define RXERR_TYPE_HT_MPDU_FAIL 12
|
||||
#define RXERR_TYPE_RX_FULL_DROP 15
|
||||
|
||||
#define RXERR_COUNTER_MASK 0xFFFFF
|
||||
#define RXERR_COUNTER_MASK 0xFFFFF
|
||||
#define RXERR_RPT_RST BIT(27)
|
||||
#define _RXERR_RPT_SEL(type) ((type) << 28)
|
||||
|
||||
|
|
@ -493,7 +493,7 @@
|
|||
// Security
|
||||
#define REG_CAMCMD 0x0670
|
||||
#define REG_CAMWRITE 0x0674
|
||||
#define REG_CAMREAD 0x0678
|
||||
#define REG_CAMREAD 0x0678
|
||||
#define REG_CAMDBG 0x067C
|
||||
#define REG_SECCFG 0x0680
|
||||
|
||||
|
|
@ -501,13 +501,13 @@
|
|||
#define REG_WOW_CTRL 0x0690
|
||||
#define REG_PS_RX_INFO 0x0692
|
||||
#define REG_UAPSD_TID 0x0693
|
||||
#define REG_WKFMCAM_CMD 0x0698
|
||||
#define REG_WKFMCAM_NUM REG_WKFMCAM_CMD
|
||||
#define REG_WKFMCAM_RWD 0x069C
|
||||
#define REG_WKFMCAM_CMD 0x0698
|
||||
#define REG_WKFMCAM_NUM REG_WKFMCAM_CMD
|
||||
#define REG_WKFMCAM_RWD 0x069C
|
||||
#define REG_RXFLTMAP0 0x06A0
|
||||
#define REG_RXFLTMAP1 0x06A2
|
||||
#define REG_RXFLTMAP2 0x06A4
|
||||
#define REG_BCN_PSR_RPT 0x06A8
|
||||
#define REG_BCN_PSR_RPT 0x06A8
|
||||
#define REG_BT_COEX_TABLE 0x06C0
|
||||
|
||||
// Hardware Port 2
|
||||
|
|
@ -515,7 +515,7 @@
|
|||
#define REG_BSSID1 0x0708
|
||||
|
||||
/* port0 & port1 enable */
|
||||
#define REG_PORT_CTRL 0x76D
|
||||
// #define REG_PORT_CTRL 0x76D
|
||||
|
||||
//-----------------------------------------------------
|
||||
//
|
||||
|
|
@ -523,8 +523,8 @@
|
|||
//
|
||||
//-----------------------------------------------------
|
||||
#define REG_USB_INFO 0xFE17
|
||||
#define REG_USB_SPECIAL_OPTION 0xFE55
|
||||
#define REG_USB_DMA_AGG_TO 0xFE5B
|
||||
#define REG_USB_SPECIAL_OPTION 0xFE55
|
||||
#define REG_USB_DMA_AGG_TO 0xFE5B
|
||||
#define REG_USB_AGG_TO 0xFE5C
|
||||
#define REG_USB_AGG_TH 0xFE5D
|
||||
|
||||
|
|
@ -872,7 +872,7 @@ Default: 00b.
|
|||
#define IMR_PSTIMEOUT BIT14 // Power save time out interrupt
|
||||
#define IMR_BcnInt BIT13 // Beacon DMA Interrupt 0
|
||||
#define IMR_RXFOVW BIT12 // Receive FIFO Overflow
|
||||
#define IMR_RDU BIT11 // Receive Descriptor Unavailable
|
||||
#define IMR_RDU_ BIT11 // Receive Descriptor Unavailable
|
||||
#define IMR_ATIMEND BIT10 // For 92C,ATIM Window End Interrupt. For 8723 and later ICs, it also means P2P CTWin End interrupt.
|
||||
#define IMR_BDOK BIT9 // Beacon Queue DMA OK Interrup
|
||||
#define IMR_HIGHDOK BIT8 // High Queue DMA OK Interrupt
|
||||
|
|
|
|||
|
|
@ -846,7 +846,7 @@ __inline static union recv_frame *rxmem_to_recvframe(u8 *rxmem)
|
|||
|
||||
__inline static union recv_frame *pkt_to_recvframe(_pkt *pkt)
|
||||
{
|
||||
|
||||
(void) pkt;
|
||||
u8 * buf_star = NULL;
|
||||
union recv_frame * precv_frame = NULL;
|
||||
#ifdef PLATFORM_WINDOWS
|
||||
|
|
|
|||
|
|
@ -143,8 +143,8 @@ void list_add(struct list_head *new, struct list_head *head);
|
|||
void list_add_tail(struct list_head *new, struct list_head *head);
|
||||
#endif
|
||||
|
||||
extern void save_and_cli(void);
|
||||
extern void restore_flags(void);
|
||||
//extern void save_and_cli(void);
|
||||
//extern void restore_flags(void);
|
||||
//----- ------------------------------------------------------------------
|
||||
// SKB Operation
|
||||
//----- ------------------------------------------------------------------
|
||||
|
|
|
|||
|
|
@ -133,7 +133,7 @@ void rltk_wlan_recv(int idx, struct eth_drv_sg *sg_list, int sg_len)
|
|||
|
||||
DBG_TRACE("%s is called", __FUNCTION__);
|
||||
|
||||
if (!rltk_wlan_check_isup(idx))
|
||||
if (rltk_wlan_check_isup(idx) == 0)
|
||||
return;
|
||||
|
||||
if(idx == -1){
|
||||
|
|
|
|||
|
|
@ -13,6 +13,8 @@
|
|||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
#include "FreeRTOS.h"
|
||||
#include "task.h"
|
||||
#include "wait_api.h"
|
||||
#include "us_ticker_api.h"
|
||||
|
||||
|
|
@ -79,6 +81,7 @@ typedef struct
|
|||
#define CoreDebug_DEMCR_TRCENA_Msk (1UL << CoreDebug_DEMCR_TRCENA_Pos) /*!< CoreDebug DEMCR: TRCENA Mask */
|
||||
#endif
|
||||
|
||||
|
||||
void wait(float s) { // До 1073741 секунд? 298 часов
|
||||
// wait_us((int)(s * 1000000.0f));
|
||||
vTaskDelay((int)(s * 1000.0f));
|
||||
|
|
|
|||
|
|
@ -17,9 +17,9 @@ extern "C" {
|
|||
#include <queue.h>
|
||||
|
||||
//-----------------------------------------------------------------------------
|
||||
#ifndef FLASH_SECTOR_SIZE
|
||||
#define FLASH_SECTOR_SIZE 4096
|
||||
#endif
|
||||
//#ifndef FLASH_SECTOR_SIZE
|
||||
// #define FLASH_SECTOR_SIZE 4096
|
||||
//#endif
|
||||
#define FLASH_SECTORS 256 // 1 Mbytes
|
||||
#define FLASH_CHIP_SIZE (FLASH_SECTORS * FLASH_SECTOR_SIZE)
|
||||
#define FMEMORY_SCFG_BANK_SIZE FLASH_SECTOR_SIZE // размер сектора, 4096 bytes
|
||||
|
|
|
|||
|
|
@ -194,7 +194,7 @@ typedef enum {
|
|||
PWM_OUT = PD_4,
|
||||
*/
|
||||
// Not connected
|
||||
NC = (uint32_t)0xFFFFFFFF
|
||||
NC = -1 // (uint32_t)0xFFFFFFFF
|
||||
} PinName;
|
||||
|
||||
typedef enum {
|
||||
|
|
|
|||
|
|
@ -124,7 +124,7 @@ float analogin_read(analogin_t *obj){
|
|||
unsigned short us[4];
|
||||
} adata;
|
||||
PSAL_ADC_HND p = &((&(obj->SalADCMngtAdpt))->pSalHndPriv->SalADCHndPriv);
|
||||
RtkADCReceiveBuf(p, &adata.ui);
|
||||
RtkADCReceiveBuf(p, (u32 *) &adata.ui);
|
||||
return (float)(adata.us[p->DevNum]) / (float)(0xCE80);
|
||||
/*
|
||||
uint32_t AnaloginTmp[2] = {0,0};
|
||||
|
|
@ -161,7 +161,7 @@ uint16_t analogin_read_u16(analogin_t *obj){
|
|||
unsigned short us[4];
|
||||
} adata;
|
||||
PSAL_ADC_HND p = &((&(obj->SalADCMngtAdpt))->pSalHndPriv->SalADCHndPriv);
|
||||
RtkADCRxManualRotate(p, &adata.ui);
|
||||
RtkADCRxManualRotate(p, (u32 *) &adata.ui);
|
||||
return adata.us[p->DevNum];
|
||||
/*
|
||||
uint32_t AnaloginTmp[2] = {0,0};
|
||||
|
|
|
|||
|
|
@ -592,6 +592,8 @@ unsigned int flash_get_size(flash_t *obj) {
|
|||
/*
|
||||
* Read Flash OTP data
|
||||
*/
|
||||
extern void SpicTxCmdWithDataRtl8195A(u8 cmd, u8 DataPhaseLen, u8* pData, SPIC_INIT_PARA SpicInitPara);
|
||||
|
||||
int flash_otp_read(flash_t *obj, uint32_t address, uint32_t Length,
|
||||
uint8_t * data) {
|
||||
int ret = 1;
|
||||
|
|
|
|||
|
|
@ -350,7 +350,7 @@ LOCAL FLASH_EEP_ATTR unsigned int pack_cfg_fmem(fobj_head obj)
|
|||
#if 0
|
||||
copy_align4_to_align1((uint8 *)pbuf, rdaddr, len);
|
||||
#else
|
||||
SpicUserReadFourByteRtl8195A(len, rdaddr, (unsigned int *)pbuf, flashobj.SpicInitPara.Mode.BitMode);
|
||||
SpicUserReadFourByteRtl8195A(len, rdaddr, (u32 *)pbuf, flashobj.SpicInitPara.Mode.BitMode);
|
||||
#endif
|
||||
int i = 0;
|
||||
int size4b = len >> 2;
|
||||
|
|
|
|||
|
|
@ -44,6 +44,8 @@ const PinMap PinMap_PWM[] = {
|
|||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
extern void * rtl_memset(void * m , int c , size_t n);
|
||||
|
||||
int pwmout_init(pwmout_t* obj, PinName pin)
|
||||
{
|
||||
uint32_t peripheral;
|
||||
|
|
|
|||
|
|
@ -26,11 +26,16 @@
|
|||
#define OTA_Signature_len 8
|
||||
#define OTA_Signature_offset 8
|
||||
#define OTA_valid_offset 0x100000
|
||||
|
||||
#undef printf
|
||||
#define printf DiagPrintf
|
||||
|
||||
#if !defined(__ICCARM__)
|
||||
#undef memcmp
|
||||
#define memcmp(dst, src, sz) _memcmp(dst, src, sz)
|
||||
#undef memset
|
||||
#define memset(dst, val, sz) _memset(dst, val, sz)
|
||||
#undef memcpy
|
||||
#define memcpy(dst, src, sz) _memcpy(dst, src, sz)
|
||||
#endif // #if !defined(__ICCARM__)
|
||||
|
||||
|
|
|
|||
|
|
@ -30,8 +30,8 @@
|
|||
#define DHCP_MESSAGE_HTYPE (1)
|
||||
#define DHCP_MESSAGE_HLEN (6)
|
||||
|
||||
#define DHCP_SERVER_PORT (67)
|
||||
#define DHCP_CLIENT_PORT (68)
|
||||
//#define DHCP_SERVER_PORT (67) // in dhcp.h
|
||||
//#define DHCP_CLIENT_PORT (68) // in dhcp.h
|
||||
|
||||
#define DHCP_MESSAGE_TYPE_DISCOVER (1)
|
||||
#define DHCP_MESSAGE_TYPE_OFFER (2)
|
||||
|
|
|
|||
|
|
@ -91,9 +91,11 @@ static void arp_timer(void *arg);
|
|||
|
||||
#if LWIP_NETIF_HOSTNAME
|
||||
char lwip_host_name[NET_IF_NUM][LWIP_NETIF_HOSTNAME_SIZE] = {
|
||||
DEF_HOSTNAME"0",
|
||||
DEF_HOSTNAME"1",
|
||||
DEF_HOSTNAME"2"
|
||||
{ DEF_HOSTNAME "0" },
|
||||
{ DEF_HOSTNAME "1" }
|
||||
#if NET_IF_NUM > 2
|
||||
,{ DEF_HOSTNAME "2" }
|
||||
#endif
|
||||
};
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -128,7 +128,9 @@ struct netif *
|
|||
ip_route(ip_addr_t *dest)
|
||||
{
|
||||
struct netif *netif;
|
||||
#if CONFIG_ETHERNET
|
||||
struct netif *last_netif = NULL;
|
||||
#endif
|
||||
|
||||
#ifdef LWIP_HOOK_IP4_ROUTE
|
||||
netif = LWIP_HOOK_IP4_ROUTE(dest);
|
||||
|
|
|
|||
|
|
@ -217,10 +217,12 @@ u8_t ip4_addr_netmask_valid(u32_t netmask);
|
|||
ipaddr != NULL ? ip4_addr4_16(ipaddr) : 0))
|
||||
|
||||
/* Get one byte from the 4-byte address */
|
||||
#ifndef ip4_addr1
|
||||
#define ip4_addr1(ipaddr) (((u8_t*)(ipaddr))[0])
|
||||
#define ip4_addr2(ipaddr) (((u8_t*)(ipaddr))[1])
|
||||
#define ip4_addr3(ipaddr) (((u8_t*)(ipaddr))[2])
|
||||
#define ip4_addr4(ipaddr) (((u8_t*)(ipaddr))[3])
|
||||
#endif
|
||||
/* These are cast to u16_t, with the intent that they are often arguments
|
||||
* to printf using the U16_F format from cc.h. */
|
||||
#define ip4_addr1_16(ipaddr) ((u16_t)ip4_addr1(ipaddr))
|
||||
|
|
|
|||
|
|
@ -163,9 +163,9 @@ PACK_STRUCT_END
|
|||
# include "arch/epstruct.h"
|
||||
#endif
|
||||
|
||||
//#define toupper(CH) \
|
||||
// (((CH) >= 'a' && (CH) <= 'z') ? ((CH) - 'a' + 'A') : (CH))
|
||||
//#define toupper(CH) (((CH) >= 'a' && (CH) <= 'z') ? ((CH) - 'a' + 'A') : (CH))
|
||||
|
||||
extern int toupper(int ch);
|
||||
|
||||
/** NetBIOS decoding name */
|
||||
static int8_t NETBIOS_CODE_ATTR NBNS_decode(char *dst, char *src)
|
||||
|
|
@ -226,7 +226,7 @@ netbios_recv(void *arg, struct udp_pcb *upcb, struct pbuf *p, ip_addr_t *addr,
|
|||
if (current_netif != NULL && current_netif->num < NET_IF_NUM) {
|
||||
uint32 ip = current_netif->ip_addr.addr;
|
||||
char *curbiosname = netbios_name[current_netif->num];
|
||||
if (curbiosname[0] != '\0' && ip != NULL
|
||||
if (curbiosname[0] != '\0' && ip != 0
|
||||
/* we only answer if we got a default interface */
|
||||
&& (((ip ^ addr->addr) & current_netif->netmask.addr) == 0)) { // запрет ответа другой подсети
|
||||
#if DEBUGSOO > 3
|
||||
|
|
|
|||
|
|
@ -159,7 +159,7 @@ void sntp_get_lasttime(long *sec, long *usec, unsigned int *tick)
|
|||
|
||||
time_t sntp_gen_system_time(int timezone)
|
||||
{
|
||||
struct tm current_tm;
|
||||
// struct tm current_tm;
|
||||
unsigned int update_tick;
|
||||
long update_sec, update_usec, current_sec = 0;
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue