mirror of
https://github.com/pvvx/RTL00_WEB.git
synced 2024-11-22 05:54:19 +00:00
add set mac, cmsis-dap load sdram, ...
This commit is contained in:
parent
0830a1244a
commit
b381813514
27 changed files with 255 additions and 88 deletions
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@ -1269,20 +1269,21 @@ void fATFO(void *arg) {
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rdsize = size;
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rdsize = size;
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else
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else
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rdsize = 8 * symbs_line;
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rdsize = 8 * symbs_line;
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flash_otp_read(&flashobj, addr, rdsize, flash_data);
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if (flash_otp_read(&flashobj, addr, rdsize, flash_data)) {
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uint8_t *ptr = flash_data;
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uint8_t *ptr = flash_data;
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while (ptr < flash_data + rdsize) {
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while (ptr < flash_data + rdsize) {
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if (symbs_line > size)
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if (symbs_line > size)
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symbs_line = size;
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symbs_line = size;
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printf("%08X ", addr);
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printf("%08X ", addr);
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print_hex_dump(ptr, symbs_line, ' ');
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print_hex_dump(ptr, symbs_line, ' ');
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printf("\r\n");
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printf("\r\n");
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addr += symbs_line;
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addr += symbs_line;
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ptr += symbs_line;
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ptr += symbs_line;
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size -= symbs_line;
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size -= symbs_line;
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if (size == 0)
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if (size == 0)
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break;
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break;
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}
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}
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} else break;
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}
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}
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free(flash_data);
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free(flash_data);
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}
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}
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@ -635,10 +635,38 @@ int wifi_is_ready_to_transceive(rtw_interface_t interface) {
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}
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}
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//----------------------------------------------------------------------------//
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//----------------------------------------------------------------------------//
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int wifi_set_mac_address(char * mac) {
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int mactostr(char * s, unsigned char *mac, bool fmt)
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char buf[13 + 17 + 1];
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{
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rtw_memset(buf, 0, sizeof(buf));
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char *ptrb = s;
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snprintf(buf, 13 + 17, "write_mac %s", mac);
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unsigned char *ptrm = mac;
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int i = 6;
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while(i--) {
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unsigned char x = ptrm[0] >> 4;
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if (x <= 9) ptrb[0] = x + '0';
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else ptrb[0] = x - 10 + 'a';
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ptrb++;
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x = ptrm[0] & 0x0f;
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if (x <= 9) ptrb[0] = x + '0';
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else ptrb[0] = x - 10 + 'a';
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ptrb++;
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ptrm++;
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if(fmt && i) {
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ptrb[0] = ':';
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ptrb++;
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}
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};
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*ptrb = '\0';
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if (fmt) return 12+5;
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return 12;
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}
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//----------------------------------------------------------------------------//
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int wifi_set_mac_address(char * new_mac) {
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// char buf[13 + 17 + 1];
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char buf[10 + 12 + 1];
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memcpy(buf,"write_mac ", 10);
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// snprintf(buf, 13 + 17, "write_mac %s", mac);
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//BAG NotWork! rtl_sprintf(buf, "write_mac %02x%02x%02x%02x%02x%02x", new_mac[0], new_mac[1], new_mac[2], new_mac[3], new_mac[4], new_mac[5]);
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mactostr(&buf[10], new_mac, false);
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return wext_private_command(WLAN0_NAME, buf, SHOW_PRIVATE_OUT);
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return wext_private_command(WLAN0_NAME, buf, SHOW_PRIVATE_OUT);
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}
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}
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@ -703,6 +703,8 @@ int wifi_disable_packet_filter(unsigned char filter_id);
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int wifi_remove_packet_filter(unsigned char filter_id);
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int wifi_remove_packet_filter(unsigned char filter_id);
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#endif
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#endif
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int mactostr(char * s, unsigned char *mac, bool fmt);
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#ifdef __cplusplus
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#ifdef __cplusplus
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}
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}
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#endif
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#endif
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@ -237,7 +237,7 @@ int wext_set_mac_address(const char *ifname, char * mac)
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{
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{
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char buf[13+17+1];
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char buf[13+17+1];
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memset(buf, 0, sizeof(buf));
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memset(buf, 0, sizeof(buf));
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snprintf(buf, 13+17, "write_mac %s", mac);
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snprintf(buf, 13+17, "write_mac %02x%02x%02x%02x%02x%02x", mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
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return wext_private_command(ifname, buf, 0);
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return wext_private_command(ifname, buf, 0);
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}
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}
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@ -43,7 +43,7 @@
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#include "main.h"
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#include "main.h"
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#include "wifi_user_set.h"
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#include "wifi_user_set.h"
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#if 0
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#if 1
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#undef debug_printf
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#undef debug_printf
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#define debug_printf(fmt, ...) rtl_printf(fmt, ##__VA_ARGS__)
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#define debug_printf(fmt, ...) rtl_printf(fmt, ##__VA_ARGS__)
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#undef info_printf
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#undef info_printf
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@ -558,7 +558,7 @@ LOCAL int _wifi_on(rtw_mode_t mode) {
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wext_set_adaptivity(wifi_cfg.adaptivity & 3);
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wext_set_adaptivity(wifi_cfg.adaptivity & 3);
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debug_printf("Wlan0 init...\n");
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debug_printf("Wlan0 init...\n");
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// rltk_wlan_deinit_fastly();
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ret = rltk_wlan_init(WLAN0_IDX, mode); // rtw_mode_t
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ret = rltk_wlan_init(WLAN0_IDX, mode); // rtw_mode_t
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debug_printf("netif_set_up 0...\n");
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debug_printf("netif_set_up 0...\n");
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@ -284,10 +284,10 @@ int uartadapter_uart_open(ua_socket_t *ua_socket, ua_uart_set_str *puartpara)
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#define txflow UA_UART_CTS_PIN
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#define txflow UA_UART_CTS_PIN
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if(puartpara->FlowControl){
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if(puartpara->FlowControl){
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pin_mode(txflow, PullDown); // init CTS in low
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pin_mode(txflow, PullDown); // init CTS in low
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serial_set_flow_control(&ua_socket->uart.uart_sobj, FlowControlRTSCTS, rxflow, txflow);
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serial_set_flow_control(&ua_socket->uart.uart_sobj, FlowControlRTSCTS);//, rxflow, txflow);
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}
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}
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else
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else
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serial_set_flow_control(&ua_socket->uart.uart_sobj, FlowControlNone, rxflow, txflow);
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serial_set_flow_control(&ua_socket->uart.uart_sobj, FlowControlNone);//, rxflow, txflow);
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//---------------------------- add Flow
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//---------------------------- add Flow
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/*uart irq handle*/
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/*uart irq handle*/
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@ -287,9 +287,9 @@ int reset_uart_atcmd_setting(){
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return 0;
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return 0;
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}
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}
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#ifdef UART_AT_RX_WAKE
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#if defined(configUSE_WAKELOCK_PMU) && (configUSE_WAKELOCK_PMU == 1)
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#if defined(configUSE_WAKELOCK_PMU) && (configUSE_WAKELOCK_PMU == 1)
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#include "gpio_irq_api.h"
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#include "gpio_irq_api.h"
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#define UART_AT_RX_WAKE UART_RX
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void gpio_uart_at_rx_irq_callback (uint32_t id, gpio_irq_event event)
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void gpio_uart_at_rx_irq_callback (uint32_t id, gpio_irq_event event)
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{
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{
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/* WAKELOCK_LOGUART is also handled in log service.
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/* WAKELOCK_LOGUART is also handled in log service.
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@ -301,16 +301,12 @@ void gpio_uart_at_rx_irq_callback (uint32_t id, gpio_irq_event event)
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void uart_at_rx_wakeup()
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void uart_at_rx_wakeup()
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{
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{
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gpio_irq_t gpio_rx_wake;
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gpio_irq_t gpio_rx_wake;
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#ifdef RTL8711AM
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#if (UART_AT_RX_WAKE!=PA_0)||(UART_AT_RX_WAKE!=PE_3)
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#error "Set pin rx_wakeup!"
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#endif
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#endif
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gpio_irq_init(&gpio_rx_wake, UART_AT_RX_WAKE, gpio_uart_at_rx_irq_callback, 0);
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gpio_irq_init(&gpio_rx_wake, UART_AT_RX_WAKE, gpio_uart_at_rx_irq_callback, 0);
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gpio_irq_set(&gpio_rx_wake, IRQ_FALL, 1); // Falling Edge Trigger
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gpio_irq_set(&gpio_rx_wake, IRQ_FALL, 1); // Falling Edge Trigger
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gpio_irq_enable(&gpio_rx_wake);
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gpio_irq_enable(&gpio_rx_wake);
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}
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}
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#endif
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#endif
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#endif // UART_AT_RX_WAKE
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void uart_atcmd_reinit(UART_LOG_CONF* uartconf){
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void uart_atcmd_reinit(UART_LOG_CONF* uartconf){
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serial_baud(&at_cmd_sobj,uartconf->BaudRate);
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serial_baud(&at_cmd_sobj,uartconf->BaudRate);
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@ -318,14 +314,15 @@ void uart_atcmd_reinit(UART_LOG_CONF* uartconf){
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// set flow control, only support RTS and CTS concurrent mode
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// set flow control, only support RTS and CTS concurrent mode
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// rxflow and tx flow is fixed by hardware
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// rxflow and tx flow is fixed by hardware
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#define rxflow UART_RTS
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// unsigned rxflow = UART_RTS;
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#define txflow UART_CTS
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unsigned txflow = UART_CTS;
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if(uartconf->FlowControl){
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if(uartconf->FlowControl){
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pin_mode(txflow, PullDown); //init CTS in low
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pin_mode(txflow, PullDown); //init CTS in low
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serial_set_flow_control(&at_cmd_sobj, FlowControlRTSCTS, rxflow, txflow);
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serial_set_flow_control(&at_cmd_sobj, FlowControlRTSCTS);//, rxflow, txflow);
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}
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}
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else
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else
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serial_set_flow_control(&at_cmd_sobj, FlowControlNone, rxflow, txflow);
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serial_set_flow_control(&at_cmd_sobj, FlowControlNone);//, rxflow, txflow);
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}
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}
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void uart_at_send_string(char *str)
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void uart_at_send_string(char *str)
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@ -535,21 +532,25 @@ void uart_atcmd_main(void)
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{
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{
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UART_LOG_CONF uartconf;
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UART_LOG_CONF uartconf;
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unsigned rx = UART_RX;
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unsigned tx = UART_TX;
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unsigned rxflow = UART_RTS;
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unsigned txflow = UART_CTS;
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read_uart_atcmd_setting_from_system_data(&uartconf);
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read_uart_atcmd_setting_from_system_data(&uartconf);
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serial_init(&at_cmd_sobj, UART_TX, UART_RX);
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serial_init(&at_cmd_sobj, tx, rx);
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printf("tx: %02x, rx: %02x\n", tx, rx);
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serial_baud(&at_cmd_sobj,uartconf.BaudRate);
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serial_baud(&at_cmd_sobj,uartconf.BaudRate);
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serial_format(&at_cmd_sobj, uartconf.DataBits, (SerialParity)uartconf.Parity, uartconf.StopBits);
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serial_format(&at_cmd_sobj, uartconf.DataBits, (SerialParity)uartconf.Parity, uartconf.StopBits);
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serial_rx_fifo_level(&at_cmd_sobj, FifoLvHalf);
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serial_rx_fifo_level(&at_cmd_sobj, FifoLvHalf);
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// set flow control, only support RTS and CTS concurrent mode
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// set flow control, only support RTS and CTS concurrent mode
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// rxflow and tx flow is fixed by hardware
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// rxflow and tx flow is fixed by hardware
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#define rxflow UART_RTS
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#define txflow UART_CTS
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if(uartconf.FlowControl){
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if(uartconf.FlowControl){
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pin_mode(txflow, PullDown); //init CTS in low
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pin_mode(txflow, PullDown); //init CTS in low
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serial_set_flow_control(&at_cmd_sobj, FlowControlRTSCTS, rxflow, txflow);
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serial_set_flow_control(&at_cmd_sobj, FlowControlRTSCTS);//, rxflow, txflow);
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}
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}
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else
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else
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serial_set_flow_control(&at_cmd_sobj, FlowControlNone, rxflow, txflow);
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serial_set_flow_control(&at_cmd_sobj, FlowControlNone);//, rxflow, txflow);
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/*uart_at_lock_init();*/
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/*uart_at_lock_init();*/
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@ -564,9 +565,11 @@ void uart_atcmd_main(void)
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serial_irq_handler(&at_cmd_sobj, uart_irq, (uint32_t)&at_cmd_sobj);
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serial_irq_handler(&at_cmd_sobj, uart_irq, (uint32_t)&at_cmd_sobj);
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serial_irq_set(&at_cmd_sobj, RxIrq, 1);
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serial_irq_set(&at_cmd_sobj, RxIrq, 1);
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#ifdef UART_AT_RX_WAKE
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#if defined(configUSE_WAKELOCK_PMU) && (configUSE_WAKELOCK_PMU == 1)
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#if defined(configUSE_WAKELOCK_PMU) && (configUSE_WAKELOCK_PMU == 1)
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uart_at_rx_wakeup();
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uart_at_rx_wakeup();
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#endif
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#endif
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#endif // UART_AT_RX_WAKE
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}
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}
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static void uart_atcmd_thread(void *param)
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static void uart_atcmd_thread(void *param)
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@ -13,33 +13,45 @@
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#include "osdep_api.h"
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#include "osdep_api.h"
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#if defined(RTL8710AF)
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#if defined(RTL8710AF) && defined(RTL8711AM)
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// RTL8710AF
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#if 0
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#define UART_TX PA_4 // PC_3
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// RTL8711AM + RTL8710AF + RTL8195AM
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#define UART_RX PA_0 // PC_0
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#define UART_TX PE_0
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#define UART_RTS PA_2 // PC_2
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#define UART_RX PE_3
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#define UART_CTS PA_1 // PC_1
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#define UART_AT_RX_WAKE PE_3
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#define UART_RTS PE_1
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#elif 0 // defined(RTL8711AM)
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#define UART_CTS PE_2
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// RTL8711AM
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#elif 0
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#define UART_TX PA_7
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#define UART_RX PA_6 // no Interrupt!
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#define UART_RTS PA_3
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#define UART_CTS PA_5
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#elif 0 // else
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// RTL8711AM + RTL8710AF
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// RTL8711AM + RTL8710AF
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#define UART_TX PC_3
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#define UART_TX PC_3
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#define UART_RX PC_0 // no Interrupt!
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#define UART_RX PC_0 // no Interrupt!
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//#define UART_AT_RX_WAKE PE_3
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#define UART_RTS PC_2
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#define UART_RTS PC_2
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#define UART_CTS PC_1
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#define UART_CTS PC_1
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#elif 1
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// RTL8711AM - RAK473
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#define UART_TX PA_7
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#define UART_RX PA_6 // no Interrupt!
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//#define UART_RX_INT PE_3
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#define UART_RTS PA_3
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#define UART_CTS PA_5
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#endif
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#elif defined(RTL8710AF)
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// RTL8710AF
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#define UART_TX PA_4
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#define UART_RX PA_0
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#define UART_AT_RX_WAKE PA_0
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#define UART_RTS PA_2
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#define UART_CTS PA_1
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#elif defined(RTL8711AM)
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#elif defined(RTL8711AM)
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// RTL8711AM + RTL8710AF
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// RTL8711AM - RAK473
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#define UART_TX PE_0
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#define UART_TX PA_7
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#define UART_RX PE_3
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#define UART_RX PA_6 // no Interrupt!
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#define UART_RTS PE_1
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//#define UART_AT_RX_WAKE PE_3
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#define UART_CTS PE_2
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#define UART_RTS PA_3
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#define UART_CTS PA_5
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#endif
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#endif
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@ -67,7 +67,8 @@ void serial_break_clear(serial_t *obj);
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void serial_pinout_tx(PinName tx);
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void serial_pinout_tx(PinName tx);
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void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow);
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// rxflow and tx flow is fixed by hardware
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void serial_set_flow_control(serial_t *obj, FlowControl type);// PinName rxflow, PinName txflow);
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#ifdef __cplusplus
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#ifdef __cplusplus
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}
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}
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@ -45,6 +45,7 @@ int flash_set_extend_addr (flash_t * obj, uint32_t data);
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int flash_get_extend_addr (flash_t * obj);
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int flash_get_extend_addr (flash_t * obj);
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unsigned int flash_get_size (flash_t *obj);
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unsigned int flash_get_size (flash_t *obj);
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int flash_otp_read (flash_t *obj, uint32_t address, uint32_t Length, uint8_t * data);
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int flash_otp_read (flash_t *obj, uint32_t address, uint32_t Length, uint8_t * data);
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unsigned int flash_read_id (flash_t *obj);
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#ifdef __cplusplus
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#ifdef __cplusplus
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}
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}
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@ -587,6 +587,26 @@ unsigned int flash_get_size(flash_t *obj) {
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return flashchip_size;
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return flashchip_size;
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}
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}
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||||||
|
unsigned int flash_read_id(flash_t *obj)
|
||||||
|
{
|
||||||
|
flash_turnon();
|
||||||
|
/* Disable SPI_FLASH User Mode */
|
||||||
|
HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0);
|
||||||
|
|
||||||
|
/* Set Ctrlr1; 1 byte data frames */
|
||||||
|
HAL_SPI_WRITE32(REG_SPIC_CTRLR1, BIT_NDF(3));
|
||||||
|
|
||||||
|
/* Send flash RX command and read the data */
|
||||||
|
SpicRxCmdRefinedRtl8195A(FLASH_CMD_RDID, obj->SpicInitPara);
|
||||||
|
unsigned int ret = HAL_SPI_READ32(REG_SPIC_DR0);
|
||||||
|
|
||||||
|
/* Disable SPI_FLASH User Mode */
|
||||||
|
HAL_SPI_WRITE32(REG_SPIC_SSIENR, 0);
|
||||||
|
|
||||||
|
SpicDisableRtl8195A();
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Read Flash OTP data
|
* Read Flash OTP data
|
||||||
*/
|
*/
|
||||||
|
@ -619,17 +639,25 @@ int flash_otp_read(flash_t *obj, uint32_t address, uint32_t Length,
|
||||||
flashobj.SpicInitPara.Mode.BitMode);
|
flashobj.SpicInitPara.Mode.BitMode);
|
||||||
SpicTxCmdWithDataRtl8195A(FLASH_CMD_WRDI, 0, 0, flashobj.SpicInitPara); // exit secured OTP
|
SpicTxCmdWithDataRtl8195A(FLASH_CMD_WRDI, 0, 0, flashobj.SpicInitPara); // exit secured OTP
|
||||||
break;
|
break;
|
||||||
|
// case FLASH_OTHERS: // ?
|
||||||
case FLASH_MICRON: // (4Bh) READ OTP ARRAY
|
case FLASH_MICRON: // (4Bh) READ OTP ARRAY
|
||||||
#if CONFIG_DEBUG_LOG > 4
|
#if CONFIG_DEBUG_LOG > 4
|
||||||
DBG_SPIF_INFO("MICRON: @TODO !\n");
|
DBG_SPIF_INFO("MICRON: @TODO !\n");
|
||||||
#endif
|
|
||||||
// FLASH_CMD_ROTPA
|
// FLASH_CMD_ROTPA
|
||||||
ret = 0;
|
#endif
|
||||||
break;
|
|
||||||
default:
|
default:
|
||||||
DBG_8195A("Flash type?");
|
DBG_8195A("Flash type %d [%06x]?\n", flashobj.SpicInitPara.flashtype, flash_read_id(&flashobj));
|
||||||
|
/* Read Flash status reg */
|
||||||
|
/*
|
||||||
|
SpicRxCmdRefinedRtl8195A(0x05, flashobj.SpicInitPara);
|
||||||
|
u16 st = HAL_SPI_READ32(REG_SPIC_DR0);
|
||||||
|
SpicRxCmdRefinedRtl8195A(0x35, flashobj.SpicInitPara);
|
||||||
|
st = (st & 0xFF) | (HAL_SPI_READ32(REG_SPIC_DR0) << 8);
|
||||||
|
DBG_8195A("Flash status: 0x%04x\n", st);
|
||||||
|
*/
|
||||||
ret = 0;
|
ret = 0;
|
||||||
}
|
}
|
||||||
SpicDisableRtl8195A();
|
SpicDisableRtl8195A();
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -436,7 +436,7 @@ void serial_recv_comp_handler(serial_t *obj, void *handler, uint32_t id)
|
||||||
pHalRuartAdapter->RxCompCbPara = (void*)id;
|
pHalRuartAdapter->RxCompCbPara = (void*)id;
|
||||||
}
|
}
|
||||||
|
|
||||||
void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow)
|
void serial_set_flow_control(serial_t *obj, FlowControl type) // , PinName rxflow, PinName txflow)
|
||||||
{
|
{
|
||||||
PHAL_RUART_ADAPTER pHalRuartAdapter;
|
PHAL_RUART_ADAPTER pHalRuartAdapter;
|
||||||
|
|
||||||
|
|
|
@ -609,7 +609,7 @@ SpicReadIDRtl8195A(
|
||||||
SpicInitPara.flashtype = FLASH_MICRON;
|
SpicInitPara.flashtype = FLASH_MICRON;
|
||||||
else if(SpicInitPara.id[0] == 0xC2)
|
else if(SpicInitPara.id[0] == 0xC2)
|
||||||
SpicInitPara.flashtype = FLASH_MXIC;
|
SpicInitPara.flashtype = FLASH_MXIC;
|
||||||
else if(SpicInitPara.id[0] == 0xEF)
|
else if(SpicInitPara.id[0] == 0xEF || SpicInitPara.id[0] == 0xC8) // + GigaDevice
|
||||||
SpicInitPara.flashtype = FLASH_WINBOND;
|
SpicInitPara.flashtype = FLASH_WINBOND;
|
||||||
else
|
else
|
||||||
SpicInitPara.flashtype = FLASH_OTHERS;
|
SpicInitPara.flashtype = FLASH_OTHERS;
|
||||||
|
|
|
@ -182,6 +182,13 @@ else
|
||||||
ifeq ($(FLASHER_TYPE),cmsis-dap)
|
ifeq ($(FLASHER_TYPE),cmsis-dap)
|
||||||
FLASHER:=cmsis-dap
|
FLASHER:=cmsis-dap
|
||||||
|
|
||||||
|
flashboot:
|
||||||
|
@$(OPENOCD) -f interface/$(FLASHER).cfg -c 'transport select swd' -c 'adapter_khz 1000' \
|
||||||
|
-f $(FLASHER_PATH)rtl8710.ocd -c 'init' -c 'reset halt' -c 'adapter_khz $(FLASHER_SPEED)' \
|
||||||
|
-c 'rtl8710_flash_auto_erase 1' -c 'rtl8710_flash_auto_verify 1' \
|
||||||
|
-c 'rtl8710_flash_write $(RAM1P_IMAGE) 0' \
|
||||||
|
-c 'rtl8710_reboot' -c 'reset run' -c shutdown
|
||||||
|
|
||||||
flashburn:
|
flashburn:
|
||||||
@$(OPENOCD) -f interface/$(FLASHER).cfg -c 'transport select swd' -c 'adapter_khz 1000' \
|
@$(OPENOCD) -f interface/$(FLASHER).cfg -c 'transport select swd' -c 'adapter_khz 1000' \
|
||||||
-f $(FLASHER_PATH)rtl8710.ocd -c 'init' -c 'reset halt' -c 'adapter_khz $(FLASHER_SPEED)' \
|
-f $(FLASHER_PATH)rtl8710.ocd -c 'init' -c 'reset halt' -c 'adapter_khz $(FLASHER_SPEED)' \
|
||||||
|
@ -196,6 +203,13 @@ flashimage2p:
|
||||||
-c 'rtl8710_flash_auto_erase 1' -c 'rtl8710_flash_auto_verify 1' \
|
-c 'rtl8710_flash_auto_erase 1' -c 'rtl8710_flash_auto_verify 1' \
|
||||||
-c 'rtl8710_flash_write $(RAM2P_IMAGE) 0xb000' \
|
-c 'rtl8710_flash_write $(RAM2P_IMAGE) 0xb000' \
|
||||||
-c 'rtl8710_reboot' -c 'reset run' -c shutdown
|
-c 'rtl8710_reboot' -c 'reset run' -c shutdown
|
||||||
|
|
||||||
|
flash_OTA:
|
||||||
|
@$(OPENOCD) -f interface/$(FLASHER).cfg -c 'transport select swd' -c 'adapter_khz 1000' \
|
||||||
|
-f $(FLASHER_PATH)rtl8710.ocd -c 'init' -c 'reset halt' -c 'adapter_khz $(FLASHER_SPEED)' \
|
||||||
|
-c 'rtl8710_flash_auto_erase 1' -c 'rtl8710_flash_auto_verify 1' \
|
||||||
|
-c 'rtl8710_flash_write $(RAM2P_IMAGE) 0x80000' \
|
||||||
|
-c 'rtl8710_reboot' -c 'reset run' -c shutdown
|
||||||
|
|
||||||
flashwebfs:
|
flashwebfs:
|
||||||
@$(OPENOCD) -f interface/$(FLASHER).cfg -c 'transport select swd' -c 'adapter_khz 1000' \
|
@$(OPENOCD) -f interface/$(FLASHER).cfg -c 'transport select swd' -c 'adapter_khz 1000' \
|
||||||
|
@ -223,6 +237,14 @@ runram:
|
||||||
-c 'load_image $(RAM2_IMAGE) 0x10006000 bin' \
|
-c 'load_image $(RAM2_IMAGE) 0x10006000 bin' \
|
||||||
-c 'mww 0x40000210 0x20111157' -c 'rtl8710_reboot' -c shutdown
|
-c 'mww 0x40000210 0x20111157' -c 'rtl8710_reboot' -c shutdown
|
||||||
|
|
||||||
|
runsdram:
|
||||||
|
@$(OPENOCD) -f interface/$(FLASHER).cfg -c 'transport select swd' -c 'adapter_khz 1000' \
|
||||||
|
-f $(FLASHER_PATH)rtl8710.ocd -c 'init' -c 'reset halt' -c 'adapter_khz $(FLASHER_SPEED)' \
|
||||||
|
-c 'load_image $(RAM1R_IMAGE) 0x10000bc8 bin' \
|
||||||
|
-c 'load_image $(RAM2_IMAGE) 0x10006000 bin' \
|
||||||
|
-c 'boot_load_srdam $(RAM3_IMAGE) 0x30000000' \
|
||||||
|
-c shutdown
|
||||||
|
|
||||||
endif
|
endif
|
||||||
endif
|
endif
|
||||||
|
|
||||||
|
|
|
@ -338,3 +338,18 @@ proc rtl8710_reboot {} {
|
||||||
mww 0xE000ED0C 0x05FA0007
|
mww 0xE000ED0C 0x05FA0007
|
||||||
}
|
}
|
||||||
|
|
||||||
|
proc boot_load_srdam {local_filename loc} {
|
||||||
|
echo "# Set flag WISDRAM"
|
||||||
|
mww 0x1FFF0000 0x12345678
|
||||||
|
mww 0x40000210 0x20011113
|
||||||
|
resume
|
||||||
|
echo "# Wait Init SDRAM..."
|
||||||
|
# sleep 1000
|
||||||
|
while {[rtl8710_flasher_mrw 0x1FFF0000] == 0x12345678 } { sleep 10 }
|
||||||
|
halt
|
||||||
|
echo "# Load SDRAM image..."
|
||||||
|
load_image $local_filename $loc
|
||||||
|
resume
|
||||||
|
# echo "# Go"
|
||||||
|
mww 0x1FFF0000 1
|
||||||
|
}
|
||||||
|
|
|
@ -97,3 +97,4 @@ proc load_ram_binary { local_filename address } {
|
||||||
boot_from_ram
|
boot_from_ram
|
||||||
resume
|
resume
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -338,3 +338,19 @@ proc rtl8710_reboot {} {
|
||||||
mww 0xE000ED0C 0x05FA0007
|
mww 0xE000ED0C 0x05FA0007
|
||||||
}
|
}
|
||||||
|
|
||||||
|
proc boot_load_srdam {local_filename loc} {
|
||||||
|
echo "# Set flag WISDRAM"
|
||||||
|
mww 0x1FFF0000 0x12345678
|
||||||
|
mww 0x40000210 0x20011113
|
||||||
|
resume
|
||||||
|
echo "# Wait Init SDRAM..."
|
||||||
|
# sleep 1000
|
||||||
|
while {[rtl8710_flasher_mrw 0x1FFF0000] == 0x12345678 } { sleep 10 }
|
||||||
|
halt
|
||||||
|
echo "# Load SDRAM image..."
|
||||||
|
load_image $local_filename $loc
|
||||||
|
resume
|
||||||
|
# echo "# Go"
|
||||||
|
mww 0x1FFF0000 1
|
||||||
|
}
|
||||||
|
|
||||||
|
|
|
@ -48,8 +48,8 @@ DRAM_C += project/src/console/atcmd_user.c
|
||||||
DRAM_C += project/src/console/wifi_console.c
|
DRAM_C += project/src/console/wifi_console.c
|
||||||
#DRAM_C += project/src/console/wlan_tst.c
|
#DRAM_C += project/src/console/wlan_tst.c
|
||||||
#ADD_SRC_C += project/src/console/pwm_tst.c
|
#ADD_SRC_C += project/src/console/pwm_tst.c
|
||||||
ADD_SRC_C += project/src/WS2812/ws2812_tst.c
|
#ADD_SRC_C += project/src/WS2812/ws2812_tst.c
|
||||||
ADD_SRC_C += project/src/WS2812/WS2812.c
|
#ADD_SRC_C += project/src/WS2812/WS2812.c
|
||||||
|
|
||||||
ifdef USE_SDCARD
|
ifdef USE_SDCARD
|
||||||
ADD_SRC_C += project/src/console/sd_fat.c
|
ADD_SRC_C += project/src/console/sd_fat.c
|
||||||
|
|
|
@ -31,7 +31,7 @@
|
||||||
#define RTL8195A 1
|
#define RTL8195A 1
|
||||||
/* 0 - 166666666 Hz, 1 - 83333333 Hz, 2 - 41666666 Hz, 3 - 20833333 Hz, 4 - 10416666 Hz, 5 - 4000000? Hz,
|
/* 0 - 166666666 Hz, 1 - 83333333 Hz, 2 - 41666666 Hz, 3 - 20833333 Hz, 4 - 10416666 Hz, 5 - 4000000? Hz,
|
||||||
6 - 200000000 Hz, 7 - 100000000 Hz, 8 - 50000000 Hz, 9 - 25000000 Hz, 10 - 12500000 Hz, 11 - 4000000? Hz */
|
6 - 200000000 Hz, 7 - 100000000 Hz, 8 - 50000000 Hz, 9 - 25000000 Hz, 10 - 12500000 Hz, 11 - 4000000? Hz */
|
||||||
#define CONFIG_CPU_CLK 1
|
#define CONFIG_CPU_CLK 0
|
||||||
//166.6MHZ - RUN/IDLE/SLP ~63/21/6.4 mA
|
//166.6MHZ - RUN/IDLE/SLP ~63/21/6.4 mA
|
||||||
//83.3MHZ - RUN/IDLE/SLP ~55/15/6.4 mA
|
//83.3MHZ - RUN/IDLE/SLP ~55/15/6.4 mA
|
||||||
//41.6MHZ - RUN/IDLE ~51/11 mA
|
//41.6MHZ - RUN/IDLE ~51/11 mA
|
||||||
|
|
|
@ -185,6 +185,7 @@ typedef struct s_http_response
|
||||||
//#define tcp_urlstrcpy(str, len) web_conn->msgbuflen += urlencode(&web_conn->msgbuf[web_conn->msgbuflen], str, web_conn->msgbufsize - web_conn->msgbuflen - 1, len)
|
//#define tcp_urlstrcpy(str, len) web_conn->msgbuflen += urlencode(&web_conn->msgbuf[web_conn->msgbuflen], str, web_conn->msgbufsize - web_conn->msgbuflen - 1, len)
|
||||||
#define tcp_puts(...) web_conn->msgbuflen += rtl_sprintf((char *)&web_conn->msgbuf[web_conn->msgbuflen], __VA_ARGS__)
|
#define tcp_puts(...) web_conn->msgbuflen += rtl_sprintf((char *)&web_conn->msgbuf[web_conn->msgbuflen], __VA_ARGS__)
|
||||||
#define tcp_puts_fd(...) web_conn->msgbuflen += rtl_sprintf((char *)&web_conn->msgbuf[web_conn->msgbuflen], __VA_ARGS__)
|
#define tcp_puts_fd(...) web_conn->msgbuflen += rtl_sprintf((char *)&web_conn->msgbuf[web_conn->msgbuflen], __VA_ARGS__)
|
||||||
|
#define tcp_put_mac(m) web_conn->msgbuflen += mactostr((char *)&web_conn->msgbuf[web_conn->msgbuflen], (unsigned char *)m, true)
|
||||||
/*
|
/*
|
||||||
#define tcp_puts_fd(fmt, ...) do { \
|
#define tcp_puts_fd(fmt, ...) do { \
|
||||||
static const char flash_str[] ICACHE_RODATA_ATTR = fmt; \
|
static const char flash_str[] ICACHE_RODATA_ATTR = fmt; \
|
||||||
|
|
|
@ -31,7 +31,7 @@ uint8 * cmpcpystr(uint8 *pbuf, uint8 *pstr, uint8 a, uint8 b, uint16 len);
|
||||||
uint8 * web_strnstr(const uint8* buffer, const uint8* token, int n);
|
uint8 * web_strnstr(const uint8* buffer, const uint8* token, int n);
|
||||||
bool base64decode(const uint8 *in, int len, uint8_t *out, int *outlen);
|
bool base64decode(const uint8 *in, int len, uint8_t *out, int *outlen);
|
||||||
size_t base64encode(char* target, size_t target_len, const char* source, size_t source_len);
|
size_t base64encode(char* target, size_t target_len, const char* source, size_t source_len);
|
||||||
void strtomac(uint8 *s, uint8 *macaddr);
|
int strtomac(uint8 *s, uint8 *macaddr);
|
||||||
//uint32 strtoip(uint8 *s); // ipaddr_addr();
|
//uint32 strtoip(uint8 *s); // ipaddr_addr();
|
||||||
int urldecode(uint8 *d, uint8 *s, uint16 lend, uint16 lens);
|
int urldecode(uint8 *d, uint8 *s, uint16 lend, uint16 lens);
|
||||||
//int urlencode(uint8 *d, uint8 *s, uint16 lend, uint16 lens);
|
//int urlencode(uint8 *d, uint8 *s, uint16 lend, uint16 lens);
|
||||||
|
|
|
@ -129,6 +129,8 @@ void ina219_init(void)
|
||||||
// (!) Установки драйвера I2C заданы в структуре ina219drv
|
// (!) Установки драйвера I2C заданы в структуре ina219drv
|
||||||
// rtl_printf("INA219 control reg = 0x%04x\n", p->config);
|
// rtl_printf("INA219 control reg = 0x%04x\n", p->config);
|
||||||
// _i2c_setup(&p->i2c, INA219_I2C_PIN_SDA , INA219_I2C_PIN_SCL, DRV_I2C_FS_MODE); // == DRV_I2C_OK?
|
// _i2c_setup(&p->i2c, INA219_I2C_PIN_SDA , INA219_I2C_PIN_SCL, DRV_I2C_FS_MODE); // == DRV_I2C_OK?
|
||||||
|
// HAL_GPIO_PullCtrl((u32)PC_4, (u32)PullUp);
|
||||||
|
// HAL_GPIO_PullCtrl((u32)PC_5, (u32)PullUp);
|
||||||
_i2c_init(&p->i2c);
|
_i2c_init(&p->i2c);
|
||||||
// _i2c_set_speed(&p->i2c, INA219_I2C_BUS_CLK);
|
// _i2c_set_speed(&p->i2c, INA219_I2C_BUS_CLK);
|
||||||
rtl_printf("I2C%d mode = %d, drvStatus = %d\n", p->i2c.idx, p->i2c.mode, p->i2c.status);
|
rtl_printf("I2C%d mode = %d, drvStatus = %d\n", p->i2c.idx, p->i2c.mode, p->i2c.status);
|
||||||
|
|
|
@ -47,8 +47,8 @@ INA219DRV ina219drv = {
|
||||||
// Если шаг заполнения 1 ms -> буфер на 0.71 сек
|
// Если шаг заполнения 1 ms -> буфер на 0.71 сек
|
||||||
// Оптимизация под TCP: (TCP_MSS*2 - 80)/4 = (1460*2 - 80)/4 = 710
|
// Оптимизация под TCP: (TCP_MSS*2 - 80)/4 = (1460*2 - 80)/4 = 710
|
||||||
.i2c.status = DRV_I2C_OFF,
|
.i2c.status = DRV_I2C_OFF,
|
||||||
.i2c.idx = 1, // I2C1
|
.i2c.idx = 1, // =1: I2C1
|
||||||
.i2c.io_sel = S0, // PC_4, PC_5
|
.i2c.io_sel = S0, // =S0: PC_4, PC_5
|
||||||
.i2c.mode = DRV_I2C_FS_MODE // DRV_I2C_FS_MODE
|
.i2c.mode = DRV_I2C_FS_MODE // DRV_I2C_FS_MODE
|
||||||
};
|
};
|
||||||
/*
|
/*
|
||||||
|
@ -270,6 +270,8 @@ void ina219_init(void)
|
||||||
};
|
};
|
||||||
// (!) Установки драйвера I2C заданы в структуре ina219drv
|
// (!) Установки драйвера I2C заданы в структуре ina219drv
|
||||||
// _i2c_setup(&p->i2c, INA219_I2C_PIN_SDA , INA219_I2C_PIN_SCL, DRV_I2C_FS_MODE); // == DRV_I2C_OK?
|
// _i2c_setup(&p->i2c, INA219_I2C_PIN_SDA , INA219_I2C_PIN_SCL, DRV_I2C_FS_MODE); // == DRV_I2C_OK?
|
||||||
|
GPIO_PullCtrl_8195a((u32)PC_4, DIN_PULL_HIGH); // HAL_GPIO_PullCtrl((u32)PC_4, (u32)PullUp);
|
||||||
|
GPIO_PullCtrl_8195a((u32)PC_5, DIN_PULL_HIGH); // HAL_GPIO_PullCtrl((u32)PC_5, (u32)PullUp);
|
||||||
_i2c_init(&p->i2c);
|
_i2c_init(&p->i2c);
|
||||||
// _i2c_set_speed(&p->i2c, INA219_I2C_BUS_CLK);
|
// _i2c_set_speed(&p->i2c, INA219_I2C_BUS_CLK);
|
||||||
rtl_printf("I2C%d mode = %d, drvStatus = %d\n", p->i2c.idx, p->i2c.mode, p->i2c.status);
|
rtl_printf("I2C%d mode = %d, drvStatus = %d\n", p->i2c.idx, p->i2c.mode, p->i2c.status);
|
||||||
|
|
|
@ -74,7 +74,6 @@ void user_init_thrd(void) {
|
||||||
if(!syscfg.cfg.b.debug_print_enable) print_off = 1;
|
if(!syscfg.cfg.b.debug_print_enable) print_off = 1;
|
||||||
|
|
||||||
/* Initilaize the console stack */
|
/* Initilaize the console stack */
|
||||||
|
|
||||||
console_init();
|
console_init();
|
||||||
|
|
||||||
/* Web Disk Init */
|
/* Web Disk Init */
|
||||||
|
|
|
@ -533,14 +533,14 @@ extern int adc_ws(TCP_SERV_CONN *ts_conn, char cmd);
|
||||||
else ifcmp("auth") tcp_put((wifi_ap_cfg.security) ? '1' : '0');
|
else ifcmp("auth") tcp_put((wifi_ap_cfg.security) ? '1' : '0');
|
||||||
else ifcmp("hssid") tcp_put((wifi_ap_cfg.ssid_hidden & 1) + '0');
|
else ifcmp("hssid") tcp_put((wifi_ap_cfg.ssid_hidden & 1) + '0');
|
||||||
else ifcmp("bint") tcp_puts("%u", wifi_ap_cfg.beacon_interval);
|
else ifcmp("bint") tcp_puts("%u", wifi_ap_cfg.beacon_interval);
|
||||||
else ifcmp("mac") tcp_puts(MACSTR, MAC2STR(xnetif[WLAN_AP_NETIF_NUM].hwaddr));
|
else ifcmp("mac") tcp_put_mac(xnetif[WLAN_AP_NETIF_NUM].hwaddr); //s(MACSTR, MAC2STR(xnetif[WLAN_AP_NETIF_NUM].hwaddr));
|
||||||
else ifcmp("hostname") tcp_strcpy(lwip_host_name[1]);
|
else ifcmp("hostname") tcp_strcpy(lwip_host_name[1]);
|
||||||
else ifcmp("dhcp") tcp_puts("%u", wifi_ap_dhcp.mode);
|
else ifcmp("dhcp") tcp_puts("%u", wifi_ap_dhcp.mode);
|
||||||
else ifcmp("ip") tcp_puts(IPSTR, IP2STR(&wifi_ap_dhcp.ip));
|
else ifcmp("ip") tcp_puts(IPSTR, IP2STR(&wifi_ap_dhcp.ip));
|
||||||
else ifcmp("gw") tcp_puts(IPSTR, IP2STR(&wifi_ap_dhcp.gw));
|
else ifcmp("gw") tcp_puts(IPSTR, IP2STR(&wifi_ap_dhcp.gw));
|
||||||
else ifcmp("msk") tcp_puts(IPSTR, IP2STR(&wifi_ap_dhcp.mask));
|
else ifcmp("msk") tcp_puts(IPSTR, IP2STR(&wifi_ap_dhcp.mask));
|
||||||
else ifcmp("cip") tcp_puts(IPSTR, IP2STR(&xnetif[WLAN_ST_NETIF_NUM].ip_addr.addr));
|
else ifcmp("cip") tcp_puts(IPSTR, IP2STR(&xnetif[WLAN_ST_NETIF_NUM].ip_addr.addr));
|
||||||
// else ifcmp("mac") strtomac(pvar, wifi_ap_cfg.macaddr);
|
else ifcmp("mac") tcp_put_mac(xnetif[WLAN_AP_NETIF_NUM].hwaddr);
|
||||||
// else ifcmp("sip") tcp_puts(IPSTR, IP2STR(&wifi_ap_dhcp.start_ip));
|
// else ifcmp("sip") tcp_puts(IPSTR, IP2STR(&wifi_ap_dhcp.start_ip));
|
||||||
// else ifcmp("eip") tcp_puts(IPSTR, IP2STR(&wifi_ap_dhcp.end_ip));
|
// else ifcmp("eip") tcp_puts(IPSTR, IP2STR(&wifi_ap_dhcp.end_ip));
|
||||||
#if DEBUGSOO > 2
|
#if DEBUGSOO > 2
|
||||||
|
@ -565,8 +565,8 @@ extern int adc_ws(TCP_SERV_CONN *ts_conn, char cmd);
|
||||||
wifi_st_cfg.password[IW_PASSPHRASE_MAX_SIZE] = '\0';
|
wifi_st_cfg.password[IW_PASSPHRASE_MAX_SIZE] = '\0';
|
||||||
tcp_strcpy(wifi_st_cfg.password);
|
tcp_strcpy(wifi_st_cfg.password);
|
||||||
}
|
}
|
||||||
else ifcmp("mac") tcp_puts(MACSTR, MAC2STR(xnetif[WLAN_ST_NETIF_NUM].hwaddr));
|
else ifcmp("mac") tcp_put_mac(xnetif[WLAN_ST_NETIF_NUM].hwaddr); // (MACSTR, MAC2STR(xnetif[WLAN_ST_NETIF_NUM].hwaddr));
|
||||||
else ifcmp("bssid") tcp_puts(MACSTR, MAC2STR(wifi_st_cfg.bssid));
|
else ifcmp("bssid") tcp_put_mac(wifi_st_cfg.bssid); // (MACSTR, MAC2STR(wifi_st_cfg.bssid));
|
||||||
else ifcmp("sbss") tcp_puts("%u", wifi_st_cfg.flg);
|
else ifcmp("sbss") tcp_puts("%u", wifi_st_cfg.flg);
|
||||||
else ifcmp("sleep") tcp_puts("%d", wifi_st_cfg.sleep);
|
else ifcmp("sleep") tcp_puts("%d", wifi_st_cfg.sleep);
|
||||||
else ifcmp("dtim") tcp_puts("%u", wifi_st_cfg.dtim);
|
else ifcmp("dtim") tcp_puts("%u", wifi_st_cfg.dtim);
|
||||||
|
|
|
@ -263,7 +263,19 @@ void ICACHE_FLASH_ATTR web_int_vars(TCP_SERV_CONN *ts_conn, uint8 *pcmd, uint8 *
|
||||||
else ifcmp("ip") wifi_ap_dhcp.ip = ipaddr_addr(pvar);
|
else ifcmp("ip") wifi_ap_dhcp.ip = ipaddr_addr(pvar);
|
||||||
else ifcmp("gw") wifi_ap_dhcp.gw = ipaddr_addr(pvar);
|
else ifcmp("gw") wifi_ap_dhcp.gw = ipaddr_addr(pvar);
|
||||||
else ifcmp("msk") wifi_ap_dhcp.mask = ipaddr_addr(pvar);
|
else ifcmp("msk") wifi_ap_dhcp.mask = ipaddr_addr(pvar);
|
||||||
// else ifcmp("mac") strtomac(pvar, wifi_ap_cfg.macaddr);
|
else ifcmp("mac") {
|
||||||
|
if(wifi_mode & RTW_MODE_AP) {
|
||||||
|
uint8 new_mac[6];
|
||||||
|
if (strtomac(pvar, new_mac)) {
|
||||||
|
uint16 xs = 0;
|
||||||
|
for(int i = 0; i < 6; i++) xs += new_mac[i];
|
||||||
|
if (xs != 0 && xs != 0xff*6 && memcmp(xnetif[WLAN_AP_NETIF_NUM].hwaddr, new_mac, 6)) {
|
||||||
|
if(wifi_mode == RTW_MODE_STA_AP) new_mac[5]--; // если AP+ST, то последняя цифра mac - 1
|
||||||
|
wifi_set_mac_address(new_mac);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
// else ifcmp("sip") wifi_ap_dhcp.start_ip = ipaddr_addr(pvar);
|
// else ifcmp("sip") wifi_ap_dhcp.start_ip = ipaddr_addr(pvar);
|
||||||
// else ifcmp("eip") wifi_ap_dhcp.end_ip = ipaddr_addr(pvar);
|
// else ifcmp("eip") wifi_ap_dhcp.end_ip = ipaddr_addr(pvar);
|
||||||
#if DEBUGSOO > 2
|
#if DEBUGSOO > 2
|
||||||
|
@ -321,7 +333,19 @@ void ICACHE_FLASH_ATTR web_int_vars(TCP_SERV_CONN *ts_conn, uint8 *pcmd, uint8 *
|
||||||
else ifcmp("ip") wifi_st_dhcp.ip = ipaddr_addr(pvar);
|
else ifcmp("ip") wifi_st_dhcp.ip = ipaddr_addr(pvar);
|
||||||
else ifcmp("gw") wifi_st_dhcp.gw = ipaddr_addr(pvar);
|
else ifcmp("gw") wifi_st_dhcp.gw = ipaddr_addr(pvar);
|
||||||
else ifcmp("msk") wifi_st_dhcp.mask = ipaddr_addr(pvar);
|
else ifcmp("msk") wifi_st_dhcp.mask = ipaddr_addr(pvar);
|
||||||
// else ifcmp("mac") strtomac(pvar, wifi_st_cfg.mac);
|
else ifcmp("mac") {
|
||||||
|
if(wifi_mode & RTW_MODE_STA) {
|
||||||
|
uint8 new_mac[6];
|
||||||
|
if (strtomac(pvar, new_mac)) {
|
||||||
|
uint16 xs = 0;
|
||||||
|
for(int i = 0; i < 6; i++) xs += new_mac[i];
|
||||||
|
if (xs != 0 && xs != 0xff*6 && memcmp(xnetif[WLAN_ST_NETIF_NUM].hwaddr, new_mac, 6)) {
|
||||||
|
// if(wifi_mode == RTW_MODE_STA_AP) new_mac[5]--; // если AP+ST, то последняя цифра mac - 1
|
||||||
|
wifi_set_mac_address(new_mac);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
// else ifcmp("sbss") wifi_st_cfg.bssidx = val;
|
// else ifcmp("sbss") wifi_st_cfg.bssidx = val;
|
||||||
#if DEBUGSOO > 5
|
#if DEBUGSOO > 5
|
||||||
else os_printf(" - none!\n");
|
else os_printf(" - none!\n");
|
||||||
|
|
|
@ -375,18 +375,27 @@ uint32 ICACHE_FLASH_ATTR str_array_b(uint8 *s, uint8 *buf, uint32 max_buf)
|
||||||
/******************************************************************************
|
/******************************************************************************
|
||||||
* FunctionName : strtmac
|
* FunctionName : strtmac
|
||||||
*******************************************************************************/
|
*******************************************************************************/
|
||||||
void ICACHE_FLASH_ATTR strtomac(uint8 *s, uint8 *macaddr)
|
int ICACHE_FLASH_ATTR strtomac(uint8 *s, uint8 *macaddr)
|
||||||
{
|
{
|
||||||
uint8 pbuf[4];
|
uint8 * ptrm = macaddr;
|
||||||
s = cmpcpystr(pbuf, s, 0, ':', 3);
|
int slen = strlen(s);
|
||||||
*macaddr++ = hextoul(pbuf);
|
uint8 * ptr = s;
|
||||||
int i = 4;
|
if(slen == (6*2 + 5) || slen == (6*2)) {
|
||||||
while(i--) {
|
uint8 pbuf[4];
|
||||||
s = cmpcpystr(pbuf, s, ':', ':', 3);
|
pbuf[2] = 0;
|
||||||
*macaddr++ = hextoul(pbuf);
|
slen = 6;
|
||||||
|
while(slen--) {
|
||||||
|
pbuf[0] = ptr[0];
|
||||||
|
pbuf[1] = ptr[1];
|
||||||
|
*ptrm++ = (uint8)hextoul(pbuf);
|
||||||
|
if(ptr[2] != ':') ptr +=2;
|
||||||
|
else ptr +=3;
|
||||||
|
}
|
||||||
|
return 1;
|
||||||
|
} else {
|
||||||
|
rtl_memset(macaddr, 0xff, 6);
|
||||||
|
return 0;
|
||||||
}
|
}
|
||||||
s = cmpcpystr(pbuf, s, ':', ' ', 3);
|
|
||||||
*macaddr++ = hextoul(pbuf);
|
|
||||||
}
|
}
|
||||||
/******************************************************************************
|
/******************************************************************************
|
||||||
* FunctionName : urldecode
|
* FunctionName : urldecode
|
||||||
|
|
Loading…
Reference in a new issue